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    Methods for low temperature oxidation of a semiconductor device
    1.
    发明授权
    Methods for low temperature oxidation of a semiconductor device 有权
    半导体器件的低温氧化方法

    公开(公告)号：US07645709B2

    公开(公告)日：2010-01-12

    申请号：US11830140

    申请日：2007-07-30

    申请人： Thai Cheng Chua ,  James P. Cruse ,  Cory Czarnik

    发明人： Thai Cheng Chua ,  James P. Cruse ,  Cory Czarnik

    IPC分类号： H01L21/469

    CPC分类号： H01L29/7881 ,  H01L21/0223 ,  H01L21/02238 ,  H01L21/02252 ,  H01L21/31662 ,  H01L29/513 ,  H01L29/66825

    摘要： Methods of fabricating an oxide layer on a semiconductor substrate are provided herein. In some embodiments, a method of forming an oxide layer on a semiconductor substrate includes placing a substrate to be oxidized on a substrate support in a vacuum chamber of a plasma reactor, the chamber having an ion generation region remote from the substrate support; introducing a process gas into the chamber, the process gas comprising at least one of hydrogen (H2) and oxygen (O2)—provided at a flow rate ratio of hydrogen (H2) to oxygen (O2) of up to about 3:1—or water vapor (H2O vapor); and generating an inductively coupled plasma in the ion generation region of the chamber to form a silicon oxide layer on the substrate.

    摘要翻译： 本文提供了在半导体衬底上制造氧化物层的方法。 在一些实施例中，在半导体衬底上形成氧化物层的方法包括将待氧化的衬底放置在等离子体反应器的真空室中的衬底支撑件上，该腔室具有远离衬底支撑件的离子产生区域; 将工艺气体引入所述室中，所述工艺气体包括氢（H 2）和氧（O 2）中的至少一种，以氢（H 2）与氧（O 2）的流速比高达约3：1- 或水汽（H 2 O蒸气）; 以及在所述室的离子产生区域中产生电感耦合等离子体，以在所述衬底上形成氧化硅层。

    Plasma ignition and complete faraday shielding of capacitive coupling for an inductively-coupled plasma
    2.
    发明授权
    Plasma ignition and complete faraday shielding of capacitive coupling for an inductively-coupled plasma 失效
    用于电感耦合等离子体的等离子体点火和电容耦合的完整法拉第屏蔽

    公开(公告)号：US07605008B2

    公开(公告)日：2009-10-20

    申请号：US11695553

    申请日：2007-04-02

    申请人： Thai Cheng Chua ,  James P. Cruse ,  Cory Czarnik

    发明人： Thai Cheng Chua ,  James P. Cruse ,  Cory Czarnik

    IPC分类号： H01L21/318 ,  H01L21/66

    CPC分类号： H01J37/32697 ,  H01J37/321 ,  H01J37/32623

    摘要： A method and apparatus for igniting a gas mixture into plasma using capacitive coupling techniques, shielding the plasma and other contents of the plasma reactor from the capacitively-coupled electric field, and maintaining the plasma using inductive coupling are provided. For some embodiments, the amount of capacitive coupling may be controlled after ignition of the plasma. Such techniques are employed in an effort to prevent damage to the surface of a substrate from excessive ion bombardment caused by the highly energized ions and electrons accelerated towards and perpendicular to the substrate surface by the electric field of capacitively-coupled plasma.

    摘要翻译： 提供了一种使用电容耦合技术将气体混合物点燃到等离子体中的方法和装置，其将等离子体和其他内容物等离子体与电容耦合电场屏蔽，并使用电感耦合来维持等离子体。 对于一些实施例，可以在点燃等离子体之后控制电容耦合的量。 这样的技术被用于防止由电容耦合等离子体的电场对由高能量的离子和电子加速而朝向和垂直于衬底表面加速的过度的离子轰击造成的衬底表面的损坏。

    Method for fabricating a gate dielectric layer utilized in a gate structure
    3.
    发明申请
    Method for fabricating a gate dielectric layer utilized in a gate structure 审中-公开
    用于制造栅极结构中使用的栅极电介质层的方法

    公开(公告)号：US20080014759A1

    公开(公告)日：2008-01-17

    申请号：US11485546

    申请日：2006-07-12

    申请人： Thai Cheng Chua ,  Philip Allan Kraus ,  Christopher Sean Olsen ,  Cory Czarnik ,  Chikuang Charles Wang

    发明人： Thai Cheng Chua ,  Philip Allan Kraus ,  Christopher Sean Olsen ,  Cory Czarnik ,  Chikuang Charles Wang

    IPC分类号： H01L21/469

    CPC分类号： H01L21/02337 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02255 ,  H01L21/02266 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/28202 ,  H01L21/3145 ,  H01L29/518 ,  H01L29/66568 ,  H01L29/78

    摘要： Methods for forming a gate dielectric layer on a substrate are provided. In one embodiment, the method includes forming a silicon oxide layer on a silicon substrate, depositing a silicon nitride layer on the silicon oxide layer by a thermal process, wherein the silicon oxide layer and the silicon nitride layer are utilized as a gate dielectric layer in a gate structure, and thermally annealing the substrate. In another embodiment, the method includes forming a silicon oxide layer on the silicon substrate with a thickness less than 15 Å, plasma treating the silicon oxide layer, depositing a silicon nitride layer on the silicon oxide layer with a thickness less than 15 Å by a thermal process, wherein the silicon oxide layer and the silicon nitride layer are utilized as a gate dielectric layer in a gate structure, plasma treating the silicon nitride layer; and thermally annealing the substrate.

    摘要翻译： 提供了在基板上形成栅介质层的方法。 在一个实施例中，该方法包括在硅衬底上形成硅氧化物层，通过热处理在氧化硅层上沉积氮化硅层，其中氧化硅层和氮化硅层用作栅极电介质层 栅极结构，并对基板进行热退火。 在另一个实施例中，该方法包括在硅衬底上形成厚度小于等于的氧化硅层，等离子体处理氧化硅层，在氧化硅层上沉积厚度小于15埃的氮化硅层 热处理，其中氧化硅层和氮化硅层用作栅极结构中的栅极电介质层，等离子体处理氮化硅层; 并对衬底进行热退火。

    METHOD AND APPARATUS FOR ATOMIC HYDROGEN SURFACE TREATMENT DURING GaN EPITAXY
    8.
    发明申请
    METHOD AND APPARATUS FOR ATOMIC HYDROGEN SURFACE TREATMENT DURING GaN EPITAXY 有权
    氮化镓外延原子氢表面处理方法与装置

    公开(公告)号：US20130130481A1

    公开(公告)日：2013-05-23

    申请号：US13302001

    申请日：2011-11-22

    申请人： Thai Cheng Chua ,  Timothy Joseph Franklin ,  Philip Kraus

    发明人： Thai Cheng Chua ,  Timothy Joseph Franklin ,  Philip Kraus

    IPC分类号： H01L21/205

    CPC分类号： H01L21/0254 ,  C23C16/303 ,  C23C16/45551 ,  H01L21/0262

    摘要： Methods and apparatus for generating and delivering atomic hydrogen to the growth front during the deposition of a III-V film are provided. The apparatus adapts HWCVD technology to a system wherein the Group III precursor and the Group V precursor are delivered to the surface in isolated processing environments within the system. Multiple HWCVD units may be incorporated so that the atomic hydrogen parameters may be varied in a combinatorial manner for the development of III-V films.

    摘要翻译： 提供了在III-V膜沉积期间产生和输送原子氢到生长前沿的方法和装置。 该装置使HWCVD技术适应于其中III族前体和V族前体在系统内的隔离处理环境中被输送到表面的系统。 可以并入多个HWCVD单元，使得原子氢参数可以以组合方式改变以用于III-V膜的开发。

    Methods and systems for forming thin films
    9.
    发明授权
    Methods and systems for forming thin films 失效
    用于形成薄膜的方法和系统

    公开(公告)号：US08318590B2

    公开(公告)日：2012-11-27

    申请号：US13398988

    申请日：2012-02-17

    申请人： Philip A. Kraus ,  Thai Cheng Chua ,  Sandeep Nijhawan

    发明人： Philip A. Kraus ,  Thai Cheng Chua ,  Sandeep Nijhawan

    IPC分类号： H01L31/20

    CPC分类号： H01L21/2056 ,  C23C16/303 ,  C23C16/4554 ,  C23C16/45542 ,  C23C16/45551 ,  H01L21/0237 ,  H01L21/0254 ,  H01L21/0262 ,  Y10T117/1016

    摘要： A method and apparatus for the deposition of thin films is described. In embodiments, systems and methods for epitaxial thin film formation are provided, including systems and methods for forming binary compound epitaxial thin films. Methods and systems of embodiments of the invention may be used to form direct bandgap semiconducting binary compound epitaxial thin films, such as, for example, GaN, InN and AlN, and the mixed alloys of these compounds, e.g., (In, Ga)N, (Al, Ga)N, (In, Ga, Al)N. Methods and apparatuses include a multistage deposition process and system which enables rapid repetition of sub-monolayer deposition of thin films.

    摘要翻译： 描述了沉积薄膜的方法和装置。 在实施例中，提供了用于外延薄膜形成的系统和方法，包括用于形成二元化合物外延薄膜的系统和方法。 可以使用本发明实施例的方法和系统来形成直接带隙半导体二元化合物外延薄膜，例如GaN，InN和AlN，以及这些化合物的混合合金，例如（In，Ga）N ，（Al，Ga）N，（In，Ga，Al）N。 方法和装置包括能够快速重复薄膜的亚单层沉积的多级沉积工艺和系统。

    Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system
    10.
    发明授权
    Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system 有权
    使用低能量等离子体系制造高介电常数晶体管栅的方法和装置

    公开(公告)号：US07678710B2

    公开(公告)日：2010-03-16

    申请号：US11614019

    申请日：2006-12-20

    申请人： Thai Cheng Chua ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Alex M. Paterson ,  Valentin Todorov ,  John P. Holland

    发明人： Thai Cheng Chua ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Alex M. Paterson ,  Valentin Todorov ,  John P. Holland

    IPC分类号： H01L21/31 ,  H01L21/469

    CPC分类号： H01L21/02175 ,  H01J37/32082 ,  H01J37/32146 ,  H01L21/02148 ,  H01L21/02266 ,  H01L21/0234 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/31155 ,  H01L21/3144 ,  H01L21/316 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/513

    摘要： The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material. Embodiments of the invention also provide a cluster tool that is adapted to form a high-k dielectric material, terminate the surface of the high-k dielectric material, perform any desirable post treatment steps, and form the polysilicon and/or metal gate layers.

    摘要翻译： 本发明通常提供适于在衬底上形成高质量电介质栅极层的方法和装置。 实施例考虑了一种方法，其中使用金属等离子体处理工艺代替标准氮化工艺以在衬底上形成高介电常数层。 实施例进一步考虑了一种适于“植入”相对较低能量的金属离子的装置，以便减少对诸如二氧化硅层的栅极介电层的离子轰击损伤，并避免将金属原子并入到下面的硅中。 通常，该方法包括以下步骤：形成高k电介质，然后终止沉积的高k材料的表面，以在栅电极和高k电介质材料之间形成良好的界面。 本发明的实施例还提供一种簇工具，其适于形成高k电介质材料，终止高k电介质材料的表面，执行任何期望的后处理步骤，并形成多晶硅和/或金属栅极层。