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公开(公告)号:US20200066496A1
公开(公告)日:2020-02-27
申请号:US16545185
申请日:2019-08-20
Applicant: Tokyo Electron Limited
Inventor: Shingo KITAMURA , Koichi KAZAMA , Masahiro OGASAWARA , Susumu NOGAMI , Tetsuji SATO
IPC: H01J37/32 , H01L21/687 , H01L21/3213
Abstract: An annular member is disposed to surround a pedestal for receiving a substrate in a plasma processing apparatus. The annular member contains quartz and silicon. A content percentage of the silicon in the quartz and the silicon is 2.5% or more and 10% and less by weight.
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公开(公告)号:US20150179466A1
公开(公告)日:2015-06-25
申请号:US14574565
申请日:2014-12-18
Applicant: TOKYO ELECTRON LIMITED
Inventor: Wataru TAKAYAMA , Shoichiro MATSUYAMA , Susumu NOGAMI , Daisuke TAMURA , Kyosuke HAYASHI , Jun KAWANOBE
IPC: H01L21/308 , H01L21/3065
CPC classification number: H01L21/31116 , H01J37/32091 , H01L21/31144 , H01L21/32137 , H01L27/11582
Abstract: Provided is a method of manufacturing a semiconductor device. The method includes providing an object to be processed including a multilayer film formed by alternately laminating a first film and a second film having different dielectric coefficients within a processing container of a plasma processing apparatus; and repeatedly performing a sequence including: supplying a first gas including O2 gas or N2 gas, and a rare gas into the processing container and exciting the first gas, supplying a second gas including a fluorocarbon gas or a fluorohydrocarbon gas into the processing container and exciting the second gas, and supplying a third gas including HBr gas, a fluorine-containing gas, and a fluorocarbon gas or a fluorohydrocarbon gas into the processing container and exciting the third gas, so that the multilayer film is etched through a mask.
Abstract translation: 提供一种制造半导体器件的方法。 该方法包括提供一种待处理对象,其包括通过在等离子体处理装置的处理容器内交替层叠具有不同介电系数的第一膜和第二膜而形成的多层膜; 并且重复地执行包括:向所述处理容器供应包括O 2气体或N 2气体的第一气体和稀有气体,并且激发所述第一气体,将包括碳氟化合物气体或氟代烃气体的第二气体供应到所述处理容器中并激发 第二气体,并且将包括HBr气体,含氟气体,氟碳化合物气体或氟代烃气体的第三气体供给到处理容器中并激发第三气体,从而通过掩模蚀刻多层膜。
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公开(公告)号:US20140284308A1
公开(公告)日:2014-09-25
申请号:US14219437
申请日:2014-03-19
Applicant: KABUSHIKI KAISHA TOSHIBA , TOKYO ELECTRON LIMITED
Inventor: Shoichiro MATSUYAMA , Akitaka SHIMIZU , Susumu NOGAMI , Kiyohito ITO , Tokuhisa OHIWA , Katsunori YAHASHI
IPC: H01J37/32
CPC classification number: H01J37/32091 , H01J37/32165 , H01J37/32174 , H01J37/32366 , H01J37/32568 , H01J2237/334
Abstract: There are provided a plasma etching method and a plasma etching apparatus, capable of suppressing occurrence of local bias in etching rate and suppressing occurrence of charge-up damage. The plasma etching method of etching a silicon layer of a substrate to be processed using the plasma etching apparatus sets the pressure in a processing chamber to 13.3 Pa or more and applies, to a lower electrode, a first high-frequency power with a first frequency and a second high-frequency power with a second frequency that is lower than the first frequency and is a frequency of 1 MHz or lower.
Abstract translation: 提供了等离子体蚀刻方法和等离子体蚀刻装置,其能够抑制蚀刻速度中的局部偏置的发生并且抑制充电损伤的发生。 使用等离子体蚀刻装置对待处理的基板的硅层进行蚀刻的等离子体蚀刻方法将处理室内的压力设定为13.3Pa以上,并向下部电极施加具有第一频率的第一高频电力 以及具有低于第一频率的第二频率并且是1MHz或更低的频率的第二高频功率。
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