公开(公告)号：US07675360B2

公开(公告)日：2010-03-09

申请号：US12244972

申请日：2008-10-03

申请人： Tomoyuki Arai ,  Takao Sasaki ,  Shinji Yamaura

发明人： Tomoyuki Arai ,  Takao Sasaki ,  Shinji Yamaura

IPC分类号： H03G3/20

CPC分类号： H03G3/001 ,  H03G1/04

摘要： A power control circuit includes: a fine adjustment variable amplifying unit configured to amplify the input signal in accordance with a first gain set value; a coarse adjustment variable amplifying unit configured to amplify the input signal in accordance with a second gain set value; a branching unit configured to branch an output signal into a feedback signal; a comparing unit configured to compare a gain value between the input signal and the output signal with the required gain set value; a control unit configured to determine the first gain set value and the second gain set value based on the required gain set value; and an adjusting unit configured to adjust the first gain set value and the second gain set value so that the power value of the feedback signal becomes a power value corresponding to the required gain set value.

摘要翻译： 功率控制电路包括：微调可变放大单元，被配置为根据第一增益设定值放大输入信号; 被配置为根据第二增益设定值放大输入信号的粗调可变放大单元; 分配单元，被配置为将输出信号分支成反馈信号; 比较单元，被配置为将输入信号和输出信号之间的增益值与所需的增益设定值进行比较; 控制单元，被配置为基于所需的增益设定值来确定所述第一增益设定值和所述第二增益设定值; 以及调整单元，被配置为调整第一增益设定值和第二增益设定值，使得反馈信号的功率值变为与所需增益设定值对应的功率值。

公开(公告)号：US20090167435A1

公开(公告)日：2009-07-02

申请号：US12244972

申请日：2008-10-03

申请人： Tomoyuki Arai ,  Takao Sasaki ,  Shinji Yamaura

发明人： Tomoyuki Arai ,  Takao Sasaki ,  Shinji Yamaura

IPC分类号： H03G3/20

CPC分类号： H03G3/001 ,  H03G1/04

摘要： A power control circuit includes: a fine adjustment variable amplifying unit configured to amplify the input signal in accordance with a first gain set value; a coarse adjustment variable amplifying unit configured to amplify the input signal in accordance with a second gain set value; a branching unit configured to branch an output signal into a feedback signal; a comparing unit configured to compare a gain value between the input signal and the output signal with the required gain set value; a control unit configured to determine the first gain set value and the second gain set value based on the required gain set value; and an adjusting unit configured to adjust the first gain set value and the second gain set value so that the power value of the feedback signal becomes a power value corresponding to the required gain set value.

摘要翻译： 功率控制电路包括：微调可变放大单元，被配置为根据第一增益设定值放大输入信号; 被配置为根据第二增益设定值放大输入信号的粗调可变放大单元; 分配单元，被配置为将输出信号分支成反馈信号; 比较单元，被配置为将输入信号和输出信号之间的增益值与所需的增益设定值进行比较; 控制单元，被配置为基于所需的增益设定值来确定所述第一增益设定值和所述第二增益设定值; 以及调整单元，被配置为调整第一增益设定值和第二增益设定值，使得反馈信号的功率值变为与所需增益设定值对应的功率值。

公开(公告)号：US08283980B2

公开(公告)日：2012-10-09

申请号：US12567492

申请日：2009-09-25

申请人： Tomoyuki Arai ,  Masahiro Kudo ,  Shinji Yamaura

发明人： Tomoyuki Arai ,  Masahiro Kudo ,  Shinji Yamaura

IPC分类号： H02J7/00 ,  H02J7/16 ,  H03F3/04 ,  H03F3/217

CPC分类号： H03F3/45183 ,  H03F1/3211 ,  H03F3/45188 ,  H03F2200/456 ,  H03F2203/45302 ,  H03F2203/45466 ,  H03F2203/45638

摘要： An amplifier circuit includes an amplifier unit and a current control circuit as means for achieving the aforementioned object. The amplifier unit includes a gain compensation MOS transistor compensating for gain of an output characteristic and a linearity compensation MOS transistor compensating for linearity of an output characteristic. A source of the gain compensation MOS transistor is connected to a drain of the linearity compensation MOS transistor. An input signal is applied to a gate of the linearity compensation MOS transistor. A drain of the gain compensation MOS transistor is set as an output. The current control circuit performs control so as to pass predetermined current between the drain and the source of the gain compensation MOS transistor and pass predetermined current between the drain and the source of the linearity compensation MOS transistor.

摘要翻译： 放大器电路包括作为实现上述目的的装置的放大器单元和电流控制电路。 放大器单元包括补偿输出特性增益的增益补偿MOS晶体管和补偿输出特性的线性度的线性补偿MOS晶体管。 增益补偿MOS晶体管的源极连接到线性补偿MOS晶体管的漏极。 输入信号被施加到线性补偿MOS晶体管的栅极。 增益补偿MOS晶体管的漏极被设置为输出。 电流控制电路进行控制，以便在增益补偿MOS晶体管的漏极和源极之间通过预定电流，并且在线性补偿MOS晶体管的漏极和源极之间通过预定电流。

公开(公告)号：US5738722A

公开(公告)日：1998-04-14

申请号：US522136

申请日：1995-08-31

申请人： Takeshi Tomioka ,  Hideyasu Ando ,  Naoya Okamoto ,  Shinji Yamaura

发明人： Takeshi Tomioka ,  Hideyasu Ando ,  Naoya Okamoto ,  Shinji Yamaura

IPC分类号： H01L29/73 ,  H01L21/203 ,  H01L21/205 ,  H01L21/331 ,  H01L21/338 ,  H01L27/06 ,  H01L29/205 ,  H01L29/207 ,  H01L29/737 ,  H01L29/778 ,  H01L29/812 ,  C30B25/14

CPC分类号： H01L29/207 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02505 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02573 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02631 ,  H01L27/0605 ,  H01L29/66318

摘要： The invention relates to a method for manufacturing a III-V system compound semiconductor device, provides such a new C dopant as alkyl halide (CH.sub.2 I.sub.2 for example) containing carbon (C), iodine (I), and hydrogen (H) for giving a highly p-type conductivity to a GaAs crystal layer, an InGaAs crystal layer or the like as an object of it, and includes a process of forming a p-type III-V system compound semiconductor layer as using a compound containing carbon (C) as a dopant material for giving a p-type conductivity and further containing iodine (I) and hydrogen (H) as impurity.

公开(公告)号：US08604955B2

公开(公告)日：2013-12-10

申请号：US13005069

申请日：2011-01-12

申请人： Kazuaki Oishi ,  Shinji Yamaura

发明人： Kazuaki Oishi ,  Shinji Yamaura

IPC分类号： H03M1/00

CPC分类号： H04L27/04 ,  H03H7/0153 ,  H03H11/1252 ,  H03H11/1291 ,  H03H2210/025 ,  H03H2210/028 ,  H03H2210/036

摘要： In order to suppress the enlargement of the circuit layout area of an LSI together with the cost, even at the time when the variation width of the filter characteristic is narrow within a wide range, a filter varies an element value of at least one kind of elements (3), which determine a filter characteristic of the filter circuit, according to an output of the sigma-delta modulator (1), which sigma-delta modulates a digital code input (Code), according to an operation clock (CLK), or according to a signal through a decoder (4), which performs a code-conversion to an output of the sigma-delta modulator (1).

摘要翻译： 为了抑制LSI的电路布局面积的扩大以及成本的降低，即使在宽范围内的滤波器特性的变化幅度窄的情况下，滤波器也会变更至少一种 根据操作时钟（CLK）根据Σ-Δ调制器（1）的输出确定滤波器电路的滤波器特性的元件（3），该Σ-Δ调制器（1）的Σ-Δ调制数字代码输入（Code） ，或者根据通过解码器（4）的信号，该解码器执行对Σ-Δ调制器（1）的输出的代码转换。

公开(公告)号：US20110170628A1

公开(公告)日：2011-07-14

申请号：US13005069

申请日：2011-01-12

申请人： Kazuaki OISHI ,  Shinji Yamaura

发明人： Kazuaki OISHI ,  Shinji Yamaura

IPC分类号： H04L27/00 ,  H03M3/02

CPC分类号： H04L27/04 ,  H03H7/0153 ,  H03H11/1252 ,  H03H11/1291 ,  H03H2210/025 ,  H03H2210/028 ,  H03H2210/036

摘要： In order to suppress the enlargement of the circuit layout area of an LSI together with the cost, even at the time when the variation width of the filter characteristic is narrow within a wide range, a filter varies an element value of at least one kind of elements (3), which determine a filter characteristic of the filter circuit, according to an output of the sigma-delta modulator (1), which sigma-delta modulates a digital code input (Code), according to an operation clock (CLK), or according to a signal through a decoder (4), which performs a code-conversion to an output of the sigma-delta modulator (1).

摘要翻译： 为了抑制LSI的电路布局面积的扩大以及成本的降低，即使在宽范围内的滤波器特性的变化幅度窄的情况下，滤波器也会变更至少一种 根据操作时钟（CLK）根据Σ-Δ调制器（1）的输出确定滤波器电路的滤波器特性的元件（3），该Σ-Δ调制器（1）的Σ-Δ调制数字代码输入（Code） ，或者根据通过解码器（4）的信号，该解码器执行对Σ-Δ调制器（1）的输出的代码转换。

公开(公告)号：US5479028A

公开(公告)日：1995-12-26

申请号：US310761

申请日：1994-09-27

申请人： Takeshi Tomioka ,  Hideyasu Ando ,  Naoya Okamoto ,  Shinji Yamaura

发明人： Takeshi Tomioka ,  Hideyasu Ando ,  Naoya Okamoto ,  Shinji Yamaura

IPC分类号： H01L29/73 ,  H01L21/203 ,  H01L21/205 ,  H01L21/331 ,  H01L21/338 ,  H01L27/06 ,  H01L29/205 ,  H01L29/207 ,  H01L29/737 ,  H01L29/778 ,  H01L29/812 ,  H01L33/00

CPC分类号： H01L29/207 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02505 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02573 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02631 ,  H01L27/0605 ,  H01L29/66318

摘要： The invention relates to a method for manufacturing a III-V system compound semiconductor device, provides such a new C dopant as alkyl halide (CH.sub.2 I.sub.2 for example) containing carbon (C), iodine (I), and hydrogen (H) for giving a highly p-type conductivity to a GaAs crystal layer, an InGaAs crystal layer or the like as an object of it, and includes a process of forming a p-type III-V system compound semiconductor layer as using a compound containing carbon (C) as a dopant material for giving a p-type conductivity and further containing iodine (I) and hydrogen (H) as impurity.

摘要翻译： 本发明涉及一种制备III-V系化合物半导体器件的方法，提供了含有碳（C），碘（I）和氢（H）的烷基卤化物（例如，CH 2 I 2）等新的C掺杂剂， 作为其目的的GaAs晶体层，InGaAs晶体层等的高p型导电性，包括使用含有碳的化合物（C）形成p型III-V系化合物半导体层的工序， 作为用于赋予p型导电性且进一步含有碘（I）和氢（H））作为杂质的掺杂剂材料。