Signal amplitude comparator
    1.
    发明授权
    Signal amplitude comparator 有权
    信号幅度比较器

    公开(公告)号:US06664816B1

    公开(公告)日:2003-12-16

    申请号:US10207943

    申请日:2002-07-30

    IPC分类号: H03K5153

    CPC分类号: H03K5/153

    摘要: A signal amplitude comparator which includes a first input that receives an input signal and generates an output signal that is a non-linear function of the input signal, and a second input circuit that receives a reference input signal and generates a second output signal that generally tracks process, temperature and supply variation. The signal amplitude comparator also includes an amplifier, a filter and a comparator. The amplifier amplifies a signal difference between the first and second output signals and outputs a train of pulses if a peak of the input signal exceeds the reference input signal. A second reference signal is applied to the comparator which generates an output which indicates whether the input signal exceeds a pre-determined threshold value. The signal amplitude comparator also includes a pair of input amplifiers which receive and translate the input and reference input signals to levels suitable for the input circuits.

    摘要翻译: 一种信号幅度比较器,包括接收输入信号并产生作为输入信号的非线性函数的输出信号的第一输入端,以及接收参考输入信号并产生通常的第二输出信号的第二输入电路的信号幅度比较器 跟踪过程,温度和供应变化。 信号幅度比较器还包括放大器,滤波器和比较器。 放大器放大第一和第二输出信号之间的信号差,如果输入信号的峰值超过参考输入信号,则输出一串脉冲。 第二参考信号被施加到比较器,该比较器产生指示输入信号是否超过预定阈值的输出。 信号幅度比较器还包括一对输入放大器,其接收和平移输入和参考输入信号到适合于输入电路的电平。

    Distributed relocatable voltage regulator
    2.
    发明授权
    Distributed relocatable voltage regulator 有权
    分布式可重定位电压调节器

    公开(公告)号:US07373629B2

    公开(公告)日:2008-05-13

    申请号:US11113615

    申请日:2005-04-25

    IPC分类号: G06F17/50 G05F1/40

    CPC分类号: H01L27/11898 H01L27/0207

    摘要: An apparatus comprising an integrated circuit having (i) a number of regions each pre-diffused and configured to be metal-programmed and (ii) a plurality of pins configured to connect the integrated circuit to a socket. A logic portion may be implemented on the integrated circuit (i) configured to implement integrated circuit operations and (ii) having one or more I/O connections and one or more supply connections. A first group of the pre-diffused regions are metal-programmed and coupled to said I/O connections. A second group of the pre-diffused regions are metal-programmed and coupled to the supply connections.

    摘要翻译: 一种包括集成电路的装置,其具有(i)多个区域,每个区域预扩散并被配置为金属编程;以及(ii)多个引脚,被配置为将集成电路连接到插座。 逻辑部分可以在被配置为实现集成电路操作的集成电路(i)上实现,并且(ii)具有一个或多个I / O连接和一个或多个供电连接。 预扩散区域的第一组被金属编程并耦合到所述I / O连接。 第二组预扩散区域是金属编程的,并且耦合到电源连接。

    Method of interconnect for multi-slot metal-mask programmable relocatable function placed in an I/O region
    3.
    发明授权
    Method of interconnect for multi-slot metal-mask programmable relocatable function placed in an I/O region 失效
    用于多槽金属掩模可编程可重定位功能的互连方法放置在I / O区域中

    公开(公告)号:US07292063B2

    公开(公告)日:2007-11-06

    申请号:US11120067

    申请日:2005-05-02

    IPC分类号: G06F7/38 H01L25/00

    摘要: A method for interconnecting sub-functions of metal-mask programmable functions that includes the steps of (A) forming a base layer of a platform application specific integrated circuit (ASIC) comprising a plurality of pre-diffused regions disposed around a periphery of the platform ASIC, (B) forming two or more sub-functions of a function with a metal mask set placed over a number of the plurality of pre-diffused regions of the platform application specific integrated circuit and (C) configuring one or more connection points in each of the two or more sub-functions such that interconnections between the two or more sub-functions are tool routable in a single layer. Each of the pre-diffused regions is configured to be metal-programmable.

    摘要翻译: 一种用于互连金属掩模可编程功能的子功能的方法,其包括以下步骤:(A)形成平台应用专用集成电路(ASIC)的基层,所述平台专用集成电路(ASIC)包括围绕所述平台周围设置的多个预扩散区域 ASIC,(B)形成功能的两个或更多个子功能,其中金属掩模集放置在平台应用专用集成电路的多个预扩散区域的数量上,以及(C)配置一个或多个连接点 两个或更多个子功能中的每一个,使得两个或多个子功能之间的互连是可在单个层中可路由的工具。 每个预扩散区域被配置为金属可编程的。

    Magnetic tape drive having direct drive motor and extended head travel
    4.
    发明授权
    Magnetic tape drive having direct drive motor and extended head travel 失效
    磁带驱动器具有直接驱动电机和扩展头行程

    公开(公告)号:US5862009A

    公开(公告)日:1999-01-19

    申请号:US922508

    申请日:1997-09-03

    摘要: A magnetic tape drive having a motor with a magnetically shielded cavity or hole in one cover of the motor providing additional room for movement of a magnetic head. The cavity eliminates a mechanical interference problem, enabling direct drive of a roller (puck) combined with short overall drive height. In motors having an internal stator, some of the stator poles are eliminated and a magnetically shielded cavity is provided in the area where the stator poles are eliminated. In motors having an external stator, no stator modification is required and a shielded cavity provides access into an open area of the rotor. In addition, for motors having an external stator and sufficient magnetic shielding, a simple hole in one cover of the motor may be sufficient rather than a magnetically shielded cavity.

    摘要翻译: 一种磁带驱动器,其具有在电动机的一个盖中具有磁屏蔽空腔或孔的电机,为磁头的移动提供额外的空间。 该腔体消除了机械干扰问题,能够直接驱动滚子(圆盘),结合整体驱动高度短。 在具有内部定子的电动机中,消除了一些定子极,并且在定子极被消除的区域中设置有磁屏蔽腔。 在具有外部定子的电动机中,不需要定子修改,并且屏蔽腔提供进入转子的开放区域的通路。 此外,对于具有外部定子和足够的磁屏蔽的电动机,电动机的一个盖中的简单的孔可以是足够的,而不是磁屏蔽的腔。

    Circuits and methods for improved FET matching
    5.
    发明授权
    Circuits and methods for improved FET matching 有权
    改进FET匹配的电路和方法

    公开(公告)号:US08440512B2

    公开(公告)日:2013-05-14

    申请号:US13368985

    申请日:2012-02-08

    IPC分类号: H01L21/00

    摘要: The present inventions are related to systems and methods for pre-equalizer noise suppression in a data processing system. As an example, a data processing system is discussed that includes: a sample averaging circuit, a selector circuit, an equalizer circuit, and a mark detector circuit. The sample averaging circuit is operable to average corresponding data samples from at least a first read of a codeword and a second read of the codeword to yield an averaged output based at least in part on a framing signal. The selector circuit is operable to select one of the averaged output and the first read of the codeword as a selected output. The equalizer circuit is operable to equalize the selected output to yield an equalized output, and the mark detector circuit is operable to identify a location mark in the equalized output to yield the framing signal.

    摘要翻译: 本发明涉及用于数据处理系统中预均衡器噪声抑制的系统和方法。 作为示例,讨论了包括:采样平均电路,选择器电路,均衡器电路和标记检测器电路的数据处理系统。 采样平均电路可用于从码字的至少第一读取和码字的第二读取来平均对应的数据样本,以产生至少部分地基于成帧信号的平均输出。 选择器电路可操作以选择平均输出和码字的第一读取中的一个作为选择的输出。 均衡器电路可操作以均衡所选择的输出以产生均衡的输出,并且标记检测器电路可操作以识别均衡输出中的位置标记以产生成帧信号。

    Circuits and methods for improved FET matching
    6.
    发明授权
    Circuits and methods for improved FET matching 有权
    改进FET匹配的电路和方法

    公开(公告)号:US08134188B2

    公开(公告)日:2012-03-13

    申请号:US11838546

    申请日:2007-08-14

    IPC分类号: H01L29/80

    摘要: Various embodiments of the present invention provide circuits and methods for improved FET matching. As one example, such methods may include providing two or more transistors. Each of the transistors includes a channel that varies in cross-sectional width from the source to the drain, and the transistors are matched one to another.

    摘要翻译: 本发明的各种实施例提供了用于改进FET匹配的电路和方法。 作为一个示例,这样的方法可以包括提供两个或更多个晶体管。 每个晶体管包括从源极到漏极的截面宽度变化的沟道,并且晶体管彼此匹配。

    Hysteresis removal for positioning systems with variable backlash and
stiction
    8.
    发明授权
    Hysteresis removal for positioning systems with variable backlash and stiction 失效
    具有可变间隙和静摩擦的定位系统的滞后消除

    公开(公告)号:US5764018A

    公开(公告)日:1998-06-09

    申请号:US536295

    申请日:1995-09-29

    IPC分类号: G05D3/00 G05B19/40

    CPC分类号: G05B19/40

    摘要: A system and method for reducing non-repeatable positioning errors. Non-repeatable positioning errors caused by the effects stiction and backlash in the mechanical system are reduced by "shaking" or vibrating the positioning system in a controlled manner. After the system input is set to the desired value, the positioning system is "shaken" by inputting a series of offsets that oscillate around the desired location and gradually decrease in amplitude, eventually reaching zero. In a specific embodiment, a lead screw is threaded through a follower nut which is connected to a magnetic tape read/write head. The lead screw is rotated by a mechanical transmission which provides gear reduction from a computer controlled stepper motor. The tape head's non-repeatable positioning error is reduced by alternately stepping the stepper motor in opposite directions a specified number of steps and periodically reducing the specified number of steps until zero is eventually reached.

    摘要翻译: 一种用于减少不可重复定位误差的系统和方法。 通过以受控的方式“摆动”或振动定位系统来减少机械系统中的影响固定和反冲引起的不可重复的定位误差。 在将系统输入设置为所需值之后,通过输入一系列在期望位置周围振荡的偏移并逐渐减小振幅,最终达到零,使定位系统“摇动”。 在具体实施例中,导螺杆穿过连接到磁带读/写头的从动螺母。 导螺杆通过机械传动器旋转,该机械传动装置从计算机控制的步进电机提供齿轮减速。 通过将步进电机以相反的方向交替地步进指定数量的步骤,并且周期性地减少指定的步数,直到最终达到零,从而减少了磁带头的不可重复的定位误差。

    Tape guide for digital data tape mini-cartridge
    9.
    发明授权
    Tape guide for digital data tape mini-cartridge 失效
    数字数据磁带小型磁带导带

    公开(公告)号:US5716018A

    公开(公告)日:1998-02-10

    申请号:US768262

    申请日:1996-12-17

    IPC分类号: G11B23/087

    CPC分类号: G11B23/08757

    摘要: A tape guide for a digital tape mini-cartridge providing decreased tape wander in a direction transverse to the intended path. The guide provides an increased area of tape having increased transverse stiffness without interfering with an adjacent drive wheel. In one embodiment, the guide is cylindrical and has a cylindrical cut-out to provide clearance for an adjacent cylindrical drive wheel. Preferably, the guide has top and bottom flanges. If a top flange of the guide is present, the cut-out continues through the top flange of the guide. The top flange of the guide may be relatively thin to fit below a top flange of the adjacent drive wheel. Alternatively, the top flange of the guide may have a larger cut-out to avoid interference with the top flange.

    摘要翻译: 用于数字磁带小型磁带的磁带导轨,其提供减小的磁带在横向于预期路径的方向上漂移。 该引导件提供了具有增加的横向刚度而不干扰相邻驱动轮的带的增加区域。 在一个实施例中,导向件是圆柱形的并且具有圆柱形切口以为相邻的圆柱形驱动轮提供间隙。 优选地,导向件具有顶部和底部凸缘。 如果存在引导件的顶部凸缘,则切口将继续穿过引导件的顶部法兰。 引导件的顶部凸缘可以相对较薄,以配合在相邻驱动轮的顶部凸缘下方。 或者,引导件的顶部凸缘可以具有较大的切口以避免与顶部凸缘的干涉。

    Configurable I/Os for multi-chip modules
    10.
    发明授权
    Configurable I/Os for multi-chip modules 失效
    可配置的多芯片模块I / O

    公开(公告)号:US07259586B2

    公开(公告)日:2007-08-21

    申请号:US11115561

    申请日:2005-04-27

    IPC分类号: H03K19/173

    摘要: An apparatus comprising an integrated circuit and a logic portion. The integrated circuit may have a plurality of regions each (i) pre-diffused and configured to be metal-programmed and (ii) configured to connect the integrated circuit to a socket. The logic portion may be implemented on the integrated circuit. The plurality of metal programmable regions are each (i) independently programmable and (ii) located in one of said pre-diffused regions. Each of the metal programmable regions comprises (a) a regulator section configured to generate an operating voltage from a common supply voltage, (b) a logic section configured to implement integrated circuit functions and operate at the operating voltage, and (c) a level shifter configured to shift the operating voltage to an external voltage level.

    摘要翻译: 一种包括集成电路和逻辑部分的装置。 集成电路可以具有多个区域,每个区域(i)预扩散并被配置为金属编程,并且(ii)被配置为将集成电路连接到插座。 逻辑部分可以在集成电路上实现。 多个金属可编程区域各自(i)可独立编程,并且(ii)位于所述预扩散区域之一中。 每个金属可编程区域包括:(a)调节器部分,被配置为从公共电源电压产生工作电压,(b)逻辑部分,被配置为实现集成电路功能并在工作电压下工作,以及(c) 移位器被配置为将工作电压转换到外部电压电平。