公开(公告)号：US07153197B2

公开(公告)日：2006-12-26

申请号：US10140728

申请日：2002-05-07

申请人： Tsu Shih ,  Sa-Na Lee ,  Syun-Ming Jang ,  Chi-Weng Chung

发明人： Tsu Shih ,  Sa-Na Lee ,  Syun-Ming Jang ,  Chi-Weng Chung

IPC分类号： B24B1/00 ,  C23G1/02

CPC分类号： H01L21/3212 ,  B24B37/042 ,  H01L21/31683 ,  Y10S134/902

摘要： A method for removing a metal oxide overlayer over a target polishing surface in conjunction with a chemical mechanical polishing (CMP) process to improve polishing uniformity including providing a substrate target polishing surface having a layer of an oxide of a metal overlying said metal to be chemically mechanically polished; removing the layer of an oxide of the metal using an oxide removal solution prior to performing a CMP process with an abrasive slurry; and, polishing the target polishing surface according to an a CMP process with an abrasive slurry including at least one of an oxidizer and a complexing agent.

公开(公告)号：US06458689B2

公开(公告)日：2002-10-01

申请号：US09818714

申请日：2001-03-28

申请人： Chen-Hua Yu ,  Syun-Ming Jang ,  Tsu Shih ,  Anthony Yen ,  Jih-Chuyng Twu

发明人： Chen-Hua Yu ,  Syun-Ming Jang ,  Tsu Shih ,  Anthony Yen ,  Jih-Chuyng Twu

IPC分类号： H01L214763

CPC分类号： H01L21/0276 ,  H01L21/31144 ,  H01L21/3144 ,  H01L21/3145 ,  H01L21/7684 ,  Y10S438/97

摘要： A method forming a protective (SiON or PE-Ox) dielectric anti-reflective coating (DARC) over a dielectric layer after a chemical-mechanical polish dielectric layer planarization process and before a chemical-mechanical polish of a conductive layer used in a contact or via plug formation. A dielectric layer is chemical-mechanical polished thereby creating microscratches in the dielectric layer. The invention's protective SiON or PE-OX DARC layer is formed over the dielectric layer whereby the protective SiON or PE-OX DARC layer fills in the microscratches. A first opening is etched in he protective layer and the dielectric layer. A conductive layer is formed over the protective layer and fills the first opening. The conductive layer is chemical-mechanical polished to remove the conductive layer from over the protective layer and to form an interconnect filling the first opening. The protective SiON or PE-OX DARC layer is used as a CMP stop thereby preventing microscratches in the dielectric layer.

摘要翻译： 在化学机械抛光介质层平坦化工艺之后和用于接触的导电层的化学机械抛光之前，在电介质层上形成保护性（SiON或PE-Ox）电介质抗反射涂层（DARC）的方法或 通过插塞形成。 电介质层被化学机械抛光，从而在电介质层中形成微细结构。 本发明的保护性SiON或PE-OX DARC层形成在电介质层上，由此保护性SiON或PE-OX DARC层填充在微细凹槽中。 在其保护层和电介质层中蚀刻第一开口。 导电层形成在保护层上并填充第一开口。 导电层被化学机械抛光以从保护层上方移除导电层并形成填充第一开口的互连。 使用保护性SiON或PE-OX DARC层作为CMP阻挡层，从而防止电介质层中的微细纹。

公开(公告)号：US06409587B1

公开(公告)日：2002-06-25

申请号：US09713827

申请日：2000-11-15

申请人： Tsu Shih ,  Syun-Ming Jang ,  Ying-Ho Chen ,  Wen-Chih Chiou

发明人： Tsu Shih ,  Syun-Ming Jang ,  Ying-Ho Chen ,  Wen-Chih Chiou

IPC分类号： B24D1100

CPC分类号： B24D11/08 ,  B24B21/04 ,  B24B37/24 ,  G06T9/007

摘要： A composite, dual-hardness polishing pad for use in a linear chemical mechanical polishing apparatus and a method for forming the pad are described. In the composite, dual-hardness polishing pad, a pad body is first provided which has a leading edge and a trailing edge for mounting to a linear belt immediately adjacent to a second polishing pad. The pad body is fabricated of a material that has a first hardness, the leading edge contacts an object being polished on the composite polishing pad before the trailing edge when the linear belt turns in a linear polishing process. The composite polishing pad further includes a buffer pad that is adhesively joined to the leading edge of the pad body for contacting the object that is being polished, the buffer pad may be fabricated of a material that has a second hardness which is at least 20% smaller than the first hardness such that impact on the object being polished is minimized during a linear polishing process. The present invention is further directed to a method for adhesively joining a buffer pad to a pad body of a polishing pad.

摘要翻译： 描述了用于线性化学机械抛光装置的复合双硬度抛光垫和用于形成垫的方法。 在复合材料双硬度抛光垫中，首先提供具有前缘和后缘的垫体，用于安装在紧邻第二抛光垫的线性带上。 垫体由具有第一硬度的材料制成，当线性带在线性抛光过程中转动时，前缘在后缘之前在复合抛光垫上接触待抛光的物体。 所述复合抛光垫还包括缓冲垫，所述缓冲垫粘合地连接到所述垫体的前缘以接触被抛光的物体，所述缓冲垫可以由具有至少20％的第二硬度的材料制成， 小于第一硬度，使得在线性抛光工艺期间对被抛光物体的冲击最小化。 本发明还涉及一种用于将缓冲垫粘合地结合到抛光垫的衬垫体的方法。

公开(公告)号：US06358119B1

公开(公告)日：2002-03-19

申请号：US09336808

申请日：1999-06-21

申请人： Tsu Shih ,  Jih-Churng Twu ,  Ying-Ho Chen ,  Syun-Ming Jang

发明人： Tsu Shih ,  Jih-Churng Twu ,  Ying-Ho Chen ,  Syun-Ming Jang

IPC分类号： B24B100

CPC分类号： B24B37/12 ,  B24B37/015 ,  B24B55/02

摘要： The invention provides a method and an apparatus that prevent the accumulation of copper ions during CMP of copper lines by performing the CMP process at low temperatures and by maintaining this low temperature during the CMP process by adding a slurry that functions as a corrosion inhibitor.

摘要翻译： 本发明提供了一种方法和装置，其通过在低温下进行CMP工艺，并且通过添加用作腐蚀抑制剂的浆料在CMP工艺期间保持该低温来防止铜线的CMP中的铜离子的累积。

公开(公告)号：US06686284B2

公开(公告)日：2004-02-03

申请号：US10072244

申请日：2002-02-06

申请人： Chi-Wei Chung ,  Tung-Ching Tseng ,  Tsu Shih ,  Syun-Ming Jang

发明人： Chi-Wei Chung ,  Tung-Ching Tseng ,  Tsu Shih ,  Syun-Ming Jang

IPC分类号： H01L2100

CPC分类号： H01L21/3212 ,  B24B37/32 ,  B24B55/02 ,  H01L21/31053

摘要： A chemical mechanical polishing apparatus that is equipped with a chilled retaining ring and a method for using the apparatus are described. The retaining ring is mounted therein a heat transfer means such as a metal tube and flowing therethrough a heat exchanging fluid for carrying away heat from the wafer mounted in the retaining ring, resulting in a temperature reduction in the slurry solution that contacts the wafer. The present invention apparatus and method therefore reduces the delamination problem for low k dielectric materials during polishing and the wafer scratching problem.

摘要翻译： 描述了配备有冷冻保持环的化学机械抛光装置和使用该装置的方法。 保持环安装有诸如金属管的传热装置，并在其中流过用​​于从安装在保持环中的晶片携带热量的热交换流体，导致与晶片接触的浆液中的温度降低。 因此，本发明的装置和方法减少了抛光期间低k电介质材料和晶片划伤问题的分层问题。

公开(公告)号：US06620034B2

公开(公告)日：2003-09-16

申请号：US10043780

申请日：2002-01-14

申请人： Tsu Shih ,  Jih-Churng Jwu ,  Ying-Ho Chen ,  Syun-Ming Jang

发明人： Tsu Shih ,  Jih-Churng Jwu ,  Ying-Ho Chen ,  Syun-Ming Jang

IPC分类号： B24B100

CPC分类号： B24B37/12 ,  B24B37/015 ,  B24B55/02

摘要： The invention provides a method and an apparatus that prevent the accumulation of copper ions during CMP of copper lines by performing the CMP process at low temperatures and by maintaining this low temperature during the CMP process by adding a slurry that functions as a corrosion inhibitor.

摘要翻译： 本发明提供了一种方法和装置，其通过在低温下进行CMP工艺，并且通过添加用作腐蚀抑制剂的浆料在CMP工艺期间保持该低温来防止铜线的CMP中的铜离子的累积。

公开(公告)号：US06634930B1

公开(公告)日：2003-10-21

申请号：US09635013

申请日：2000-08-09

申请人： Ying-Ho Chen ,  Wen-Chih Chiou ,  Tsu Shih ,  Syun-Ming Jang ,  Chia-Ming Yang

发明人： Ying-Ho Chen ,  Wen-Chih Chiou ,  Tsu Shih ,  Syun-Ming Jang ,  Chia-Ming Yang

IPC分类号： B24B100

CPC分类号： B24B37/04 ,  B24B57/02

摘要： A method for preventing copper corrosion on a wafer during a chemical mechanical polishing process when the process is temporarily halted due to equipment malfunction and an apparatus for carrying out such method are disclosed. In the method, after the chemical mechanical polishing process is stopped for correcting equipment malfunction or any other processing problems, a cleaning solvent is sprayed toward the wafer surface to remove substantially all slurry solution from the surface to prevent corrosion of the copper layer, or other metal layer, by the slurry solution. The cleaning solvent may be sprayed from spray nozzles mounted around and juxtaposed to the polishing table onto which the polishing pad is mounted as long as the spray nozzles do not interfere with the rotation of the polishing pad.

摘要翻译： 本发明公开了一种在化学机械抛光工艺中由于设备故障暂时停止处理而在晶片上进行铜腐蚀的方法及其实施方法。 在该方法中，在化学机械抛光处理停止以纠正设备故障或任何其它处理问题之后，向晶片表面喷射清洗溶剂，以从表面去除基本上所有的浆液，以防止铜层或其它 金属层，通过浆料溶液。 只要喷嘴不干扰抛光垫的旋转，清洁溶剂可以从安装在其周围的喷嘴喷射并且并列在抛光台上，抛光垫安装在抛光台上。

公开(公告)号：US06620725B1

公开(公告)日：2003-09-16

申请号：US09395287

申请日：1999-09-13

申请人： Shau-Lin Shue ,  Ming-Hsing Tsai ,  Wen-Jye Tsai ,  Ying-Ho Chen ,  Tsu Shih ,  Jih-Churng Twu ,  Syun-Ming Jang

发明人： Shau-Lin Shue ,  Ming-Hsing Tsai ,  Wen-Jye Tsai ,  Ying-Ho Chen ,  Tsu Shih ,  Jih-Churng Twu ,  Syun-Ming Jang

IPC分类号： H01L214763

CPC分类号： H01L21/7684 ,  H01L21/3212

摘要： A process for performing CMP in two steps is described. After trenches have been formed and over-filled with copper, in a first embodiment of the invention a hard pad is used initially to remove most of the copper until a point is reached where dishing effects would begin to appear. A soft pad is then substituted and CMP continued until all copper has been removed, except in the trenches. In a second embodiment, CMP is initiated using a pad to which high-pressure is applied and which rotates relatively slowly. As before, this combination is used until the point is reached where dishing effects would begin to appear. Then, relatively low pressure in combination with relatively high rotational speed is used until all copper has been removed, except in the trenches. Both of these embodiments result in trenches which are just-filled with copper, with little or no dishing effects, and with all traces of copper removed everywhere except in the trenches themselves.

摘要翻译： 描述用于在两个步骤中执行CMP的过程。 在沟槽已经形成并且用铜过度填充之后，在本发明的第一实施例中，最初使用硬焊盘去除大部分铜，直到达到一个点，其中凹陷效应将开始出现。 然后取代软焊盘，继续CMP直到除了沟槽中除去所有的铜。 在第二实施例中，使用施加高压并且相对缓慢地旋转的衬垫来启动CMP。 如前所述，使用这种组合，直到达到点，其中凹陷效应将开始出现。 然后，除了沟槽之外，使用相对较低的压力结合相对高的转速直到除去所有的铜。 这两个实施例都导致刚好填充铜的沟槽，几乎没有凹陷效应，并且除了沟槽本身之外，所有痕迹的铜都被去除。

公开(公告)号：US06417106B1

公开(公告)日：2002-07-09

申请号：US09431150

申请日：1999-11-01

申请人： Jih-Churng Twu ,  Ying-Ho Chen ,  Tsu Shih ,  Syun-Ming Jang

发明人： Jih-Churng Twu ,  Ying-Ho Chen ,  Tsu Shih ,  Syun-Ming Jang

IPC分类号： H01L21302

CPC分类号： H01L21/7684 ,  H01L21/76829

摘要： A process for reducing dishing in damascene structures formed in low k organic dielectrics is described. A key feature is the insertion of a liner layer between the low k dielectric layer and the etch stop layer. The only requirement for the liner material is that it should have different etching characteristics from the etch stop material so that when trenches are etched in the dielectric they extend as far as the etch stop layer, in the normal way. When this is done it is found that dishing, after CMP, is significantly reduced, particularly for trench structures made up of multiple narrow trenches spaced close together.

摘要翻译： 描述了一种用于减少在低k有机电介质中形成的镶嵌结构中的凹陷的方法。 一个关键特征是在低k电介质层和蚀刻停止层之间插入衬里层。 衬垫材料的唯一要求是它应该具有与蚀刻停止材料不同的蚀刻特性，使得当在电介质中蚀刻沟槽时，它们以正常方式延伸到蚀刻停止层的最远处。 当这样做时，发现在CMP之后的凹陷显着减少，特别是对于由几个间隔得很近的窄沟槽组成的沟槽结构。

公开(公告)号：US5972798A

公开(公告)日：1999-10-26

申请号：US86775

申请日：1998-05-29

申请人： Syun-Ming Jang ,  Jui-Yu Chang ,  Chen-Hua Yu ,  Chung-Long Chang ,  Tsu Shih ,  Jeng-Horng Chen

发明人： Syun-Ming Jang ,  Jui-Yu Chang ,  Chen-Hua Yu ,  Chung-Long Chang ,  Tsu Shih ,  Jeng-Horng Chen

IPC分类号： H01L23/544 ,  H01L21/00

CPC分类号： H01L23/544 ,  H01L2223/5442 ,  H01L2223/54453 ,  H01L2223/54466 ,  H01L2924/0002 ,  Y10S438/942

摘要： Described is a novel method for the formation of topological features during the processing of a semiconductor wafer into integrated circuit devices. The present invention is most useful for those processes used to form advanced multilevel ultra-large scale integrated circuits where global planarization techniques, such as chemical mechanical polishing, is used. The present invention is applicable to all processes used to form modem high density, multilevel integrated circuits and without respect of the number of layers formed or materials used. In the present invention, a substrate is a semiconductor wafer or portion thereof, and is the material on which the described processes alter and the layers are formed.

摘要翻译： 描述了在将半导体晶片加工成集成电路器件期间形成拓扑特征的新颖方法。 本发明对于用于形成先进的多级超大规模集成电路的那些工艺是最有用的，其中使用诸如化学机械抛光的全局平面化技术。 本发明适用于用于形成调制解调器高密度多电平集成电路的所有方法，而不受所形成的层数或使用的材料的影响。 在本发明中，衬底是半导体晶片或其一部分，并且是所述工艺改变并形成层的材料。