公开(公告)号：US12040392B2

公开(公告)日：2024-07-16

申请号：US18075427

申请日：2022-12-06

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Wen Su ,  Ming-Hua Chang ,  Shui-Yen Lu

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/20 ,  H01L29/205 ,  H01L29/778

CPC classification number: H01L29/7786 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/7787

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a patterned mask on the buffer layer; using the patterned mask to remove the buffer layer for forming ridges and a damaged layer on the ridges; removing the damaged layer; forming a barrier layer on the ridges; and forming a p-type semiconductor layer on the barrier layer.

公开(公告)号：US20210249529A1

公开(公告)日：2021-08-12

申请号：US16809524

申请日：2020-03-04

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Wen Su ,  Ming-Hua Chang ,  Shui-Yen Lu

IPC: H01L29/778 ,  H01L29/205 ,  H01L29/20 ,  H01L29/66 ,  H01L29/06

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a patterned mask on the buffer layer; using the patterned mask to remove the buffer layer for forming ridges and a damaged layer on the ridges; removing the damaged layer; forming a barrier layer on the ridges; and forming a p-type semiconductor layer on the barrier layer.

公开(公告)号：US20180151685A1

公开(公告)日：2018-05-31

申请号：US15863990

申请日：2018-01-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Wen Su ,  Zhen Wu ,  Hsiao-Pang Chou ,  Chiu-Hsien Yeh ,  Shui-Yen Lu ,  Jian-Wei Chen

IPC: H01L29/51 ,  H01L29/66 ,  H01L29/423 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/40

CPC classification number: H01L29/512 ,  H01L21/82345 ,  H01L21/823462 ,  H01L27/088 ,  H01L29/401 ,  H01L29/4236 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/78

Abstract: A method of forming a semiconductor device includes the following steps. A substrate is provided, and the substrate has a first region. A barrier layer is then formed on the first region of the substrate. A first work function layer is formed on the barrier layer. An upper half portion of the first work function layer is converted into a non-volatile material layer. The non-volatile material layer is removed and a lower half portion of the first work function layer is kept.

公开(公告)号：US09761697B2

公开(公告)日：2017-09-12

申请号：US15196848

申请日：2016-06-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Jhen-Cyuan Li ,  Shui-Yen Lu

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H01L21/28 ,  H01L21/311 ,  H01L29/165

CPC classification number: H01L29/66795 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/28017 ,  H01L21/31116 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/785 ,  H01L29/7851

Abstract: A semiconductor device comprises a substrate, a gate structure and a gate spacer. The substrate has a semiconductor fin protruding from a surface of the substrate. The gate structure is disposed on the semiconductor fin. The gate spacer is disposed on sidewalls of the gate structure, wherein the gate spacer comprises a first material layer and a second material layer stacked with each other and both of these two material layers are directly in contact with the gate structure.

公开(公告)号：US20170243954A1

公开(公告)日：2017-08-24

申请号：US15047636

申请日：2016-02-19

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Jhen-Cyuan Li ,  Sheng-Hsu Liu ,  Shui-Yen Lu

IPC: H01L29/66 ,  H01L21/265 ,  H01L29/08

CPC classification number: H01L29/66795 ,  H01L21/26513 ,  H01L29/7848

Abstract: A method of forming a FinFET device includes following steps. First of all, a fin shaped structure is formed on a substrate. Then, a portion of the fin shaped structure is removed to form a first trench in the fin shaped structure. Next, a cover film is formed to partially cover surfaces of the first trench and to expose a portion of the fin shaped structure. Afterward, the exposed portion of the fin shaped structure is further removed to form a second trench under the first trench. Finally, a barrier layer is formed on surfaces of the second trench, thereby improving the current leakage issues.

公开(公告)号：US09627538B2

公开(公告)日：2017-04-18

申请号：US14509449

申请日：2014-10-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yen-Liang Wu ,  Yu-Cheng Tung ,  Jhen-Cyuan Li ,  Shui-Yen Lu

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L21/762

CPC classification number: H01L29/7851 ,  H01L21/76224 ,  H01L21/76229 ,  H01L29/0649 ,  H01L29/66795 ,  H01L29/7848

Abstract: A fin field effect transistor (FinFET) with improved electrical performance and a method of manufacturing the same are disclosed. A FinFET includes a substrate having a top surface and an insulation. At least a recessed fin is extended upwardly from the top surface of the substrate, and at least a gate stack is formed above the substrate, wherein the gate stack is extended perpendicularly to an extending direction of the recessed fin, and the recessed fin is outside the gate stack. The insulation includes a lateral portion adjacent to the recessed fin, and a central portion contiguous to the lateral portion, wherein a top surface of the lateral portion is higher than a top surface of the central portion. A top surface of the recessed fin is lower than the top surface of the central portion of the insulation.

公开(公告)号：US09443741B1

公开(公告)日：2016-09-13

申请号：US14748257

申请日：2015-06-24

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Wen Su ,  Zhi-Jian Wang ,  Cheng-Chang Wu ,  Hsin-Yu Hsieh ,  Shui-Yen Lu

IPC: H01L21/302 ,  H01L21/461 ,  H01L21/308

CPC classification number: H01L21/0271 ,  H01L21/31055 ,  H01L21/31058

Abstract: An etching method includes forming a high density structure and a low density structure on a substrate. A first material layer is formed to cover both structures. Part of the low density structure is exposed through the first material layer. A second material layer is formed to cover the first material layer. The second material layer is etched to remove the second material layer on the high density structure and part of the second material layer on the low density structure. The first material layer on the high density structure and the second material layer on the low density structure are simultaneously etched. The first material layer is etched to expose a first portion of the high density structure and a second portion of the low density structure. Finally, the first portion and the second portion are removed.

Abstract translation: 蚀刻方法包括在基板上形成高密度结构和低密度结构。 形成第一材料层以覆盖两个结构。 低密度结构的一部分通过第一材料层暴露。 形成第二材料层以覆盖第一材料层。 蚀刻第二材料层以去除高密度结构上的第二材料层和低密度结构上的第二材料层的一部分。 同时蚀刻高密度结构上的第一材料层和低密度结构上的第二材料层。 蚀刻第一材料层以暴露高密度结构的第一部分和低密度结构的第二部分。 最后，去除第一部分和第二部分。

公开(公告)号：US09419109B2

公开(公告)日：2016-08-16

申请号：US14556690

申请日：2014-12-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Jhen-Cyuan Li ,  Shui-Yen Lu

IPC: H01L21/00 ,  H01L21/02 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/66795 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/28017 ,  H01L21/31116 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/785 ,  H01L29/7851

Abstract: A semiconductor device comprises a substrate, a gate structure and a gate spacer. The substrate has a semiconductor fin protruding from a surface of the substrate. The gate structure is disposed on the semiconductor fin. The gate spacer is disposed on sidewalls of the gate structure, wherein the gate spacer comprises a first material layer and a second material layer stacked with each other and both of these two material layers are directly in contact with the gate structure.

Abstract translation: 半导体器件包括衬底，栅极结构和栅极间隔物。 衬底具有从衬底的表面突出的半导体鳍片。 栅极结构设置在半导体鳍片上。 栅极间隔物设置在栅极结构的侧壁上，其中栅极间隔物包括彼此堆叠的第一材料层和第二材料层，并且这两个材料层都直接与栅极结构接触。

公开(公告)号：US20160190011A1

公开(公告)日：2016-06-30

申请号：US14608208

申请日：2015-01-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Jhen-Cyuan Li ,  Shui-Yen Lu

IPC: H01L21/8234 ,  H01L21/311 ,  H01L21/762 ,  H01L23/29 ,  H01L29/06 ,  H01L27/088 ,  H01L23/31 ,  H01L21/02 ,  H01L29/78

CPC classification number: H01L21/823431 ,  H01L21/76224 ,  H01L27/0886 ,  H01L29/0653 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An epitaxial process includes the following step for forming a fin-shaped field effect transistor. A plurality of fin structures are formed on a substrate and a passivation layer is formed on the substrate between the fin structures. An epitaxial structure is formed on each of the fin structures. The present invention also provides an epitaxial structure formed by said epitaxial process. The epitaxial structure includes a plurality of fin structures, a passivation layer and an epitaxial structure. The fin structures are located on a substrate. The passivation layer is disposed on the substrate between the fin structures. The epitaxial structure is disposed on each of the fin structures.

Abstract translation: 外延工艺包括用于形成鳍状场效应晶体管的以下步骤。 在基板上形成多个翅片结构，并且在翅片结构之间的基板上形成钝化层。 在每个翅片结构上形成外延结构。 本发明还提供了由所述外延工艺形成的外延结构。 外延结构包括多个翅片结构，钝化层和外延结构。 翅片结构位于基底上。 钝化层设置在翅片结构之间的衬底上。 外延结构设置在每个翅片结构上。

公开(公告)号：US20230100904A1

公开(公告)日：2023-03-30

申请号：US18075433

申请日：2022-12-06

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Wen Su ,  Ming-Hua Chang ,  Shui-Yen Lu

IPC: H01L29/778 ,  H01L29/205 ,  H01L29/06 ,  H01L29/66 ,  H01L29/20

Abstract: A high electron mobility transistor (HEMT) includes a buffer layer on a substrate, ridges extending along a first direction on the buffer layer, gaps extending along the first direction between the ridges, a p-type semiconductor layer extending along a second direction on the ridges and inserted into the gaps, and a source electrode and a drain electrode adjacent to two sides of the p-type semiconductor layer. Preferably, the source electrode and the drain electrode are extending along the second direction and directly on top of the ridges.