利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

26 条记录 (耗时 0.018 秒)

    NON-PLANAR TRANSISTOR
    2.
    发明申请
    NON-PLANAR TRANSISTOR 审中-公开

    公开(公告)号：US20170179292A1

    公开(公告)日：2017-06-22

    申请号：US15447134

    申请日：2017-03-02

    申请人： UNITED MICROELECTRONICS CORP.

    发明人： Jhen-Cyuan Li ,  Nan-Yuan Huang ,  Shui-Yen Lu

    IPC分类号： H01L29/78 ,  H01L29/165 ,  H01L29/66 ,  H01L29/06

    CPC分类号： H01L29/7853 ,  H01L29/0653 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7851

    摘要： A non-planar transistor is provided. It includes a substrate, a fin structure, a gate structure, a first spacer structure and a source/drain region. The fin structure is disposed on the substrate, the gate structure is disposed on the fin structure. The fin structure includes an upper portion, a concave portion and a lower portion, and the concave portion is disposed between the upper portion and the lower portion. The first spacer structure is disposed on a sidewall of the gate structure. The first spacer structure includes a first spacer and a second spacer, wherein the first spacer is disposed between the second spacer, and a height of the first spacer is different from a height of the second spacer. The source/drain region is disposed in a semiconductor layer at two sides of the first spacer structure.

    METHOD OF FORMING RECESS STRUCTURE
    3.
    发明申请
    METHOD OF FORMING RECESS STRUCTURE 审中-公开
    形成结构的方法

    公开(公告)号：US20160163829A1

    公开(公告)日：2016-06-09

    申请号：US14558746

    申请日：2014-12-03

    申请人： UNITED MICROELECTRONICS CORP.

    发明人： Kuan-Hsuan Ku ,  Jhen-Cyuan Li ,  Shui-Yen Lu

    IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L21/308 ,  H01L21/311 ,  H01L21/3065

    CPC分类号： H01L29/66795 ,  H01L21/3065 ,  H01L21/3086 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/823431 ,  H01L29/7851

    摘要： The present invention is a method of forming a recess structure. First of all, a substrate is provided, and a first ARC layer is entirely formed on the substrate, covering a first region and a second region thereof. Then, the first ARC layer in the second region is etched with a CH-based gas. Then, a first removing process is performed to form a first recess in the second region. Next, a second ARC layer is entirely formed on the substrate, covering the first region and the second region. Then, the second ARC layer in the first region is etched, also with the CH-based gas, and the CH-based gas includes at least one of CH4, C2H4, C3H6, CHF3, CH2F2, and CH3F. Finally, a second removing process is performed to form a second recess in the first region.

    摘要翻译： 本发明是一种形成凹陷结构的方法。 首先，提供基板，并且第一ARC层完全形成在基板上，覆盖其第一区域和第二区域。 然后，用基于CH的气体蚀刻第二区域中的第一ARC层。 然后，执行第一去除处理以在第二区域中形成第一凹部。 接下来，第二ARC层完全形成在基板上，覆盖第一区域和第二区域。 然后，也蚀刻第一区域中的第二ARC层，并且基于CH的气体，CH基气体包括CH 4，C 2 H 4，C 3 H 6，CHF 3，CH 2 F 2和CH 3 F中的至少一种。 最后，执行第二移除处理以在第一区域中形成第二凹部。

    SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
    4.
    发明申请
    SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF 有权
    半导体结构及其制造方法

    公开(公告)号：US20160126334A1

    公开(公告)日：2016-05-05

    申请号：US14562782

    申请日：2014-12-08

    申请人： UNITED MICROELECTRONICS CORP.

    发明人： Jhen-Cyuan Li ,  Shui-Yen Lu ,  Yen-Liang Wu

    IPC分类号： H01L29/66 ,  H01L29/78

    CPC分类号： H01L29/66795 ,  H01L21/31116 ,  H01L29/6656 ,  H01L29/7848 ,  H01L29/785

    摘要： The present invention provides a semiconductor structure, including a substrate, having a fin structure disposed thereon, a gate structure, crossing over parts of the fin structure. The top surface of the fin structure which is covered by the gate structure is defined as a first top surface, and the top surface of the fin structure which is not covered by the gate structure is defined as a second top surface. The first top surface is higher than the second top surface, and a spacer covers the sidewalls of the gate structure. The spacer includes an inner spacer and an outer spacer, and the outer pacer further contacts the second top surface of the fin structure directly.

    摘要翻译： 本发明提供一种半导体结构，其包括具有设置在其上的翅片结构的基板，栅极结构，跨越鳍片结构的一部分。 由栅极结构覆盖的翅片结构的上表面被定义为第一顶表面，并且未被栅极结构覆盖的翅片结构的顶表面被定义为第二顶表面。 第一顶表面高于第二顶表面，间隔件覆盖栅结构的侧壁。 间隔件包括内隔离件和外间隔件，并且外起重器还直接接触翅片结构的第二顶表面。

    Non-planar transistor
    5.
    发明授权
    Non-planar transistor 有权

    公开(公告)号：US10170624B2

    公开(公告)日：2019-01-01

    申请号：US15447134

    申请日：2017-03-02

    申请人： UNITED MICROELECTRONICS CORP.

    发明人： Jhen-Cyuan Li ,  Nan-Yuan Huang ,  Shui-Yen Lu

    IPC分类号： H01L29/06 ,  H01L29/78 ,  H01L29/66 ,  H01L29/165

    摘要： A non-planar transistor is provided. It includes a substrate, a fin structure, a gate structure, a first spacer structure and a source/drain region. The fin structure is disposed on the substrate, the gate structure is disposed on the fin structure. The fin structure includes an upper portion, a concave portion and a lower portion, and the concave portion is disposed between the upper portion and the lower portion. The first spacer structure is disposed on a sidewall of the gate structure. The first spacer structure includes a first spacer and a second spacer, wherein the first spacer is disposed between the second spacer, and a height of the first spacer is different from a height of the second spacer. The source/drain region is disposed in a semiconductor layer at two sides of the first spacer structure.

    MONITOR PROCESS FOR LITHOGRAPHY AND ETCHING PROCESSES
    8.
    发明申请
    MONITOR PROCESS FOR LITHOGRAPHY AND ETCHING PROCESSES 审中-公开
    监测和蚀刻过程的监测过程

    公开(公告)号：US20170005015A1

    公开(公告)日：2017-01-05

    申请号：US14791241

    申请日：2015-07-02

    申请人： United Microelectronics Corp.

    发明人： Jhen-Cyuan Li ,  Yi-Lin Chen ,  Shui-Yen Lu

    IPC分类号： H01L21/66 ,  H01L21/027 ,  H01L21/306 ,  H01L23/544 ,  H01L21/8238

    CPC分类号： H01L22/12 ,  G03F7/70633 ,  H01L21/0274 ,  H01L21/8238 ,  H01L23/544 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/5446

    摘要： A monitor process for lithography and etching processes includes the following steps. A first lithography process and a first etching process are performed to define a first alignment mark having a first direction portion orthogonal to a second direction portion. A second lithography process is performed to overlap a part of the first direction portion as well as a part of the second direction portion, thereby maintaining an exposed area of the first alignment mark having a first corresponding direction portion and a second corresponding direction portion. A first critical dimension of the first corresponding direction portion and a second critical dimension of the second corresponding direction portion are measured.

    摘要翻译： 用于光刻和蚀刻工艺的监测方法包括以下步骤。 执行第一光刻处理和第一蚀刻处理以限定具有与第二方向部分正交的第一方向部分的第一对准标记。 执行第二光刻处理以与第一方向部分的一部分以及第二方向部分的一部分重叠，从而保持第一对准标记的暴露区域具有第一对应方向部分和第二对应方向部分。 测量第一对应方向部分的第一临界尺寸和第二对应方向部分的第二临界尺寸。

    NON-PLANAR TRANSISTOR AND METHOD OF FORMING THE SAME
    9.
    发明申请
    NON-PLANAR TRANSISTOR AND METHOD OF FORMING THE SAME 有权
    非平面晶体管及其形成方法

    公开(公告)号：US20160336451A1

    公开(公告)日：2016-11-17

    申请号：US14741464

    申请日：2015-06-17

    申请人： UNITED MICROELECTRONICS CORP.

    发明人： Jhen-Cyuan Li ,  Nan-Yuan Huang ,  Shui-Yen Lu

    IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L29/06

    CPC分类号： H01L29/7853 ,  H01L29/0653 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7851

    摘要： A non-planar transistor is provided. It includes a substrate, a fin structure, a gate structure, a spacer structure and a source/drain region. The fin structure is disposed on the substrate, the gate structure is disposed on the fin structure. The spacer structure is disposed on a sidewall of the gate structure. The spacer structure includes a first spacer with a first height and a second spacer with a second height, wherein the first spacer is disposed between the second spacer, and the first height is different from the second height. The source/drain region is disposed in a semiconductor layer at two sides of the spacer structure. The present invention further provides a method of forming the same.

    摘要翻译： 提供非平面晶体管。 它包括衬底，翅片结构，栅极结构，间隔结构和源极/漏极区域。 翅片结构设置在基板上，栅极结构设置在翅片结构上。 间隔结构设置在栅极结构的侧壁上。 间隔结构包括具有第一高度的第一间隔件和具有第二高度的第二间隔件，其中第一间隔件设置在第二间隔件之间，第一高度不同于第二高度。 源极/漏极区域设置在间隔结构的两侧的半导体层中。 本发明还提供一种形成该方法的方法。