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公开(公告)号：US20220199438A1
公开(公告)日：2022-06-23
申请号：US17691042
申请日：2022-03-09
发明人： Hsiu-Mei Yu , Wei-Chan Chang , Chang-Sheng Lin , Chun-Yi Wu
IPC分类号： H01L21/673 , H01L23/495
摘要： A method of forming dice includes the following steps. First, a wafer structure is provides, which includes a substrate and a stack of semiconductor layers disposed in die regions and a scribe line region. Then, the substrate and the stack of the semiconductor layers in the scribe line region are removed to form a groove in the substrate. After the formation of the groove, the substrate is further thinned to obtain the substrate with a reduced thickness. Finally, a separation process is performed on the substrate with the reduced thickness.
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公开(公告)号：US11810804B2
公开(公告)日：2023-11-07
申请号：US17691042
申请日：2022-03-09
发明人： Hsiu-Mei Yu , Wei-Chan Chang , Chang-Sheng Lin , Chun-Yi Wu
IPC分类号： H01L21/02 , H01L21/673 , H01L23/495 , H01L21/302
CPC分类号： H01L21/67356 , H01L21/67346 , H01L23/49513 , H01L21/302
摘要： A method of forming dice includes the following steps. First, a wafer structure is provides, which includes a substrate and a stack of semiconductor layers disposed in die regions and a scribe line region. Then, the substrate and the stack of the semiconductor layers in the scribe line region are removed to form a groove in the substrate. After the formation of the groove, the substrate is further thinned to obtain the substrate with a reduced thickness. Finally, a separation process is performed on the substrate with the reduced thickness.
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公开(公告)号：US11588036B2
公开(公告)日：2023-02-21
申请号：US17095710
申请日：2020-11-11
发明人： Hsiu-Mei Yu , Cheng-Yi Hsieh , Wei-Chan Chang , Chang-Sheng Lin , Chun-Yi Wu
IPC分类号： H01L29/423 , H01L23/14 , H01L27/088 , H01L23/488 , H01L29/417 , H01L23/532
摘要： A chip structure includes a substrate, a bottom conductive layer, a semiconductor layer, an interlayer dielectric layer, at least one electrode, and at least one top electrode. The substrate includes in order a core layer and a composite material. The bottom conductive layer is disposed on the bottom surface of the core layer, the semiconductor layer is disposed on the substrate, and an interlayer dielectric layer is disposed on the semiconductor layer. The at least one electrode is disposed between the semiconductor layer and the interlayer dielectric layer, and the at least one top electrode is disposed on the interlayer dielectric layer and electrically coupled to the at least one electrode.
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公开(公告)号：US20210358786A1
公开(公告)日：2021-11-18
申请号：US15931599
申请日：2020-05-14
发明人： Hsiu-Mei Yu , Wei-Chan Chang , Chang-Sheng Lin , Chun-Yi Wu
IPC分类号： H01L21/673 , H01L23/495
摘要： A method of forming dice includes the following steps. First, a wafer structure is provides, which includes a substrate and a stack of semiconductor layers disposed in die regions and a scribe line region. Then, the substrate and the stack of the semiconductor layers in the scribe line region are removed to forma groove in the substrate. After the formation of the groove, the substrate is further thinned to obtain the substrate with a reduced thickness. Finally, a separation process is performed on the substrate with the reduced thickness.
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公开(公告)号：US12131973B2
公开(公告)日：2024-10-29
申请号：US17847632
申请日：2022-06-23
IPC分类号： H01L23/367 , H01L21/02 , H01L21/28 , H01L21/48
CPC分类号： H01L23/3672 , H01L21/02266 , H01L21/28194 , H01L21/4828
摘要： A semiconductor device includes: a substrate; a seed layer disposed on the substrate; a compound semiconductor stack layer disposed on the seed layer; and a source metal layer and a drain metal layer disposed on the compound semiconductor stack layer. The semiconductor device further includes a conductive layer at least partially covering the source metal layer and the drain metal layer, and covering opposing side surfaces of the seed layer and opposing side surfaces of the compound semiconductor stack layer. The conductive layer electrically connects the seed layer and the source metal layer.
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公开(公告)号：US11133246B1
公开(公告)日：2021-09-28
申请号：US16827953
申请日：2020-03-24
发明人： Chih-Yen Chen , Hsin-Chang Tsai , Chun-Yi Wu , Chia-Ching Huang , Chih-Jen Hsiao , Wei-Chan Chang , Francois Hebert
IPC分类号： H01L23/498 , H01L23/15
摘要： A semiconductor structure is provided. The semiconductor structure includes a base, a seed layer, a compound semiconductor layer, a gate structure, a source structure, a drain structure, and a conductive paste. The seed layer is disposed on the base. The compound semiconductor layer is disposed on the seed layer. The gate structure is disposed on the compound semiconductor layer. The source structure and the drain structure are disposed on both sides of the gate structure. In addition, the conductive paste is disposed between the base and a lead frame, and the conductive paste extends to the side surface of the base.
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公开(公告)号：US11935878B2
公开(公告)日：2024-03-19
申请号：US17471691
申请日：2021-09-10
IPC分类号： H01L23/02 , H01L23/00 , H01L23/31 , H01L23/498 , H01L25/00 , H01L25/065 , H01L25/11
CPC分类号： H01L25/115 , H01L23/3128 , H01L23/49816 , H01L24/05 , H01L24/13 , H01L24/48 , H01L24/97 , H01L25/0655 , H01L25/50 , H01L2224/48227 , H01L2924/15311 , H01L2924/181
摘要： A method for manufacturing a package structure includes providing a carrier board; providing at least one die having a top surface, a bottom surface, and a side surface on the carrier board; and forming a protective layer to cover at least a portion of the side surface of the die. The die includes a substrate, a semiconductor layer, a gate structure, a source structure and a drain structure, at least one dielectric layer, and at least one pad. The semiconductor layer is disposed on the substrate. The gate structure is disposed on the semiconductor layer. The source and the drain structures are disposed on opposite sides of the gate structure. The dielectric layer covers the gate, source, and drain structures. The pad is disposed on the dielectric layer and penetrates through the dielectric layer to electrically contact with the gate, source or drain structure.
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公开(公告)号：US20220149170A1
公开(公告)日：2022-05-12
申请号：US17095710
申请日：2020-11-11
发明人： Hsiu-Mei Yu , Cheng-Yi Hsieh , Wei-Chan Chang , Chang-Sheng Lin , Chun-Yi Wu
IPC分类号： H01L29/423 , H01L23/14 , H01L29/417 , H01L23/488 , H01L27/088
摘要： A chip structure includes a substrate, a bottom conductive layer, a semiconductor layer, an interlayer dielectric layer, at least one electrode, and at least one top electrode. The substrate includes in order a core layer and a composite material. The bottom conductive layer is disposed on the bottom surface of the core layer, the semiconductor layer is disposed on the substrate, and an interlayer dielectric layer is disposed on the semiconductor layer. The at least one electrode is disposed between the semiconductor layer and the interlayer dielectric layer, and the at least one top electrode is disposed on the interlayer dielectric layer and electrically coupled to the at least one electrode.
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公开(公告)号：US11309201B2
公开(公告)日：2022-04-19
申请号：US15931599
申请日：2020-05-14
发明人： Hsiu-Mei Yu , Wei-Chan Chang , Chang-Sheng Lin , Chun-Yi Wu
IPC分类号： H01L29/778 , H01L21/673 , H01L23/495 , H01L21/302
摘要： A method of forming dice includes the following steps. First, a wafer structure is provides, which includes a substrate and a stack of semiconductor layers disposed in die regions and a scribe line region. Then, the substrate and the stack of the semiconductor layers in the scribe line region are removed to forma groove in the substrate. After the formation of the groove, the substrate is further thinned to obtain the substrate with a reduced thickness. Finally, a separation process is performed on the substrate with the reduced thickness.
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