High Threshold Voltage NMOS Transistors For Low Power IC Technology
    1.
    发明申请
    High Threshold Voltage NMOS Transistors For Low Power IC Technology 有权
    用于低功率IC技术的高阈值电压NMOS晶体管

    公开(公告)号:US20100237425A1

    公开(公告)日:2010-09-23

    申请号:US12727312

    申请日:2010-03-19

    IPC分类号: H01L27/092 H01L21/8238

    摘要: Transistors exhibiting different electrical characteristics such as different switching threshold voltage or different leakage characteristics are formed on the same chip or wafer by selectively removing a film or layer which can serve as an out-diffusion sink for an impurity region such as a halo implant and out-diffusing an impurity such as boron into the out-diffusion sink, leaving the impurity region substantially intact where the out-diffusion sink has been removed. In forming CMOS integrated circuits, such a process allows substantially optimal design for both low-leakage and low threshold transistors and allows a mask and additional associated processes to be eliminated, particularly where a tensile film is employed to increase electron mobility since the tensile film can be removed from selected NMOS transistors concurrently with removal of the tensile film from PMOS transistors.

    摘要翻译: 通过选择性地去除可以用作杂质区域的外扩散阱的膜或层,形成具有不同电特性的晶体管,例如不同的开关阈值电压或不同的泄漏特性在相同的芯片或晶片上, 将诸如硼之类的杂质引入扩散槽中,使外扩散槽已经被去除时留下杂质区域基本完整。 在形成CMOS集成电路中,这种工艺允许低泄漏和低阈值晶体管的基本上最佳设计,并允许消除掩模和附加的相关工艺,特别是在使用拉伸膜来增加电子迁移率的情况下,因为拉伸膜可以 从PMOS晶体管去除拉伸膜同时从选定的NMOS晶体管中去除。

    Semiconductor embedded resistor generation
    3.
    发明授权
    Semiconductor embedded resistor generation 有权
    半导体嵌入式电阻器生成

    公开(公告)号:US08012821B2

    公开(公告)日:2011-09-06

    申请号:US12364764

    申请日:2009-02-03

    IPC分类号: H01L21/8238

    摘要: Generating an embedded resistor in a semiconductor device includes forming a shallow trench isolation (STI) region in a substrate; forming a pad oxide on the STI region and substrate; depositing a silicon layer on the pad oxide; forming a photo-resist mask on a portion of the silicon layer disposed above the STI region; etching the silicon layer to yield a polyconductor above the STI region; oxidizing the polyconductor; depositing an oxide material or a metal gate material on the oxidized surface; depositing a silicon layer on the oxide material or metal gate material; depositing additional silicon on a portion of the silicon layer above the STI region; patterning a transistor gate with a photo-resist mask on another portion of the silicon layer away from the STI region; and etching the silicon layer to yield a transistor structure away from the STI region and a resistor structure above the STI region.

    摘要翻译: 在半导体器件中产生嵌入式电阻器包括在衬底中形成浅沟槽隔离(STI)区域; 在STI区和衬底上形成衬垫氧化物; 在衬垫氧化物上沉积硅层; 在设置在STI区域上方的硅层的一部分上形成光刻胶掩模; 蚀刻硅层以在STI区域上方产生多导体; 氧化多导体; 在氧化表面上沉积氧化物材料或金属栅极材料; 在氧化物材料或金属栅极材料上沉积硅层; 在STI区域上方的硅层的一部分上沉积附加的硅; 在硅层的远离STI区域的另一部分上形成具有光致抗蚀剂掩模的晶体管栅极; 并蚀刻硅层以产生远离STI区域的晶体管结构和在STI区域上方的电阻器结构。

    SEMICONDUCTOR EMBEDDED RESISTOR GENERATION
    4.
    发明申请
    SEMICONDUCTOR EMBEDDED RESISTOR GENERATION 有权
    半导体嵌入式电阻发生器

    公开(公告)号:US20100197106A1

    公开(公告)日:2010-08-05

    申请号:US12364764

    申请日:2009-02-03

    IPC分类号: H01L21/76 G06F17/50

    摘要: A method for generating an embedded resistor in a semiconductor device and related computer-readable storage medium are provided, the method and program steps of the medium including forming a shallow trench isolation (STI) region in a substrate; forming a pad oxide on the STI region and substrate; depositing a silicon layer on the pad oxide; forming a photo-resist mask on a portion of the silicon layer disposed substantially above the STI region.; etching the silicon layer to yield a polyconductor (PC) disposed substantially above the STI region; oxidizing the PC; depositing at least one of an oxide material or a metal gate material on the oxidized surface; depositing a silicon layer on the at least one oxide material or metal gate material; depositing additional silicon on a portion of the silicon layer disposed substantially above the STI region; patterning a transistor gate with a photo-resist mask disposed on another portion of the silicon layer disposed substantially away from the STI region; and etching the silicon layer to yield at least one transistor structure disposed substantially away from the STI region and at least one resistor structure disposed substantially above the STI region.

    摘要翻译: 提供了一种用于在半导体器件和相关的计算机可读存储介质中产生嵌入式电阻器的方法,所述介质的方法和程序步骤包括在衬底中形成浅沟槽隔离(STI)区域; 在STI区和衬底上形成衬垫氧化物; 在衬垫氧化物上沉积硅层; 在基本上位于STI区域上方的硅层的一部分上形成光刻胶掩模; 蚀刻硅层以产生基本上位于STI区域上方的多导体(PC); 氧化PC; 在氧化表面上沉积氧化物材料或金属栅极材料中的至少一种; 在所述至少一种氧化物材料或金属栅极材料上沉积硅层; 在基本上位于STI区域上方的硅层的一部分上沉积附加的硅; 图案化具有设置在基本上远离STI区域设置在硅层的另一部分上的光致抗蚀剂掩模的晶体管栅极; 并且蚀刻所述硅层以产生基本上远离所述STI区域布置的至少一个晶体管结构以及基本上设置在所述STI区域上的至少一个电阻器结构。

    Bioconjugates of synthetic apelin polypeptides
    6.
    发明授权
    Bioconjugates of synthetic apelin polypeptides 有权
    合成apelin多肽的生物缀合物

    公开(公告)号:US09340582B2

    公开(公告)日:2016-05-17

    申请号:US14336290

    申请日:2014-07-21

    摘要: The invention provides a bioconjugates comprising a synthetic polypeptide of Formula I′ (SEQ ID NO: 1): or an amide, an ester or a salt thereof, wherein X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12 and X13 are defined herein and a half-life extending moiety wherein the peptide and the half-life extending moiety are covalently linked or fuse, optionally via a linker. The polypeptides are agonist of the APJ receptor. The invention also relates to a method for manufacturing the bioconjugates of the invention, and its therapeutic uses such as treatment or prevention of acute decompensated heart failure (ADHF), chronic heart failure, pulmonary hypertension, atrial fibrillation, Brugada syndrome, ventricular tachycardia, atherosclerosis, hypertension, restenosis, ischemic cardiovascular diseases, cardiomyopathy, cardiac fibrosis, arrhythmia, water retention, diabetes (including gestational diabetes), obesity, peripheral arterial disease, cerebrovascular accidents, transient ischemic attacks, traumatic brain injuries, amyotrophic lateral sclerosis, burn injuries (including sunburn) and preeclampsia. The present invention further provides a combination of pharmacologically active agents and a pharmaceutical composition.

    摘要翻译: 本发明提供包含式I'(SEQ ID NO:1)的合成多肽的生物缀合物或其酰胺,其酯或其盐,其中X 1,X 2,X 3,X 4,X 5,X 6,X 7,X 8,X 9 ,X10,X11,X12和X13在本文中定义并且半衰期延长部分,其中肽和半衰期延长部分任选地经由连接体共价连接或融合。 多肽是APJ受体的激动剂。 本发明还涉及本发明的生物缀合物的制备方法及其治疗用途,例如治疗或预防急性失代偿性心力衰竭(ADHF),慢性心力衰竭,肺动脉高压,心房颤动,布鲁加达综合征,室性心动过速,动脉粥样硬化 ,高血压,再狭窄,缺血性心血管疾病,心肌病,心脏纤维化,心律失常,保水,糖尿病(包括妊娠糖尿病),肥胖,外周动脉疾病,脑血管意外,短暂性脑缺血发作,创伤性脑损伤,肌萎缩性侧索硬化,烧伤( 包括晒伤)和先兆子痫。 本发明还提供药理活性剂和药物组合物的组合。

    Method and system for providing an uplink structure and improved channelization scheme in a wireless communication network
    7.
    发明授权
    Method and system for providing an uplink structure and improved channelization scheme in a wireless communication network 有权
    在无线通信网络中提供上行链路结构和改进的信道化方案的方法和系统

    公开(公告)号:US09036570B2

    公开(公告)日:2015-05-19

    申请号:US13264936

    申请日:2010-04-16

    摘要: A method and system are provided to perform channelization in a wireless communication network, wherein the wireless communication network including at least one base station that is communicatively coupled to at least one mobile terminal. A bandwidth of the wireless communication network is divided into a plurality of zones at the base station. Resource blocks are provided at the base station to receive data symbols transmitted in the wireless communication network. A plurality of resource blocks are combined at the base station to form a physical basic channel unit which are allocated to one of the plurality of zones at the base station. A permutation is performed on the physical basic channel unit to form a logical basic channel unit. A channel is provided to communicatively couple the base station and the mobile terminal so that the mobile terminal may send an access grant message and a user identification to the base station to transmit data in the logical basic channel unit.

    摘要翻译: 提供了一种在无线通信网络中执行信道化的方法和系统,其中所述无线通信网络包括通信地耦合到至少一个移动终端的至少一个基站。 无线通信网络的带宽在基站被分成多个区域。 在基站处提供资源块以接收在无线通信网络中发送的数据符号。 在基站处组合多个资源块,以形成分配给基站的多个区域之一的物理基本信道单元。 在物理基本信道单元上执行置换以形成逻辑基本信道单元。 提供了一种通信来通信地耦合基站和移动终端,使得移动终端可以向基站发送接入许可消息和用户标识以在逻辑基本信道单元中发送数据。

    CYCLIC POLYPEPTIDES FOR THE TREATMENT OF HEART FAILURE
    8.
    发明申请
    CYCLIC POLYPEPTIDES FOR THE TREATMENT OF HEART FAILURE 有权
    治疗心力衰竭的循环多糖

    公开(公告)号:US20150031604A1

    公开(公告)日:2015-01-29

    申请号:US14336262

    申请日:2014-07-21

    摘要: The invention provides a cyclic polypeptide of Formula I (SEQ ID NO: 1): X1-R-X3-X4-L-S-X7-X8-X9-X10-X11-X12-X13  I or an amide, an ester or a salt thereof, or a bioconjugate thereof, wherein X1, X3, X4, X7, X8, X9, X10, X11, X12 and X13 are defined herein. The polypeptides are agonist of the APJ receptor. The invention also relates to a method for manufacturing the polypeptides of the invention or bioconjugates thereof, and their therapeutic uses such as treatment or prevention of acute decompensated heart failure (ADHF), chronic heart failure, pulmonary hypertension, atrial fibrillation, Brugada syndrome, ventricular tachycardia, atherosclerosis, hypertension, restenosis, ischemic cardiovascular diseases, cardiomyopathy, cardiac fibrosis, arrhythmia, water retention, diabetes (including gestational diabetes), obesity, peripheral arterial disease, cerebrovascular accidents, transient ischemic attacks, traumatic brain injuries, amyotrophic lateral sclerosis, burn injuries (including sunburn) and preeclampsia. The present invention further provides a combination of pharmacologically active agents and a pharmaceutical composition.

    摘要翻译: 本发明提供式I(SEQ ID NO:1)的环状多肽:X1-R-X3-X4-LS-X7-X8-X9-X10-X11-X12-X13I或酰胺,酯或盐 或其生物缀合物,其中X1,X3,X4,X7,X8,X9,X10,X11,X12和X13在本文中定义。 多肽是APJ受体的激动剂。 本发明还涉及制备本发明多肽或其生物缀合物的方法及其治疗用途,例如治疗或预防急性失代偿性心力衰竭(ADHF),慢性心力衰竭,肺动脉高压,心房颤动,Brugada综合征,心室 心动过速,动脉粥样硬化,高血压,再狭窄,缺血性心血管疾病,心肌病,心脏纤维化,心律失常,潴留,糖尿病(包括妊娠糖尿病),肥胖,外周动脉疾病,脑血管意外,短暂性脑缺血发作,创伤性脑损伤,肌萎缩性侧索硬化, 烧伤(包括晒伤)和先兆子痫。 本发明还提供药理活性剂和药物组合物的组合。

    Adaptive deadend avoidance in constrained simulation
    9.
    发明授权
    Adaptive deadend avoidance in constrained simulation 有权
    约束模拟中的自适应终止避免

    公开(公告)号:US08671395B1

    公开(公告)日:2014-03-11

    申请号:US12879458

    申请日:2010-09-10

    IPC分类号: G06F9/44 G06F9/455

    CPC分类号: G06F17/5009 G06F2217/06

    摘要: The present disclosure relates to a method for avoiding deadends in a constrained simulation. The method may include analyzing a first deadend during a simulation and a first constraint of the simulation. The method may further include determining if the first constraint causes the first deadend. If the first constraint causes the first deadend, the method may also include defining a first lookahead constraint corresponding to the first constraint. The method may additionally include rerunning a first previous cycle in the simulation while adding the first lookahead constraint to the simulation.

    摘要翻译: 本公开涉及一种用于在受限模拟中避免死角的方法。 该方法可以包括在模拟期间分析第一死区和模拟的第一约束。 所述方法还可以包括确定所述第一约束是否引起所述第一死锁。 如果第一约束导致第一个停止,则该方法还可以包括定义与第一约束相对应的第一前瞻约束。 该方法可以另外包括在模拟中重新运行第一先前循环,同时将第一前视约束添加到模拟中。

    Micro-controller, processing method and device for power line carrier signal reception
    10.
    发明授权
    Micro-controller, processing method and device for power line carrier signal reception 有权
    微控制器,电源线载波信号接收的处理方法和装置

    公开(公告)号:US08649468B2

    公开(公告)日:2014-02-11

    申请号:US13609245

    申请日:2012-09-10

    IPC分类号: H04L27/06

    CPC分类号: H04B3/542

    摘要: The present invention provides a micro-controller, a processing method and device for power line carrier signal reception, where the method includes: an analog mixer mixes received power line carrier signals, an analog filter filters the mixed power line carrier signals, an analog-to-digital converter converts the filtered signals, a digital mixer mixes converted signals, a digital filter filters the mixed signals and a digital demodulator demodulates the filtered signals to obtain base band data. The present invention also provides a corresponding device and a micro-controller including the device. The technical solution of the present invention can modulate the carrier signals of any frequency to a fixed frequency through two-stage frequency mixing, so that demodulation of power line carrier signals with any frequency is possible.

    摘要翻译: 本发明提供了一种用于电力线载波信号接收的微控制器,处理方法和装置,其中所述方法包括:模拟混频器混合接收到的电力线载波信号,模拟滤波器对混合电力线载波信号进行滤波, 数字转换器转换滤波后的信号,数字混频器混合转换的信号,数字滤波器对混合信号进行滤波,并且数字解调器解调滤波后的信号以获得基带数据。 本发明还提供了包括该装置的相应装置和微控制器。 本发明的技术方案可以通过两级混频将任何频率的载波信号调制到固定频率,从而可以对具有任何频率的电力线载波信号进行解调。