公开(公告)号：US09262334B2

公开(公告)日：2016-02-16

申请号：US14330930

申请日：2014-07-14

申请人： Virident Systems Inc.

发明人： Vijay Karamcheti ,  Kenneth A. Okin ,  Kumar Ganapathy ,  Ashish Singhai ,  Rajesh Parekh

IPC分类号： G06F12/00 ,  G06F12/10 ,  G06F9/50 ,  G06F12/08 ,  G06F12/12 ,  G06F3/06 ,  G06F13/16 ,  G06F12/02 ,  G06F12/14

CPC分类号： G06F12/1009 ,  G06F3/0604 ,  G06F3/0628 ,  G06F3/0638 ,  G06F3/064 ,  G06F3/0646 ,  G06F3/0647 ,  G06F3/068 ,  G06F3/0685 ,  G06F9/5016 ,  G06F12/0207 ,  G06F12/0223 ,  G06F12/0292 ,  G06F12/08 ,  G06F12/10 ,  G06F12/121 ,  G06F12/1475 ,  G06F13/1657 ,  G06F13/1694 ,  G06F2212/205 ,  G06F2212/657 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/22

摘要： A command from an application is received to access a data structure associated with one or more virtual addresses mapped to main memory. A first subset of the virtual addresses for the data structure having constituent addresses that are mapped to the symmetric memory components and a second subset of the virtual addresses for the data structure having constituent addresses that are mapped to the asymmetric memory components are identified. Data associated with the virtual address from the first physical addresses and data associated with the virtual addresses from the second physical addresses are accessed. The data associated with the symmetric and asymmetric memory components is accessed by the application without providing the application with an indication of whether the data is accessed within the symmetric memory component or the asymmetric memory component.

摘要翻译： 接收来自应用程序的命令以访问与映射到主存储器的一个或多个虚拟地址相关联的数据结构。 识别具有映射到对称存储器组件的组成地址的数据结构的虚拟地址的第一子集以及具有映射到非对称存储器组件的组成地址的数据结构的虚拟地址的第二子集。 访问与来自第一物理地址的虚拟地址相关联的数据和与来自第二物理地址的虚拟地址相关联的数据。 与对称和非对称存储器组件相关联的数据被应用程序访问，而不向应用程序提供在对称存储器组件或非对称存储器组件内是否访问数据的指示。

公开(公告)号：US20140258653A1

公开(公告)日：2014-09-11

申请号：US14047627

申请日：2013-10-07

申请人： Virident Systems Inc.

发明人： Vijay Karamcheti ,  Kenneth A. Okin ,  Kumar Ganapathy ,  Ashish Singhai ,  Rajesh Parekh

IPC分类号： G06F12/12

CPC分类号： G06F12/1009 ,  G06F3/0604 ,  G06F3/0628 ,  G06F3/0638 ,  G06F3/064 ,  G06F3/0646 ,  G06F3/0647 ,  G06F3/068 ,  G06F3/0685 ,  G06F9/5016 ,  G06F12/0207 ,  G06F12/0223 ,  G06F12/0292 ,  G06F12/08 ,  G06F12/10 ,  G06F12/121 ,  G06F12/1475 ,  G06F13/1657 ,  G06F13/1694 ,  G06F2212/205 ,  G06F2212/657 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/22

摘要： Data stored within symmetric and asymmetric memory components of main memory is integrated by identifying a first data as having access characteristics suitable for storing in an asymmetric memory component. The first data is included among a collection of data to be written to the asymmetric memory component. An amount of data is identified within the collection of data to be written to the asymmetric memory component. The amount of data is compared within the collection of data to a volume threshold to determine whether a block write to the asymmetric memory component is justified by the amount of data. If justified, the collection of data is loaded to the asymmetric memory component.

摘要翻译： 存储在主存储器的对称和非对称存储器组件内的数据通过将第一数据识别为具有适于存储在非对称存储器组件中的访问特性而被集成。 第一数据被包括在要写入非对称存储器组件的数据的集合中。 在要写入非对称存储器组件的数据集合内识别数据量。 数据量在数据集合中被比较到一个体积阈值，以确定对非对称存储器组件的写入写入是否被数据量所证明。 如果合理，数据的收集将被加载到非对称存储器组件。

公开(公告)号：US20140258603A1

公开(公告)日：2014-09-11

申请号：US14047603

申请日：2013-10-07

申请人： Virident Systems Inc.

发明人： Vijay Karamcheti ,  Kenneth A. Okin ,  Kumar Ganapathy ,  Ashish Singhai ,  Rajesh Parekh

IPC分类号： G06F12/08

CPC分类号： G06F12/1009 ,  G06F3/0604 ,  G06F3/0628 ,  G06F3/0638 ,  G06F3/064 ,  G06F3/0646 ,  G06F3/0647 ,  G06F3/068 ,  G06F3/0685 ,  G06F9/5016 ,  G06F12/0207 ,  G06F12/0223 ,  G06F12/0292 ,  G06F12/08 ,  G06F12/10 ,  G06F12/121 ,  G06F12/1475 ,  G06F13/1657 ,  G06F13/1694 ,  G06F2212/205 ,  G06F2212/657 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/22

摘要： Main memory is managed by receiving a command from an application to read data associated with a virtual address that is mapped to the main memory. A memory controller determines that the virtual address is mapped to one of the symmetric memory components of the main memory, and accesses memory use characteristics indicating how the data associated with the virtual address has been accessed, The memory controller determines that the data associated with the virtual address has access characteristics suited to an asymmetric memory component of the main memory and loads the data associated with the virtual address to the asymmetric memory component of the main memory. After the loading and using the memory management unit, a command is received from the application to read the data associated with the virtual address, and the data associated with the virtual address is retrieved from the asymmetric memory component.

摘要翻译： 通过接收来自应用程序的命令来读取与映射到主存储器的虚拟地址相关联的数据来管理主存储器。 存储器控制器确定虚拟地址被映射到主存储器的对称存储器组件中的一个，并且访问指示如何与虚拟地址相关联的数据被访问的存储器使用特性。存储器控制器确定与 虚拟地址具有适合于主存储器的非对称存储器组件的访问特征，并将与虚拟地址相关联的数据加载到主存储器的非对称存储器组件。 在加载和使用存储器管理单元之后，从应用程序接收到用于读取与虚拟地址相关联的数据的命令，并且从非对称存储器组件检索与虚拟地址相关联的数据。

公开(公告)号：US20160117258A1

公开(公告)日：2016-04-28

申请号：US14989386

申请日：2016-01-06

申请人： Virident Systems Inc.

发明人： Vijay Karamcheti ,  Kenneth A. Okin ,  Kumar Ganapathy ,  Ashish Singhai ,  Rajesh Parekh

IPC分类号： G06F12/10 ,  G06F12/02 ,  G06F13/16

CPC分类号： G06F12/1009 ,  G06F3/0604 ,  G06F3/0628 ,  G06F3/0638 ,  G06F3/064 ,  G06F3/0646 ,  G06F3/0647 ,  G06F3/068 ,  G06F3/0685 ,  G06F9/5016 ,  G06F12/0207 ,  G06F12/0223 ,  G06F12/0292 ,  G06F12/08 ,  G06F12/10 ,  G06F12/121 ,  G06F12/1475 ,  G06F13/1657 ,  G06F13/1694 ,  G06F2212/205 ,  G06F2212/657 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/22

摘要： A command from an application is received to access a data structure associated with one or more virtual addresses mapped to main memory. A first subset of the virtual addresses for the data structure having constituent addresses that are mapped to the symmetric memory components and a second subset of the virtual addresses for the data structure having constituent addresses that are mapped to the asymmetric memory components are identified. Data associated with the virtual address from the first physical addresses and data associated with the virtual addresses from the second physical addresses are accessed. The data associated with the symmetric and asymmetric memory components is accessed by the application without providing the application with an indication of whether the data is accessed within the symmetric memory component or the asymmetric memory component.

公开(公告)号：US09262333B2

公开(公告)日：2016-02-16

申请号：US14047603

申请日：2013-10-07

申请人： Virident Systems Inc.

发明人： Vijay Karamcheti ,  Kenneth A. Okin ,  Kumar Ganapathy ,  Ashish Singhai ,  Rajesh Parekh

IPC分类号： G06F12/00 ,  G06F12/10 ,  G06F9/50 ,  G06F12/08 ,  G06F12/12 ,  G06F3/06 ,  G06F12/14 ,  G06F13/16

CPC分类号： G06F12/1009 ,  G06F3/0604 ,  G06F3/0628 ,  G06F3/0638 ,  G06F3/064 ,  G06F3/0646 ,  G06F3/0647 ,  G06F3/068 ,  G06F3/0685 ,  G06F9/5016 ,  G06F12/0207 ,  G06F12/0223 ,  G06F12/0292 ,  G06F12/08 ,  G06F12/10 ,  G06F12/121 ,  G06F12/1475 ,  G06F13/1657 ,  G06F13/1694 ,  G06F2212/205 ,  G06F2212/657 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/22

摘要： Main memory is managed by receiving a command from an application to read data associated with a virtual address that is mapped to the main memory. A memory controller determines that the virtual address is mapped to one of the symmetric memory components of the main memory, and accesses memory use characteristics indicating how the data associated with the virtual address has been accessed, The memory controller determines that the data associated with the virtual address has access characteristics suited to an asymmetric memory component of the main memory and loads the data associated with the virtual address to the asymmetric memory component of the main memory. After the loading and using the memory management unit, a command is received from the application to read the data associated with the virtual address, and the data associated with the virtual address is retrieved from the asymmetric memory component.

公开(公告)号：US09626290B2

公开(公告)日：2017-04-18

申请号：US14475398

申请日：2014-09-02

申请人： Virident Systems, Inc.

发明人： Vijay Karamcheti ,  Kumar Ganapathy ,  Kenneth Alan Okin ,  Rajesh Parekh

IPC分类号： G06F13/12 ,  G06F12/02 ,  G06F13/16

CPC分类号： G06F12/0246 ,  G06F12/0638 ,  G06F13/12 ,  G06F13/1657 ,  G06F13/1694 ,  G06F2212/25 ,  G06F2212/7203 ,  G11C7/1006 ,  G11C7/1072 ,  Y02D10/14

摘要： An apparatus includes a printed circuit board with a plurality of printed circuit board traces, a memory controller mounted on the printed circuit board coupled to one or more of the plurality of printed circuit board traces, a plurality of non-volatile type of memory integrated circuits coupled to the printed circuit board, and a plurality of support integrated circuits coupled between the memory controller and the plurality of non-volatile type of memory integrated circuits.

公开(公告)号：US08972633B2

公开(公告)日：2015-03-03

申请号：US13747455

申请日：2013-01-22

申请人： Virident Systems, Inc.

发明人： Vijay Karamcheti ,  Kumar Ganapathy ,  Kenneth Alan Okin ,  Rajesh Parekh

IPC分类号： G06F13/12 ,  G06F12/02 ,  G06F13/16

CPC分类号： G06F12/0246 ,  G06F12/0638 ,  G06F13/12 ,  G06F13/1657 ,  G06F13/1694 ,  G06F2212/25 ,  G06F2212/7203 ,  G11C7/1006 ,  G11C7/1072 ,  Y02D10/14

摘要： An apparatus includes a printed circuit board with a plurality of printed circuit board traces, a memory controller mounted on the printed circuit board coupled to one or more of the plurality of printed circuit board traces, a plurality of non-volatile type of memory integrated circuits coupled to the printed circuit board, and a plurality of support integrated circuits coupled between the memory controller and the plurality of non-volatile type of memory integrated circuits.

摘要翻译： 一种装置包括具有多个印刷电路板迹线的印刷电路板，安装在与多个印刷电路板迹线中的一个或多个印刷电路板迹线耦合的印刷电路板上的存储器控​​制器，多个非易失型存储器集成电路 耦合到印刷电路板，以及耦合在存储器控制器和多个非易失性类型的存储器集成电路之间的多个支持集成电路。

公开(公告)号：US20160117131A1

公开(公告)日：2016-04-28

申请号：US14990314

申请日：2016-01-07

申请人： Virident Systems Inc.

发明人： Vijay Karamcheti ,  Kenneth A. Okin ,  Kumar Ganapathy ,  Ashish Singhai ,  Rajesh Parekh

IPC分类号： G06F3/06

CPC分类号： G06F12/1009 ,  G06F3/0604 ,  G06F3/0628 ,  G06F3/0638 ,  G06F3/064 ,  G06F3/0646 ,  G06F3/0647 ,  G06F3/068 ,  G06F3/0685 ,  G06F9/5016 ,  G06F12/0207 ,  G06F12/0223 ,  G06F12/0292 ,  G06F12/08 ,  G06F12/10 ,  G06F12/121 ,  G06F12/1475 ,  G06F13/1657 ,  G06F13/1694 ,  G06F2212/205 ,  G06F2212/657 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/22

摘要： Main memory is managed by receiving a command from an application to read data associated with a virtual address that is mapped to the main memory. A memory controller determines that the virtual address is mapped to one of the symmetric memory components of the main memory, and accesses memory use characteristics indicating how the data associated with the virtual address has been accessed, The memory controller determines that the data associated with the virtual address has access characteristics suited to an asymmetric memory component of the main memory and loads the data associated with the virtual address to the asymmetric memory component of the main memory. After the loading and using the memory management unit, a command is received from the application to read the data associated with the virtual address, and the data associated with the virtual address is retrieved from the asymmetric memory component.

摘要翻译： 通过接收来自应用程序的命令来读取与映射到主存储器的虚拟地址相关联的数据来管理主存储器。 存储器控制器确定虚拟地址被映射到主存储器的对称存储器组件中的一个，并且访问指示如何与虚拟地址相关联的数据被访问的存储器使用特性。存储器控制器确定与 虚拟地址具有适合于主存储器的非对称存储器组件的访问特征，并将与虚拟地址相关联的数据加载到主存储器的非对称存储器组件。 在加载和使用存储器管理单元之后，从应用程序接收到用于读取与虚拟地址相关联的数据的命令，并且从非对称存储器组件检索与虚拟地址相关联的数据。

公开(公告)号：US09223719B2

公开(公告)日：2015-12-29

申请号：US14047627

申请日：2013-10-07

申请人： Virident Systems Inc.

发明人： Vijay Karamcheti ,  Kenneth A. Okin ,  Kumar Ganapathy ,  Ashish Singhai ,  Rajesh Parekh

IPC分类号： G06F12/00 ,  G06F12/10 ,  G06F9/50 ,  G06F12/08 ,  G06F12/12 ,  G06F3/06 ,  G06F12/14 ,  G06F13/16

CPC分类号： G06F12/1009 ,  G06F3/0604 ,  G06F3/0628 ,  G06F3/0638 ,  G06F3/064 ,  G06F3/0646 ,  G06F3/0647 ,  G06F3/068 ,  G06F3/0685 ,  G06F9/5016 ,  G06F12/0207 ,  G06F12/0223 ,  G06F12/0292 ,  G06F12/08 ,  G06F12/10 ,  G06F12/121 ,  G06F12/1475 ,  G06F13/1657 ,  G06F13/1694 ,  G06F2212/205 ,  G06F2212/657 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/22

摘要： Data stored within symmetric and asymmetric memory components of main memory is integrated by identifying a first data as having access characteristics suitable for storing in an asymmetric memory component. The first data is included among a collection of data to be written to the asymmetric memory component. An amount of data is identified within the collection of data to be written to the asymmetric memory component. The amount of data is compared within the collection of data to a volume threshold to determine whether a block write to the asymmetric memory component is justified by the amount of data. If justified, the collection of data is loaded to the asymmetric memory component.

摘要翻译： 存储在主存储器的对称和非对称存储器组件内的数据通过将第一数据识别为具有适于存储在非对称存储器组件中的访问特性而被集成。 第一数据被包括在要写入非对称存储器组件的数据的集合中。 在要写入非对称存储器组件的数据集合内识别数据量。 数据量在数据集合中被比较到一个体积阈值，以确定对非对称存储器组件的写入写入是否被数据量所证明。 如果合理，数据的收集将被加载到非对称存储器组件。

公开(公告)号：US09672158B2

公开(公告)日：2017-06-06

申请号：US14990314

申请日：2016-01-07

申请人： Virident Systems Inc.

发明人： Vijay Karamcheti ,  Kenneth A. Okin ,  Kumar Ganapathy ,  Ashish Singhai ,  Rajesh Parekh

IPC分类号： G06F12/00 ,  G06F12/1009 ,  G06F13/16 ,  G06F9/50 ,  G06F12/08 ,  G06F12/121 ,  G06F12/10 ,  G06F3/06 ,  G06F12/02 ,  G06F12/14

CPC分类号： G06F12/1009 ,  G06F3/0604 ,  G06F3/0628 ,  G06F3/0638 ,  G06F3/064 ,  G06F3/0646 ,  G06F3/0647 ,  G06F3/068 ,  G06F3/0685 ,  G06F9/5016 ,  G06F12/0207 ,  G06F12/0223 ,  G06F12/0292 ,  G06F12/08 ,  G06F12/10 ,  G06F12/121 ,  G06F12/1475 ,  G06F13/1657 ,  G06F13/1694 ,  G06F2212/205 ,  G06F2212/657 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/22

摘要： Main memory is managed by receiving a command from an application to read data associated with a virtual address that is mapped to the main memory. A memory controller determines that the virtual address is mapped to one of the symmetric memory components of the main memory, and accesses memory use characteristics indicating how the data associated with the virtual address has been accessed, The memory controller determines that the data associated with the virtual address has access characteristics suited to an asymmetric memory component of the main memory and loads the data associated with the virtual address to the asymmetric memory component of the main memory. After the loading and using the memory management unit, a command is received from the application to read the data associated with the virtual address, and the data associated with the virtual address is retrieved from the asymmetric memory component.