-
1.发明授权Semiconductor wafer processing method that allows device regions to be selectively annealed following back end of the line (BEOL) metal wiring layer formation 有权半导体晶片处理方法允许器件区域在线后面（BEOL）金属布线层形成之后被选择性地退火公开(公告)号：US08021950B1
公开(公告)日：2011-09-20
申请号：US12911940
申请日：2010-10-26
申请人： Wagdi W. Abadeer , Lilian Kamal, legal representative , John J. Ellis-Monaghan , Jeffrey P. Gambino , Tom C. Lee
IPC分类号： H01L21/336
CPC分类号： H01L21/28044 , H01L21/268 , H01L29/1054 , H01L29/4925 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： Disclosed are embodiments of a semiconductor wafer processing method that allow device regions to be selectively annealed following back end of the line (BEOL) metal wiring formation without degrading wiring layer reliability. In the embodiments, a semiconductor device is formed adjacent to the top surface of a wafer such that it incorporates a selectively placed infrared absorbing layer (IAL). Then, following BEOL metal wiring formation, the bottom surface of the wafer is exposed to an infrared light having a wavelength that is transparent to the wafer. The infrared light is absorbed by and, thereby heats up the IAL to a first predetermined temperature (e.g., a dopant activation temperature, a temperature required for a state change, etc.). The resulting heat is transferred from the IAL to an adjacent region of the semiconductor device without raising the temperature of the metal wiring above a second predetermined temperature (e.g., a temperature that could degrade the metal wiring) that is lower than the first predetermined temperature.
摘要翻译： 公开了允许器件区域在线路后端（BEOL）金属布线形成之后选择性退火的半导体晶片处理方法的实施例，而不会降低布线层的可靠性。 在实施例中，半导体器件形成为与晶片的顶表面相邻，使得其结合有选择放置的红外线吸收层（IAL）。 然后，在BEOL金属布线形成之后，晶片的底面暴露于对晶片透明的波长的红外光。 红外光被IAL吸收，从而将IAL加热到第一预定温度（例如，掺杂剂活化温度，状态改变所需的温度等）。 所产生的热量从IAL转移到半导体器件的相邻区域，而不会将金属布线的温度升高到低于第一预定温度的第二预定温度（例如，可能降低金属布线的温度）。
-
公开(公告)号：US20120128033A1
公开(公告)日：2012-05-24
申请号：US12950508
申请日：2010-11-19
申请人： Wagdi W. Abadeer , Cathryn J. Christiansen , John A. Fifield , Dimitris P. Ioannou , Tom C. Lee , Lilian Kamal
发明人： Wagdi W. Abadeer , Cathryn J. Christiansen , John A. Fifield , Dimitris P. Ioannou , Tom C. Lee , Lilian Kamal
IPC分类号： G01K7/16
CPC分类号： G01K7/16
摘要： A system and a method for measuring temperature within an operating circuit use a Wheatstone bridge within a temperature sensing circuit. One of the resistors in the Wheatstone bridge is a thermally sensitive resistive material layer within the operating circuit. The other three resistors are thermally isolated from the operating circuit. Particular configurations of NFET and PFET devices are used to provide enhanced measurement sensitivity within the temperature sensing circuit that includes the Wheatstone bridge.
摘要翻译： 用于测量操作电路内的温度的系统和方法使用温度感测电路内的惠斯通电桥。 惠斯通电桥中的一个电阻器是操作电路内的热敏电阻材料层。 其他三个电阻器与工作电路热绝缘。 NFET和PFET器件的特殊配置用于在包括惠斯通电桥的温度检测电路中提供增强的测量灵敏度。
-
公开(公告)号：US20130175073A1
公开(公告)日：2013-07-11
申请号：US13345120
申请日：2012-01-06
CPC分类号： H01L23/5227 , H01L21/76883 , H01L23/5283 , H01L23/5329 , H01L23/53295 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： Methods for fabricating a back-end-of-line (BEOL) wiring structure, BEOL wiring structures, and design structures for a BEOL wiring structure. The BEOL wiring may be fabricated by forming a first wire in a dielectric layer and annealing the first wire in an oxygen-free atmosphere. After the first wire is annealed, a second wire is formed in vertical alignment with the first wire. A final passivation layer, which is comprised of an organic material such as polyimide, is formed that covers an entirety of a sidewall of the second wire.
摘要翻译： BEOL布线结构的制造方法，BEOL布线结构以及BEOL布线结构的设计结构。 BEOL布线可以通过在电介质层中形成第一布线并在无氧气氛中退火第一布线来制造。 在第一线退火之后，形成与第一线垂直对准的第二线。 形成由诸如聚酰亚胺的有机材料组成的最终钝化层，其覆盖第二线的整个侧壁。
-
4.发明申请FUSE LINK STRUCTURES USING FILM STRESS FOR PROGRAMMING AND METHODS OF MANUFACTURE 有权使用电影应力进行编程的保险丝链接结构和制造方法公开(公告)号：US20110018091A1
公开(公告)日：2011-01-27
申请号：US12508962
申请日：2009-07-24
IPC分类号： H01L23/525 , H01L21/768
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a programmable fuse structure includes forming at least one shallow trench isolation (STI) in a substrate, forming an e-fuse over the at least one STI and depositing an interlevel dielectric (ILD) layer over the e-fuse. Additionally, the method includes removing at least a portion of the at least one STI under the e-fuse to provide an air gap below a portion of the e-fuse and removing at least a portion of the ILD layer over the e-fuse to provide the air gap above the portion of the e-fuse.
摘要翻译： 形成可编程熔丝结构的方法包括在衬底中形成至少一个浅沟槽隔离（STI），在至少一个STI上形成e-熔丝，并在该电熔丝上沉积层间电介质（ILD）层。 另外，该方法包括移除电子熔丝下的至少一个STI的至少一部分以在e熔丝的一部分下方提供空气间隙，并将e-fuse上的ILD层的至少一部分移除到 在电子熔断器的部分上方提供气隙。
-
5.发明授权Fuse link structures using film stress for programming and methods of manufacture 有权使用膜应力的熔断器连接结构进行编程和制造方法公开(公告)号：US07892926B2
公开(公告)日：2011-02-22
申请号：US12508962
申请日：2009-07-24
IPC分类号： H01L21/336
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a programmable fuse structure includes forming at least one shallow trench isolation (STI) in a substrate, forming an e-fuse over the at least one STI and depositing an interlevel dielectric (ILD) layer over the e-fuse. Additionally, the method includes removing at least a portion of the at least one STI under the e-fuse to provide an air gap below a portion of the e-fuse and removing at least a portion of the ILD layer over the e-fuse to provide the air gap above the portion of the e-fuse.
摘要翻译： 形成可编程熔丝结构的方法包括在衬底中形成至少一个浅沟槽隔离（STI），在至少一个STI上形成e-熔丝，并在该电熔丝上沉积层间电介质（ILD）层。 另外，该方法包括移除电子熔丝下的至少一个STI的至少一部分以在e熔丝的一部分下方提供空气间隙，并将e-fuse上的ILD层的至少一部分移除到 在电子熔断器的部分上方提供气隙。
-
公开(公告)号：US08765595B2
公开(公告)日：2014-07-01
申请号：US13345120
申请日：2012-01-06
IPC分类号： H01L21/4763
CPC分类号： H01L23/5227 , H01L21/76883 , H01L23/5283 , H01L23/5329 , H01L23/53295 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： Methods for fabricating a back-end-of-line (BEOL) wiring structure, BEOL wiring structures, and design structures for a BEOL wiring structure. The BEOL wiring may be fabricated by forming a first wire in a dielectric layer and annealing the first wire in an oxygen-free atmosphere. After the first wire is annealed, a second wire is formed in vertical alignment with the first wire. A final passivation layer, which is comprised of an organic material such as polyimide, is formed that covers an entirety of a sidewall of the second wire.
摘要翻译： BEOL布线结构的制造方法，BEOL布线结构以及BEOL布线结构的设计结构。 BEOL布线可以通过在电介质层中形成第一布线并在无氧气氛中退火第一布线来制造。 在第一线退火之后，形成与第一线垂直对准的第二线。 形成由诸如聚酰亚胺的有机材料组成的最终钝化层，其覆盖第二线的整个侧壁。
-
7.发明授权Integrated circuit including sensor structure, related method and design structure 有权集成电路包括传感器结构，相关方法和设计结构公开(公告)号：US08822993B2
公开(公告)日：2014-09-02
申请号：US13550813
申请日：2012-07-17
CPC分类号： H01L22/34 , G01R31/2858 , H01L22/30 , H01L23/48 , H01L2924/0002 , H01L2924/00
摘要： An Integrated Circuit (IC) and a method of making the same. In one embodiment, an integrated circuit includes: a substrate; a first metal layer disposed on the substrate and including a sensor structure configured to indicate a crack in a portion of the integrated circuit; and a second metal layer disposed proximate the first metal layer, the second metal layer including a wire component disposed proximate the sensor structure.
摘要翻译： 一种集成电路（IC）及其制造方法。 在一个实施例中，集成电路包括：基板; 第一金属层，设置在所述基板上并且包括被构造为指示所述集成电路的一部分中的裂纹的传感器结构; 以及设置在所述第一金属层附近的第二金属层，所述第二金属层包括靠近所述传感器结构设置的导线部件。
-
8.发明申请INTEGRATED CIRCUIT INCLUDING SENSOR STRUCTURE, RELATED METHOD AND DESIGN STRUCTURE 有权集成电路，包括传感器结构，相关方法和设计结构公开(公告)号：US20140021469A1
公开(公告)日：2014-01-23
申请号：US13550813
申请日：2012-07-17
CPC分类号： H01L22/34 , G01R31/2858 , H01L22/30 , H01L23/48 , H01L2924/0002 , H01L2924/00
摘要： An Integrated Circuit (IC) and a method of making the same. In one embodiment, an integrated circuit includes: a substrate; a first metal layer disposed on the substrate and including a sensor structure configured to indicate a crack in a portion of the integrated circuit; and a second metal layer disposed proximate the first metal layer, the second metal layer including a wire component disposed proximate the sensor structure.
摘要翻译： 一种集成电路（IC）及其制造方法。 在一个实施例中，集成电路包括：基板; 第一金属层，设置在所述基板上并且包括被构造为指示所述集成电路的一部分中的裂纹的传感器结构; 以及设置在所述第一金属层附近的第二金属层，所述第二金属层包括靠近所述传感器结构设置的导线部件。
-
9.发明申请FUSE STRUCTURE HAVING CRACK STOP VOID, METHOD FOR FORMING AND PROGRAMMING SAME, AND DESIGN STRUCTURE 有权具有断裂停止的保险丝结构，其形成和编程方法以及设计结构公开(公告)号：US20120012976A1
公开(公告)日：2012-01-19
申请号：US12838850
申请日：2010-07-19
IPC分类号： H01L29/86 , G06F9/45 , H01L21/326 , H01L21/02
CPC分类号： H01L27/11206 , H01L23/5258 , H01L27/112 , H01L2924/0002 , H01L2924/00
摘要： The disclosure relates generally to fuse structures, methods of forming and programming the same, and more particularly to fuse structures having crack stop voids. The fuse structure includes a semiconductor substrate having a dielectric layer thereon and a crack stop void. The dielectric layer includes at least one fuse therein and the crack stop void is adjacent to two opposite sides of the fuse, and extends lower than a bottom surface and above a top surface of the fuse. The disclosure also relates to a design structure of the aforementioned.
摘要翻译： 本公开一般涉及熔丝结构，其形成和编程的方法，更具体地涉及具有裂纹停止空隙的熔断结构。 熔丝结构包括其上具有介电层的半导体衬底和裂纹阻挡空隙。 电介质层包括至少一个熔断器，裂纹阻挡空隙与保险丝的两个相对的两侧相邻，并且比底表面和保险丝顶表面之上延伸。 本公开还涉及上述的设计结构。
-
公开(公告)号：US20110045644A1
公开(公告)日：2011-02-24
申请号：US12939538
申请日：2010-11-04
IPC分类号： H01L21/82
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a programmable fuse structure includes forming at least one shallow trench isolation (STI) in a substrate, forming an e-fuse over the at least one STI and depositing an interlevel dielectric (ILD) layer over the e-fuse. Additionally, the method includes removing at least a portion of the at least one STI under the e-fuse to provide an air gap below a portion of the e-fuse and removing at least a portion of the ILD layer over the e-fuse to provide the air gap above the portion of the e-fuse.
-
-
-
-
-
-
-
-
-
搜索结果
77 条记录 (耗时 0.031 秒)