公开(公告)号：US20130082261A1

公开(公告)日：2013-04-04

申请号：US13612200

申请日：2012-09-12

申请人： Wataru SAITO ,  Syotaro ONO ,  Toshiyuki NAKA ,  Shunji TANIUCHI ,  Hiroaki YAMASHITA

发明人： Wataru SAITO ,  Syotaro ONO ,  Toshiyuki NAKA ,  Shunji TANIUCHI ,  Hiroaki YAMASHITA

IPC分类号： H01L27/088

CPC分类号： H01L27/0629 ,  H01L27/0727 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/42372 ,  H01L29/7803 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7808 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/868 ,  H01L29/872

摘要： A semiconductor device comprising: a Metal Oxide Semiconductor Field Effect Transistor including: a semiconductor substrate including a first semiconductor layer of a first conductivity type; second semiconductor layers of a second conductivity type extending in a depth direction from one surface of the semiconductor substrate, and having space each other; a first diode including a fifth semiconductor layer of the second conductivity type contacting the second semiconductor layer in one surface side of the semiconductor substrate, the first semiconductor layer and the second semiconductor layers; and an anode of the second diode connected to an anode of the first diode.

摘要翻译： 一种半导体器件，包括：金属氧化物半导体场效应晶体管，包括：半导体衬底，包括第一导电类型的第一半导体层; 第二导电类型的第二半导体层，在深度方向上从半导体衬底的一个表面延伸并且彼此具有空间; 第一二极管，包括在半导体衬底的一个表面侧中与第二半导体层接触的第二导电类型的第五半导体层，第一半导体层和第二半导体层; 并且所述第二二极管的阳极连接到所述第一二极管的阳极。

公开(公告)号：US20120012929A1

公开(公告)日：2012-01-19

申请号：US13051987

申请日：2011-03-18

申请人： Wataru SAITO ,  Syotaro Ono ,  Shunji Taniuchi ,  Miho Watanabe ,  Hiroaki Yamashita

发明人： Wataru SAITO ,  Syotaro Ono ,  Shunji Taniuchi ,  Miho Watanabe ,  Hiroaki Yamashita

IPC分类号： H01L29/78

CPC分类号： H01L29/7813 ,  H01L29/0865 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/42372 ,  H01L29/66734

摘要： According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, a fourth semiconductor layer of the second conductivity type, a fifth semiconductor layer of the first conductivity type, a control electrode, a first main electrode, a second main electrode, and a sixth semiconductor layer of the first conductivity type. The second semiconductor layer and the third semiconductor layer are alternately provided on the first semiconductor layer in a direction substantially parallel to a major surface of the first semiconductor layer. The fourth semiconductor layer is provided on the second semiconductor layer and the third semiconductor layer. The fifth semiconductor layer is selectively provided on a surface of the fourth semiconductor layer. The control electrode is provided in a trench via an insulating film. The trench penetrates through the fourth semiconductor layer from a surface of the fifth semiconductor layer and is in contact with the second semiconductor layer. The first main electrode is connected to the first semiconductor layer. The second main electrode is connected to the fourth semiconductor layer and the fifth semiconductor layer. The sixth semiconductor layer is provided between the fourth semiconductor layer and the second semiconductor layer. An impurity concentration of the sixth semiconductor layer is higher than an impurity concentration of the second semiconductor layer.

摘要翻译： 根据一个实施例，半导体器件包括第一导电类型的第一半导体层，第一导电类型的第二半导体层，第二导电类型的第三半导体层，第二导电类型的第四半导体层， 第一导电类型的第五半导体层，第一导电类型的控制电极，第一主电极，第二主电极和第六半导体层。 第二半导体层和第三半导体层在与第一半导体层的主表面大致平行的方向上交替地设置在第一半导体层上。 第四半导体层设置在第二半导体层和第三半导体层上。 第五半导体层选择性地设置在第四半导体层的表面上。 控制电极通过绝缘膜设置在沟槽中。 沟槽从第五半导体层的表面穿过第四半导体层并且与第二半导体层接触。 第一主电极连接到第一半导体层。 第二主电极连接到第四半导体层和第五半导体层。 第六半导体层设置在第四半导体层和第二半导体层之间。 第六半导体层的杂质浓度高于第二半导体层的杂质浓度。

公开(公告)号：US20100308399A1

公开(公告)日：2010-12-09

申请号：US12728823

申请日：2010-03-22

申请人： Wataru SAITO ,  Syotaro ONO ,  Munehisa YABUZAKI ,  Nana HATANO ,  Miho WATANABE

发明人： Wataru SAITO ,  Syotaro ONO ,  Munehisa YABUZAKI ,  Nana HATANO ,  Miho WATANABE

IPC分类号： H01L29/78

CPC分类号： H01L29/7802 ,  H01L29/0619 ,  H01L29/0626 ,  H01L29/0634 ,  H01L29/0657 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/7808 ,  H01L29/7811 ,  H01L29/7828

摘要： A power semiconductor device includes: a first semiconductor layer of the first conduction type; second semiconductor layers of the first conduction type and third semiconductor layers of the second conduction type alternately provided transversely on the first semiconductor layer; fourth semiconductor layers of the second conduction type provided on the surfaces of the third semiconductor layers; fifth semiconductor layers of the first conduction type provided selectively on the surfaces of the fourth semiconductor layer; sixth semiconductor layers of the second conduction type and seventh semiconductor layers of the first conduction type alternately provided transversely on the second and the third semiconductor layers; a first main electrode electrically connected to the first semiconductor layer; an insulation film provided on the fourth semiconductor layers, the sixth semiconductor layers and the seventh semiconductor layers; a control electrode provided on the fourth semiconductor layers, the sixth semiconductor layers and the seventh semiconductor layers via the insulation film; and a second main electrode joined to the surfaces of the fourth semiconductor layers and the fifth semiconductor layers, the sixth semiconductor layers being connected to the fourth semiconductor layers and to at least one of the third semiconductor layers, which is provided between two of the fourth semiconductor layers, and an impurity concentration of the third semiconductor layers provided below the sixth semiconductor layers being higher than an impurity concentration of the third semiconductor layers provided under the fourth semiconductor layers.

摘要翻译： 功率半导体器件包括：第一导电类型的第一半导体层; 第一导电类型的第二半导体层和第二导电类型的第三半导体层交替地设置在第一半导体层上; 设置在第三半导体层的表面上的第二导电类型的第四半导体层; 选择性地在第四半导体层的表面上提供第一导电类型的第五半导体层; 第二导电类型的第六半导体层和第一导电类型的第七半导体层交替地设置在第二和第三半导体层上; 电连接到第一半导体层的第一主电极; 设置在第四半导体层，第六半导体层和第七半导体层上的绝缘膜; 设置在第四半导体层上的控制电极，第六半导体层和第七半导体层经由绝缘膜; 以及与所述第四半导体层和所述第五半导体层的表面接合的第二主电极，所述第六半导体层与所述第四半导体层连接，并且至少一个所述第三半导体层设置在所述第四半导体层 并且设置在第六半导体层下方的第三半导体层的杂质浓度高于设置在第四半导体层下方的第三半导体层的杂质浓度。

公开(公告)号：US20100264489A1

公开(公告)日：2010-10-21

申请号：US12719475

申请日：2010-03-08

申请人： Hiroshi OHTA ,  Wataru SAITO ,  Syotaro ONO ,  Munehisa YABUZAKI ,  Nana HATANO ,  Miho WATANABE

发明人： Hiroshi OHTA ,  Wataru SAITO ,  Syotaro ONO ,  Munehisa YABUZAKI ,  Nana HATANO ,  Miho WATANABE

IPC分类号： H01L27/06 ,  H01L29/78

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/7395 ,  H01L29/7813

摘要： A transistor contains a first semiconductor layer of a first conductivity type and a drift layer having a pillar structure in which a second semiconductor layer of the first conductivity type and a third semiconductor layer of a second conductivity type are alternately disposed in a direction parallel to a surface of the first semiconductor layer. The fourth semiconductor layer of the first conductivity type and the fifth semiconductor layer of the second conductivity type are alternately disposed and parallel to the drift layer. The fifth semiconductor layer has a larger amount of impurities than the fourth semiconductor layer. The sixth semiconductor layer of the first conductivity type and the seventh semiconductor layer of the second conductivity type are alternately disposed and parallel to the fourth and the fifth semiconductor layers. The seventh semiconductor layer has a smaller amount of impurities than the sixth semiconductor layer.

摘要翻译： 晶体管包含第一导电类型的第一半导体层和具有柱结构的漂移层，其中第一导电类型的第二半导体层和第二导电类型的第三半导体层在平行于 第一半导体层的表面。 第一导电类型的第四半导体层和第二导电类型的第五半导体层交替地设置并平行于漂移层。 第五半导体层的杂质量比第四半导体层大。 第一导电类型的第六半导体层和第二导电类型的第七半导体层交替地设置并平行于第四和第五半导体层。 第七半导体层的杂质量比第六半导体层少。

公开(公告)号：US20100038712A1

公开(公告)日：2010-02-18

申请号：US12540192

申请日：2009-08-12

申请人： Miho WATANABE ,  Masaru IZUMISAWA ,  Yasuto SUMI ,  Hiroshi OHTA ,  Wataru SEKINE ,  Wataru SAITO ,  Syotaro ONO ,  Nana HATANO

发明人： Miho WATANABE ,  Masaru IZUMISAWA ,  Yasuto SUMI ,  Hiroshi OHTA ,  Wataru SEKINE ,  Wataru SAITO ,  Syotaro ONO ,  Nana HATANO

IPC分类号： H01L29/78

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/7802

摘要： A semiconductor device according to an embodiment of the present invention includes a device part and a terminal part. The device includes a first semiconductor layer, and second and third semiconductor layers formed on the first semiconductor layer, and alternately arranged along a direction parallel to a surface of the first semiconductor layer, wherein the device part is provided with a first region and a second region, each of which includes at least one of the second semiconductor layers and at least one of the third semiconductor layers, and with regard to a difference value ΔN (=NA−NB) obtained by subtracting an impurity amount NB per unit length of each of the third semiconductor layers from an impurity amount NA per unit length of each of the second semiconductor layers, a difference value ΔNC1 which is the difference value ΔN in the first region of the device part, a difference value ΔNC2 which is the difference value ΔN in the second region of the device part, and a difference value ΔNT which is the difference value ΔN in the terminal part satisfy a relationship of ΔNC1>ΔNT>ΔNC2.

摘要翻译： 根据本发明实施例的半导体器件包括器件部分和端子部分。 该器件包括第一半导体层，以及形成在第一半导体层上的第二和第三半导体层，并且沿着与第一半导体层的表面平行的方向交替布置，其中器件部分设置有第一区域和第二半导体层 区域，其中每一个包括第二半导体层和至少一个第三半导体层中的至少一个，并且关于通过从每单位长度减去杂质量NB获得的差值Dgr; N（= NA-NB） 从每个第二半导体层的每单位长度的杂质量NA中的每个第三半导体层的差分值＆Dgr; NC1，其是器件部分的第一区域中的差值＆Dgr; N，差值＆Dgr ;作为装置部分的第二区域中的差值Dgr; N的NC2，作为终端部分中的差值Dgr; N的差值＆Dgr; NT满足关系 的＆Dgr; NC1>＆Dgr; NT>＆Dgr; NC2。

公开(公告)号：US20080315297A1

公开(公告)日：2008-12-25

申请号：US12144985

申请日：2008-06-24

申请人： Masakatsu TAKASHITA ,  Yasuto SUMI ,  Masaru IZUMISAWA ,  Hiroshi OHTA ,  Wataru SAITO ,  Syotaro ONO

发明人： Masakatsu TAKASHITA ,  Yasuto SUMI ,  Masaru IZUMISAWA ,  Hiroshi OHTA ,  Wataru SAITO ,  Syotaro ONO

IPC分类号： H01L29/78

CPC分类号： H01L21/26513 ,  H01L21/26586 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/167 ,  H01L29/32 ,  H01L29/402 ,  H01L29/66712 ,  H01L29/7811

摘要： There is provided a semiconductor device having a drift layer with a pillar structure including first semiconductor layer portions of the first conduction type and second semiconductor layer portions of the second conduction type formed in pillars alternately and periodically on a semiconductor substrate. A device region includes a plurality of arrayed transistors composed of the first semiconductor layer portions and the second semiconductor layer portions. A terminal region is formed at the periphery of the device region without the transistors formed therein. The drift layer in the terminal region has a carrier lifetime lower than ⅕ the carrier lifetime in the drift layer in the device region.

摘要翻译： 提供一种具有柱状结构的漂移层的半导体器件，其包括第一导电类型的第一半导体层部分和第二导电类型的第二半导体层部分在半导体衬底上交替周期地形成为柱状。 器件区域包括由第一半导体层部分和第二半导体层部分组成的多个阵列晶体管。 端子区域形成在器件区域的外围，而不形成晶体管。 端子区域中的漂移层的载流子寿命低于器件区域漂移层中的载流子寿命的1/5。

公开(公告)号：US20080179671A1

公开(公告)日：2008-07-31

申请号：US12020288

申请日：2008-01-25

申请人： Wataru SAITO ,  Syotaro ONO

发明人： Wataru SAITO ,  Syotaro ONO

IPC分类号： H01L29/78

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/404

摘要： A semiconductor apparatus includes: a first first-conductivity-type semiconductor layer; a second first-conductivity-type semiconductor layer provided on a major surface of the first first-conductivity-type semiconductor layer in a device region and a termination region outside the device region; a third second-conductivity-type semiconductor layer being adjacent to the second first-conductivity-type semiconductor layer, forming a periodic array structure; a field insulating film provided on the second first-conductivity-type semiconductor layer and the third second-conductivity-type semiconductor layer in the termination region; a first field plate electrode provided on the field insulating film and connected to the second main electrode or the control electrode; and a second field plate electrode. The second field plate electrode partly overlies the first field plate electrode through intermediary of an insulating film and extends on the field insulating film outside the first field plate electrode. The second field plate electrode is floating in potential.

摘要翻译： 一种半导体装置，包括：第一第一导电型半导体层; 设置在器件区域中的第一第一导电型半导体层的主表面上的第二第一导电型半导体层和器件区域外的端接区域; 与第二第一导电型半导体层相邻的第三第二导电型半导体层，形成周期性阵列结构; 设置在终端区域中的第二第一导电型半导体层和第三第二导电型半导体层上的场绝缘膜; 设置在场绝缘膜上并连接到第二主电极或控制电极的第一场板电极; 和第二场板电极。 第二场板电极通过绝缘膜部分地覆盖在第一场极板电极上，并且在第一场极板电极外部的场绝缘膜上延伸。 第二场板电极浮置电位。

公开(公告)号：US20120074491A1

公开(公告)日：2012-03-29

申请号：US13234802

申请日：2011-09-16

申请人： Hiroshi OHTA ,  Yasuto SUMI ,  Kiyoshi KIMURA ,  Junji SUZUKI ,  Hiroyuki IRIFUNE ,  Wataru SAITO ,  Syotaro ONO

发明人： Hiroshi OHTA ,  Yasuto SUMI ,  Kiyoshi KIMURA ,  Junji SUZUKI ,  Hiroyuki IRIFUNE ,  Wataru SAITO ,  Syotaro ONO

IPC分类号： H01L27/088

CPC分类号： H01L29/78 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/42356 ,  H01L29/42372 ,  H01L29/7811 ,  H01L29/7813

摘要： In general, according to one embodiment, a power semiconductor device includes a first pillar region, a second pillar region, and an epitaxial layer of a first conductivity type on a first semiconductor layer. The first pillar region is composed of a plurality of first pillar layers of a second conductivity type and a plurality of second pillar layers of the first conductivity type alternately arranged along a first direction. The second pillar region is adjacent to the first pillar region along the first direction and includes a third pillar layer of the second conductivity type, a fourth pillar layer of the first conductivity type, and a fifth pillar layer of the second conductivity type in this order along the first direction. A plurality of second base layers of the second conductivity type electrically connected, respectively, onto the third pillar layer and the fifth pillar layer and spaced from each other.

摘要翻译： 通常，根据一个实施例，功率半导体器件包括在第一半导体层上的第一导电类型的第一柱状区域，第二柱状区域和外延层。 第一支柱区域由第一导电类型的多个第一支柱层和沿第一方向交替布置的第一导电类型的多个第二支柱层组成。 第二柱状区域沿着第一方向与第一柱状区域相邻，并且具有第二导电型的第三柱状层，第一导电型的第四柱状层和第二导电型的第五柱状层 沿着第一个方向。 多个第二导电类型的第二基极层分别电连接到第三柱层和第五柱层上并彼此间隔开。

公开(公告)号：US20100230750A1

公开(公告)日：2010-09-16

申请号：US12789008

申请日：2010-05-27

申请人： Wataru SAITO ,  Syotaro Ono ,  Masakatsu Takashita ,  Yasuto Sumi ,  Masaru Izumisawa ,  Hiroshi Ohta

发明人： Wataru SAITO ,  Syotaro Ono ,  Masakatsu Takashita ,  Yasuto Sumi ,  Masaru Izumisawa ,  Hiroshi Ohta

IPC分类号： H01L29/78

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/66712 ,  H01L2924/0002 ,  H01L2924/00

摘要： A power semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type and a third semiconductor layer of a second conductivity type formed on the first semiconductor layer and alternately arranged along at least one direction parallel to a surface of the first semiconductor layer; a first main electrode; a fourth semiconductor layer of the second conductivity type selectively formed in a surface of the second semiconductor layer and a surface of the third semiconductor layer; a fifth semiconductor layer of the first conductivity type selectively formed in a surface of the fourth semiconductor layer; a second main electrode; and a control electrode. At least one of the second and the third semiconductor layers has a dopant concentration profile along the one direction, the dopant concentration profile having a local minimum at a position except both ends thereof.

摘要翻译： 功率半导体器件包括：第一导电类型的第一半导体层; 第一导电类型的第二半导体层和形成在第一半导体层上的第二导电类型的第三半导体层，并且沿着平行于第一半导体层的表面的至少一个方向交替布置; 第一主电极; 选择性地形成在第二半导体层的表面和第三半导体层的表面上的第二导电类型的第四半导体层; 选择性地形成在第四半导体层的表面中的第一导电类型的第五半导体层; 第二主电极; 和控制电极。 第二和第三半导体层中的至少一个具有沿着一个方向的掺杂剂浓度分布，掺杂剂浓度分布在其两端以外的位置处具有局部最小值。

公开(公告)号：US20090273031A1

公开(公告)日：2009-11-05

申请号：US12408415

申请日：2009-03-20

申请人： Wataru SAITO ,  Syotaro ONO ,  Nana HATANO ,  Masakatsu TAKASHITA ,  Hiroshi OHTA ,  Miho WATANABE

发明人： Wataru SAITO ,  Syotaro ONO ,  Nana HATANO ,  Masakatsu TAKASHITA ,  Hiroshi OHTA ,  Miho WATANABE

IPC分类号： H01L29/78

CPC分类号： H01L29/7802 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/1095

摘要： A semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type provided on a major surface of the first semiconductor layer; a third semiconductor layer of a second conductivity type provided on the major surface of the first semiconductor layer, the third semiconductor layer forming a structure of periodical arrangement with the second semiconductor layer; a fourth semiconductor layer of the second conductivity type provided above the third semiconductor layer; a fifth semiconductor layer of the first conductivity type selectively provided on a surface of the fourth semiconductor layer; a first main electrode electrically connected to the first semiconductor layer; a second main electrode provided to contact a surface of the fifth semiconductor layer and a surface of the fourth semiconductor layer; and a control electrode provided above the fifth semiconductor layer, the fourth semiconductor layer, and the second semiconductor layer via an insulative film. A portion is provided locally in the third semiconductor layer, the portion depleting at a voltage not more than one third of a voltage at which the second semiconductor layer and the third semiconductor layer completely deplete.

摘要翻译： 半导体器件包括：第一导电类型的第一半导体层; 设置在第一半导体层的主表面上的第一导电类型的第二半导体层; 设置在所述第一半导体层的主表面上的第二导电类型的第三半导体层，所述第三半导体层形成与所述第二半导体层的周期性布置的结构; 设置在第三半导体层上方的第二导电类型的第四半导体层; 选择性地设置在第四半导体层的表面上的第一导电类型的第五半导体层; 电连接到第一半导体层的第一主电极; 设置成与所述第五半导体层的表面和所述第四半导体层的表面接触的第二主电极; 以及通过绝缘膜设置在第五半导体层，第四半导体层和第二半导体层上方的控制电极。 局部地设置在第三半导体层中的部分，其耗尽不超过第二半导体层和第三半导体层完全耗尽的电压的三分之一的电压。