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1.发明授权公开(公告)号：US08786310B1
公开(公告)日：2014-07-22
申请号：US13588647
申请日：2012-08-17
申请人： Weiguang Lu , Paige A. Kolze , William W. Stiehl , Robert M. Balzli, Jr. , Carl M. Stern , Chen W. Tseng
发明人： Weiguang Lu , Paige A. Kolze , William W. Stiehl , Robert M. Balzli, Jr. , Carl M. Stern , Chen W. Tseng
IPC分类号： H01L25/00 , H03K19/173 , G06F7/38 , G06F17/50
CPC分类号： G06F7/38 , G06F17/5027 , H01L25/00 , H01L2924/0002 , H03K19/173 , H03K19/17756 , H03K19/1776 , H01L2924/00
摘要： Approaches for partially reconfiguring a frame are disclosed. In one approach, a circuit arrangement includes programmable resources, frames of configuration memory cells, and partial configuration control memory cells. Each frame includes a plurality of subsets of configuration memory cells, and each subset configures one of the programmable resources. Each partial configuration control memory cell is coupled to a respective one of the subsets. Responsive to a first partial bitstream that includes a quantity of configuration data for all the subsets of configuration cells of a first frame of the plurality of frames, each subset of the configuration memory cells of the first frame is configurable or not configurable responsive to the state of the associated partial configuration control memory cell.
摘要翻译： 公开了部分重新配置帧的方法。 在一种方法中，电路装置包括可编程资源，配置存储单元的帧和部分配置控制存储单元。 每个帧包括配置存储器单元的多个子集，并且每个子集配置可编程资源之一。 每个部分配置控制存储器单元耦合到相应的一个子集。 响应于第一部分比特流，其包括多个帧的第一帧的配置单元的所有子集的配置数据量，第一帧的配置存储器单元的每个子集可配置或不可配置，以响应于状态 的相关部分配置控制存储单元。
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2.发明授权Power control using global control signal to selected circuitry in a programmable integrated circuit 有权使用全局控制信号对可编程集成电路中的选定电路进行功率控制公开(公告)号：US08633730B1
公开(公告)日：2014-01-21
申请号：US13588435
申请日：2012-08-17
申请人： Chen W. Tseng , Weiguang Lu , William W. Stiehl , Robert M. Balzli, Jr. , Carl M. Stern , Aditya Chaubal , Derrick S. Woods
发明人： Chen W. Tseng , Weiguang Lu , William W. Stiehl , Robert M. Balzli, Jr. , Carl M. Stern , Aditya Chaubal , Derrick S. Woods
IPC分类号： H03K19/173 , H03K19/177 , G06F1/24 , G06F17/50
CPC分类号： H03K19/17768 , G06F1/24 , G06F1/3287 , H03K19/17708 , Y02D10/171 , Y02D50/20
摘要： When a first sub-circuit of a programmable integrated circuit (“IC”) is to be deactivated, a global write enable (GWE) signal is deasserted. In response to deassertion of the GWE signal and a first memory cell associated with the first sub-circuit being in a first state, flip-flops in the first sub-circuit are disabled from changing state. In response to memory cells associated with sub-circuits other than the first sub-circuit being in a second state, flip-flops in the other sub-circuits are enabled to change state. When the first sub-circuit is to be activated, the GWE signal is asserted. Logic implemented by the first sub-circuit is preserved between the deasserting and the asserting of the GWE signal. In response to assertion of the GWE signal and the first memory cell associated with the first sub-circuit being in the first state, flip-flops in the first sub-circuit are enabled to change state.
摘要翻译： 当可编程集成电路（“IC”）的第一子电路要被去激活时，全局写使能（GWE）信号被断言。 响应于GWE信号的取消取消和与第一子电路处于第一状态相关联的第一存储单元，第一子电路中的触发器被禁止改变状态。 响应于与第一子电路以外的子电路相关联的存储器单元处于第二状态，其他子电路中的触发器能够改变状态。 当第一个子电路被激活时，GWE信号被断言。 由第一子电路实现的逻辑在GWE信号的解除和断言之间得以保留。 响应于GWE信号的断言和与第一子电路处于第一状态相关联的第一存储单元，第一子电路中的触发器能够改变状态。
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3.发明授权Partition-based incremental implementation flow for use with a programmable logic device 有权用于可编程逻辑器件的基于分区的增量实现流程公开(公告)号：US07490312B1
公开(公告)日：2009-02-10
申请号：US11501156
申请日：2006-08-08
IPC分类号： G06F17/50
CPC分类号： G06F17/5054
摘要： A method of incremental flow for a programmable logic device can include identifying elements of a hardware description language representation of a circuit design and specifying a hierarchy of partitions for selected ones of the elements. Portions of implementation data from a prior implementation flow for the circuit design can be associated with corresponding partitions. Selected portions of the implementation data from the prior implementation flow for at least one partition can be re-used during an incremental flow of the circuit design.
摘要翻译： 用于可编程逻辑器件的增量流的方法可以包括识别电路设计的硬件描述语言表示的元件并且为所选择的元件指定分区的层级。 来自电路设计的先前实现流程的部分实现数据可以与相应的分区相关联。 可以在电路设计的增量流程期间重新使用来自至少一个分区的先前实现流程的实现数据的选定部分。
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4.发明授权Plug-in component-based dependency management for partitions within an incremental implementation flow 有权在增量实现流程中为分区插件基于组件的依赖关系管理公开(公告)号：US07590951B1
公开(公告)日：2009-09-15
申请号：US11500525
申请日：2006-08-08
IPC分类号： G06F17/50
CPC分类号： G06F17/5054
摘要： A method of managing an incremental implementation flow (incremental flow) for a circuit design can include storing dependency management data for the incremental flow for the circuit design and, from a first application, invoking at least one plug-in software component configured to access the dependency management data for the circuit design. The method further can include identifying partitions of the circuit design that must be run during the incremental flow using the plug-in software component.
摘要翻译： 管理电路设计的增量实现流程（增量流程）的方法可以包括存储用于电路设计的增量流的依赖性管理数据，并且从第一应用程序调用至少一个被配置为访问 电路设计的依赖管理数据。 该方法还可以包括识别在使用插件软件组件的增量流期间必须运行的电路设计的分区。
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公开(公告)号：US07620927B1
公开(公告)日：2009-11-17
申请号：US11639618
申请日：2006-12-15
IPC分类号： G06F17/50
CPC分类号： G06F17/5045 , G06F17/5054
摘要： A method of implementing a circuit design can include selecting the circuit design to be implemented, wherein the circuit design comprises a plurality of partitions, and receiving a user input specifying a value of a partition property. The partition property can be associated with a selected one of the plurality of partitions of the circuit design. The method also can include performing an incremental implementation flow upon the circuit design for implementation by, at least in part, selectively modifying portions of a prior implementation of the selected partition in accordance with the value of the partition property.
摘要翻译： 实现电路设计的方法可以包括选择要实现的电路设计，其中电路设计包括多个分区，以及接收指定分区属性的值的用户输入。 分区属性可以与电路设计的多个分区中的所选择的一个相关联。 该方法还可以包括在电路设计上执行增量实现流程，以便至少部分地根据分区属性的值选择性地修改所选择的分区的先前实现的部分。
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