公开(公告)号：US20060065909A1

公开(公告)日：2006-03-30

申请号：US10950413

申请日：2004-09-28

申请人： William Wong ,  Chinwen Shih ,  Rene Lujan ,  Eugene Chow

发明人： William Wong ,  Chinwen Shih ,  Rene Lujan ,  Eugene Chow

IPC分类号： H01L21/00 ,  H01L21/84 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109 ,  H01L21/20

CPC分类号： H01L29/66765

摘要： Various exemplary embodiments of the systems and methods according to this invention provide for a method of producing a self-aligned thin film transistor, the transistor including a metal layer covering at least a portion of a doped layer, the doped layer covering at least a portion of a dielectric layer, a strain being created in the metal layer, the method includes etching an exposed portion of the doped layer to create a defect at an interface between the doped layer and the dielectric layer so as to initiate a delamination of the doped layer from the dielectric layer. The delamination of the doped layer from the dielectric layer is stopped when the defect propagates into an interface between the doped layer and the dielectric layer that has an adhesive energy that is greater than the strain of the metal layer.

公开(公告)号：US07884361B2

公开(公告)日：2011-02-08

申请号：US12817127

申请日：2010-06-16

申请人： William Wong ,  Rene Lujan ,  Eugene Chow

发明人： William Wong ,  Rene Lujan ,  Eugene Chow

IPC分类号： H01L21/00

CPC分类号： H01L29/41733 ,  H01L27/124 ,  H01L27/1285 ,  H01L27/1288 ,  H01L27/1292 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757

摘要： A self-aligned, thin-film, top-gate transistor and method of manufacturing same are disclosed. A first print-patterned mask is formed over a metal layer by digital lithography, for example by printing with a phase change material using a droplet ejector. The metal layer is then etched using the first print-patterned mask to form source and drain electrodes. A semiconductive layer and an insulative layer are formed thereover. A layer of photosensitive material is then deposited and exposed through the substrate, with the source and drain electrodes acting as masks for the exposure. Following development of the photosensitive material, a gate metal layer is deposited. A second print-patterned mask is then formed over the device, again by digital lithography. Etching and removal of the photosensitive material leaves the self-aligned top-gate electrode.

摘要翻译： 公开了一种自对准薄膜顶栅晶体管及其制造方法。 通过数字光刻在金属层上形成第一印刷图案掩模，例如通过使用液滴喷射器用相变材料进行印刷。 然后使用第一印刷图案化掩模蚀刻金属层以形成源极和漏极。 在其上形成半导体层和绝缘层。 然后将一层感光材料沉积并暴露通过基底，源极和漏极用作曝光的掩模。 在感光材料的显影之后，沉积栅极金属层。 然后再次通过数字光刻法在器件上形成第二印刷图案掩模。 蚀刻和去除感光材料离开自对准顶栅电极。

公开(公告)号：US20070026585A1

公开(公告)日：2007-02-01

申请号：US11193847

申请日：2005-07-28

申请人： William Wong ,  Rene Lujan ,  Eugene Chow

发明人： William Wong ,  Rene Lujan ,  Eugene Chow

IPC分类号： H01L21/84

CPC分类号： H01L29/41733 ,  H01L27/124 ,  H01L27/1285 ,  H01L27/1288 ,  H01L27/1292 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757

摘要： A self-aligned, thin-film, top-gate transistor and method of manufacturing same are disclosed. A first print-patterned mask is formed over a metal layer by digital lithography, for example by printing with a phase change material using a droplet ejector. The metal layer is then etched using the first print-patterned mask to form source and drain electrodes. A semiconductive layer and an insulative layer are formed thereover. A layer of photosensitive material is then deposited and exposed through the substrate, with the source and drain electrodes acting as masks for the exposure. Following development of the photosensitive material, a gate metal layer is deposited. A second print-patterned mask is then formed over the device, again by digital lithography. Etching and removal of the photosensitive material leaves the self-aligned top-gate electrode.

摘要翻译： 公开了一种自对准薄膜顶栅晶体管及其制造方法。 通过数字光刻在金属层上形成第一印刷图案掩模，例如通过使用液滴喷射器用相变材料进行印刷。 然后使用第一印刷图案化掩模蚀刻金属层以形成源极和漏极。 在其上形成半导体层和绝缘层。 然后将一层感光材料沉积并暴露通过基底，源极和漏极用作曝光的掩模。 在感光材料的显影之后，沉积栅极金属层。 然后再次通过数字光刻法在器件上形成第二印刷图案掩模。 蚀刻和去除感光材料离开自对准顶栅电极。

公开(公告)号：US07804090B2

公开(公告)日：2010-09-28

申请号：US12018794

申请日：2008-01-23

申请人： William Wong ,  Rene Lujan ,  Eugene Chow

发明人： William Wong ,  Rene Lujan ,  Eugene Chow

IPC分类号： H01L29/04

CPC分类号： H01L29/41733 ,  H01L27/124 ,  H01L27/1285 ,  H01L27/1288 ,  H01L27/1292 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757

摘要： A self-aligned, thin-film, top-gate transistor and method of manufacturing same are disclosed. A first print-patterned mask is formed over a metal layer by digital lithography, for example by printing with a phase change material using a droplet ejector. The metal layer is then etched using the first print-patterned mask to form source and drain electrodes. A semiconductive layer and an insulative layer are formed thereover. A layer of photosensitive material is then deposited and exposed through the substrate, with the source and drain electrodes acting as masks for the exposure. Following development of the photosensitive material, a gate metal layer is deposited. A second print-patterned mask is then formed over the device, again by digital lithography. Etching and removal of the photosensitive material leaves the self-aligned top-gate electrode.

摘要翻译： 公开了一种自对准薄膜顶栅晶体管及其制造方法。 通过数字光刻在金属层上形成第一印刷图案掩模，例如通过使用液滴喷射器用相变材料进行印刷。 然后使用第一印刷图案化掩模蚀刻金属层以形成源极和漏极。 在其上形成半导体层和绝缘层。 然后将一层感光材料沉积并暴露通过基底，源极和漏极用作曝光的掩模。 在感光材料的显影之后，沉积栅极金属层。 然后再次通过数字光刻法在器件上形成第二印刷图案掩模。 蚀刻和去除感光材料离开自对准顶栅电极。

公开(公告)号：US07749916B2

公开(公告)日：2010-07-06

申请号：US12046242

申请日：2008-03-11

申请人： William Wong ,  Scott Limb ,  Michael Chabinyc ,  Beverly Russo ,  Rene Lujan

发明人： William Wong ,  Scott Limb ,  Michael Chabinyc ,  Beverly Russo ,  Rene Lujan

IPC分类号： H01L21/31

CPC分类号： G02F1/133512 ,  B41M3/003 ,  B41M3/006 ,  G02F1/133516 ,  G03F7/2018 ,  Y10S438/942

摘要： A digital lithographic process first deposits a mask layer comprised of print patterned mask features. The print patterned mask features define gaps into which a target material may be deposited, preferably through a digital lithographic process. The target material is cured or hardened, if necessary, into target features. The mask layer is then selectively removed. The remaining target features may then be used as exposure or etch masks, physical structures such as fluid containment elements, etc. Fine feature widths, narrower the minimum width of the print patterned mask features, may be obtained while realizing the benefits of digital lithography in the manufacturing process.

摘要翻译： 数字光刻工艺首先沉积由印刷图案掩模特征组成的掩模层。 印刷图案掩模特征限定了可以沉积目标材料的间隙，优选通过数字光刻工艺。 如果需要，目标材料被固化或硬化成目标特征。 然后选择性地去除掩模层。 剩余的目标特征然后可以用作曝光或蚀刻掩模，诸如流体容纳元件的物理结构等。可以在实现数字光刻的优点的同时获得精细特征宽度，更小的打印图案化掩模特征的最小宽度 制造过程。

公开(公告)号：US20070172969A1

公开(公告)日：2007-07-26

申请号：US10536102

申请日：2006-01-20

申请人： William Wong ,  Scott Limb ,  Michael Chabinyc ,  Beverly Russo ,  Rene Lujan

发明人： William Wong ,  Scott Limb ,  Michael Chabinyc ,  Beverly Russo ,  Rene Lujan

IPC分类号： H01L21/00

CPC分类号： G02F1/133512 ,  B41M3/003 ,  B41M3/006 ,  G02F1/133516 ,  G03F7/2018 ,  Y10S438/942

摘要： A digital lithographic process first deposits a mask layer comprised of print patterned mask features. The print patterned mask features define gaps into which a target material may be deposited, preferably through a digital lithographic process. The target material is cured or hardened, if necessary, into target features. The mask layer is then selectively removed. The remaining target features may then be used as exposure or etch masks, physical structures such as fluid containment elements, etc. Fine feature widths, narrower the minimum width of the print patterned mask features, may be obtained while realizing the benefits of digital lithography in the manufacturing process.

摘要翻译： 数字光刻工艺首先沉积由印刷图案掩模特征组成的掩模层。 印刷图案掩模特征限定了可以沉积目标材料的间隙，优选通过数字光刻工艺。 如果需要，目标材料被固化或硬化成目标特征。 然后选择性地去除掩模层。 剩余的目标特征可以用作曝光或蚀刻掩模，诸如流体容纳元件的物理结构等。可以在实现数字光刻的优点的同时获得精细特征宽度，打印图案化掩模特征的最小宽度更窄 制造过程。

公开(公告)号：US20050136358A1

公开(公告)日：2005-06-23

申请号：US10741252

申请日：2003-12-19

申请人： Kateri Paul ,  William Wong ,  Steven Ready ,  Rene Lujan

发明人： Kateri Paul ,  William Wong ,  Steven Ready ,  Rene Lujan

IPC分类号： H01L21/28 ,  G03F7/00 ,  H01L21/027 ,  H01L21/033 ,  H01L21/306 ,  H01L21/311 ,  H01L21/336 ,  H01L21/768 ,  H01L29/786

CPC分类号： H01L21/31144 ,  H01L21/0272 ,  H01L21/0335 ,  H01L21/76802

摘要： A method for performing a liftoff operation involves printing a liftoff pattern using low-resolution patterning techniques to form fine feature patterns. The resulting feature size is defined by the spacing between printed patterns rather than the printed pattern size. By controlling the cross-sectional profile of the printed liftoff pattern, mask structures may be formed from the liftoff operation having beneficial etch-mask aperture profiles. For example, a multi-layer printed liftoff pattern can be used to create converging aperture profiles in a patterned layer. The patterned layer can then be used as an etch mask, where the converging aperture profiles result in desirable diverging etched features.

摘要翻译： 用于执行提升操作的方法包括使用低分辨率图案化技术打印提升图案以形成精细的特征图案。 所得到的特征尺寸由印刷图案之间的间距而不是印刷图案尺寸定义。 通过控制印刷的剥离图案的横截面轮廓，可以从具有有利的蚀刻掩模孔径轮廓的提升操作形成掩模结构。 例如，可以使用多层印刷提升图案来在图案化层中形成会聚孔径轮廓。 然后可以将图案化层用作蚀刻掩模，其中会聚孔径轮廓导致期望的发散蚀刻特征。

公开(公告)号：US07384568B2

公开(公告)日：2008-06-10

申请号：US11394438

申请日：2006-03-31

申请人： William Wong ,  Scott Limb ,  Beverly Russo ,  Michael Chabinyc ,  Rene Lujan

发明人： William Wong ,  Scott Limb ,  Beverly Russo ,  Michael Chabinyc ,  Rene Lujan

IPC分类号： B44C1/22 ,  C03C25/68 ,  C03C15/00 ,  C23F1/00

CPC分类号： B44C1/22 ,  H01L27/1292 ,  H01L29/4908

摘要： Susceptibility of darkfield etch masks (majority of the mask area is opaque) to pinhole defects, transferred pattern, non-uniformity, etc. due to ejector dropout or drop misdirection, and long duty cycles due to large-area coverage, when using digital lithography (or print patterning) is addressed by using a clear-field print pattern that is then coated with etch resist material. The printed clear field pattern is selectively removed to form an inverse pattern (darkfield) within the coated resist layer. Etching then removes selected portions of an underlying (e.g., encapsulation, conductive, etc.) layer. Removal of the mask produces a layer with large-area features with substantially reduced defects.

摘要翻译： 当使用数字光刻技术时，由于喷射器脱落或滴落错误方向，暗场蚀刻掩模（大部分掩模区域不透明）对针孔缺陷，转印图案，不均匀性等的敏感性以及由于大面积覆盖而造成的长占空比 （或印刷图案化）通过使用随后涂覆有抗蚀剂材料的透明场印刷图案来解决。 选择性地去除打印的清晰场图案以在涂覆的抗蚀剂层内形成反向图案（暗场）。 然后蚀刻去除底层（例如，封装，导电等）层的选定部分。 去除掩模产生具有大面积特征并具有显着减少的缺陷的层。

公开(公告)号：US20070020883A1

公开(公告)日：2007-01-25

申请号：US11184304

申请日：2005-07-18

申请人： Ana Arias ,  Rene Lujan ,  William Wong

发明人： Ana Arias ,  Rene Lujan ,  William Wong

IPC分类号： H01L21/30

CPC分类号： H01L21/027 ,  H01L21/0272 ,  H01L27/1292 ,  H01L29/66765 ,  H01L51/0016

摘要： A patterned integrated circuit structure defining a gap or via is fabricated solely by digital printing and bulk processing. A sacrificial lift-off pattern is printed or otherwise formed over a substrate, and then covered by a blanket layer. A mask is then formed, e.g., by printing a wax pattern that covers a region of the blanket layer corresponding to the desired patterned structure, and overlaps the lift-off pattern. Exposed portions of the blanket layer are then removed, e.g., by wet etching. The printed mask and the lift-off pattern are then removed using a lift-off process that also removes any remaining portions of the blanket layer formed over the lift-off pattern. A thin-film transistor includes patterned source/drain structures that are self-aligned to an underlying gate structure by forming a photoresist lift-off pattern that is exposed and developed by a back-exposure process using the gate structure as a mask.

摘要翻译： 限定间隙或通孔的图案化集成电路结构仅通过数字印刷和批量处理来制造。 牺牲剥离图案印刷或以其它方式形成在衬底上，然后被覆盖层覆盖。 然后形成掩模，例如通过印刷覆盖对应于所需图案化结构的橡皮布层的区域并与剥离图案重叠的蜡图案。 然后例如通过湿蚀刻除去覆盖层的暴露部分。 然后使用剥离过程去除印刷的掩模和剥离图案，剥离过程也去除在剥离图案上形成的覆盖层的任何剩余部分。 薄膜晶体管包括通过形成通过使用栅极结构作为掩模的背景曝光工艺曝光和显影的光致抗蚀剂剥离图案而与底层栅极结构自对准的图案化源极/漏极结构。

公开(公告)号：US20070235410A1

公开(公告)日：2007-10-11

申请号：US11394438

申请日：2006-03-31

申请人： William Wong ,  Scott Limb ,  Beverly Russo ,  Michael Chabinyc ,  Rene Lujan

发明人： William Wong ,  Scott Limb ,  Beverly Russo ,  Michael Chabinyc ,  Rene Lujan

IPC分类号： C23F1/00

CPC分类号： B44C1/22 ,  H01L27/1292 ,  H01L29/4908

摘要： Susceptibility of darkfield etch masks (majority of the mask area is opaque) to pinhole defects, transferred pattern, non-uniformity, etc. due to ejector dropout or drop misdirection, and long duty cycles due to large-area coverage, when using digital lithography (or print patterning) is addressed by using a clear-field print pattern that is then coated with etch resist material. The printed clear field pattern is selectively removed to form an inverse pattern (darkfield) within the coated resist layer. Etching then removes selected portions of an underlying (e.g., encapsulation, conductive, etc.) layer. Removal of the mask produces a layer with large-area features with substantially reduced defects.

摘要翻译： 当使用数字光刻技术时，由于喷射器脱落或滴落错误导向，暗区蚀刻掩模（大部分掩模区域不透明）对针孔缺陷，转印图案，不均匀性等的敏感性以及由于大面积覆盖而造成的长占空比 （或印刷图案化）通过使用随后涂覆有抗蚀剂材料的透明场印刷图案来解决。 选择性地去除打印的清晰场图案以在涂覆的抗蚀剂层内形成反向图案（暗场）。 然后蚀刻去除底层（例如，封装，导电等）层的选定部分。 去除掩模产生具有大面积特征并具有显着减少的缺陷的层。