公开(公告)号：US20090007150A1

公开(公告)日：2009-01-01

申请号：US11771209

申请日：2007-06-29

申请人： Yadong Li ,  Sujoy Sen

发明人： Yadong Li ,  Sujoy Sen

IPC分类号： G06F3/00

CPC分类号： G06F9/3861 ,  G06F13/24 ,  H04L49/90

摘要： Processor affinity of an application/thread may be used to deliver an interrupt caused by the application/thread to a best processor at runtime. The processor to which the interrupt is delivered may either run the target application/thread or be located in the same socket as the processor that runs the target application/thread. The processor affinity of the application/thread may be pushed down at runtime to a network device, a chipset, a memory control hub (“MCH”), or an input/output hub (“IOH”), which will facilitate delivery of the interrupt using that affinity information.

摘要翻译： 应用程序/线程的处理器亲和性可能用于在运行时将由应用程序/线程引起的中断传递到最佳处理器。 发送中断的处理器可以运行目标应用程序/线程，也可以位于与运行目标应用程序/线程的处理器相同的套接字中。 应用/线程的处理器亲和性可以在运行时被推下到网络设备，芯片组，存储器控制中枢（“MCH”）或输入/输出集线器（“IOH”），这将有利于 中断使用该亲和度信息。

公开(公告)号：US20130173895A1

公开(公告)日：2013-07-04

申请号：US13657991

申请日：2012-10-23

申请人： Yadong Li ,  Sujoy Sen

发明人： Yadong Li ,  Sujoy Sen

IPC分类号： G06F9/38

CPC分类号： G06F9/3861 ,  G06F13/24 ,  H04L49/90

摘要： Processor affinity of an application/thread may be used to deliver an interrupt caused by the application/thread to a best processor at runtime. The processor to which the interrupt is delivered may either run the target application/thread or be located in the same socket as the processor that runs the target application/thread. The processor affinity of the application/thread may be pushed down at runtime to a network device, a chipset, a memory control hub (“MCH”), or an input/output hub (“IOH”), which will facilitate delivery of the interrupt using that affinity information.

摘要翻译： 应用程序/线程的处理器亲和性可能用于在运行时将由应用程序/线程引起的中断传递到最佳处理器。 发送中断的处理器可以运行目标应用程序/线程，也可以位于与运行目标应用程序/线程的处理器相同的套接字中。 应用/线程的处理器亲和性可以在运行时被推下到网络设备，芯片组，存储器控制中枢（“MCH”）或输入/输出集线器（“IOH”），这将有利于 中断使用该亲和度信息。

公开(公告)号：US20210103403A1

公开(公告)日：2021-04-08

申请号：US17092640

申请日：2020-11-09

申请人： Shaopeng He ,  Yadong Li ,  Ziye Yang ,  Changpeng Liu ,  Haitao Kang ,  Cunming Liang ,  Gang Cao ,  Scott Peterson ,  Sujoy Sen ,  Yi Zou ,  Arun Raghunath

发明人： Shaopeng He ,  Yadong Li ,  Ziye Yang ,  Changpeng Liu ,  Haitao Kang ,  Cunming Liang ,  Gang Cao ,  Scott Peterson ,  Sujoy Sen ,  Yi Zou ,  Arun Raghunath

IPC分类号： G06F3/06

摘要： Methods and apparatus for end-to-end data plane offloading for distributed storage using protocol hardware and Protocol Independent Switch Architecture (PISA) devices. Hardware-based data plane forwarding is implemented in compute and storage switches that comprise smart server switches running software executing in a kernel and user space. The compute switch is coupled to one or more compute servers/nodes and the storage server is coupled to one or more storage servers or storage arrays. The hardware-based data plane forwarding facilitates an end-to-end data plane between the computer server(s) and storage server(s)/array(s) that is offloaded to hardware. In one example the software comprises Ceph components used to implement control plane operations in connection with hardware offloaded data plane operations, and storage traffic employs the NVMe-oF protocol and the kernels include NVMe-oF modules. In one aspect the hardware-based data plane forwarding is implemented using programmable P4switch chips. In one aspect the storage and server switches are Top of Rack (ToR) switches.

公开(公告)号：US08296490B2

公开(公告)日：2012-10-23

申请号：US11771209

申请日：2007-06-29

申请人： Yadong Li ,  Sujoy Sen

发明人： Yadong Li ,  Sujoy Sen

IPC分类号： G06F13/24 ,  G06F15/16 ,  G06F3/00

CPC分类号： G06F9/3861 ,  G06F13/24 ,  H04L49/90

摘要： Processor affinity of an application/thread may be used to deliver an interrupt caused by the application/thread to a best processor at runtime. The processor to which the interrupt is delivered may either run the target application/thread or be located in the same socket as the processor that runs the target application/thread. The processor affinity of the application/thread may be pushed down at runtime to a network device, a chipset, a memory control hub (“MCH”), or an input/output hub (“IOH”), which will facilitate delivery of the interrupt using that affinity information.

摘要翻译： 应用程序/线程的处理器亲和性可能用于在运行时将由应用程序/线程引起的中断传递到最佳处理器。 发送中断的处理器可以运行目标应用程序/线程，也可以位于与运行目标应用程序/线程的处理器相同的套接字中。 应用程序/线程的处理器亲和性可能在运行时被推下到网络设备，芯片组，存储器控制集线器（MCH）或输入/输出集线器（IOH），这将有助于使用该亲和力传送中断 信息。

公开(公告)号：US20200065271A1

公开(公告)日：2020-02-27

申请号：US16366504

申请日：2019-03-27

申请人： Matthew J. Adiletta ,  Brad Burres ,  Duane Galbi ,  Amit Kumar ,  Yadong Li ,  Salma Mirza ,  Jose Niell ,  Thomas E. Willis ,  William Duggan

发明人： Matthew J. Adiletta ,  Brad Burres ,  Duane Galbi ,  Amit Kumar ,  Yadong Li ,  Salma Mirza ,  Jose Niell ,  Thomas E. Willis ,  William Duggan

IPC分类号： G06F13/20 ,  G06F13/42

摘要： Technologies for flexible I/O endpoint acceleration include a computing device having a root complex, a soft endpoint coupled to the root complex, and an offload complex coupled to the soft endpoint. The soft endpoint establishes an emulated endpoint hierarchy based on endpoint firmware. The computing device may program the endpoint firmware. The soft endpoint receives an I/O transaction that originates from the root complex and determines whether to process the I/O transaction. The soft endpoint may process the I/O transaction or forward the I/O transaction to the offload complex. The soft endpoint may encapsulate the I/O transaction with metadata and forward the encapsulated transaction to the offload complex. The soft endpoint may store responses from the offload complex in a history buffer and retrieve the responses in response to retried I/O transactions. The I/O transaction may be a PCI Express transaction layer packet. Other embodiments are described and claimed.

公开(公告)号：US09937559B2

公开(公告)日：2018-04-10

申请号：US14938846

申请日：2015-11-12

申请人： Yadong Li ,  Yajun Li

发明人： Yadong Li ,  Yajun Li

IPC分类号： A61F2/32 ,  C04B35/10 ,  C04B35/48 ,  C04B35/64 ,  B28B1/24 ,  B32B18/00 ,  B22F7/02 ,  B22F3/10 ,  B22F3/105 ,  B22F3/22 ,  B22F7/06 ,  C04B35/111 ,  C04B35/119 ,  C04B35/488 ,  C04B35/634 ,  C04B35/638 ,  C04B35/645 ,  B22F3/12 ,  B22F3/15 ,  B22F7/00 ,  A61F2/36

CPC分类号： B22F7/02 ,  A61F2/32 ,  A61F2/3601 ,  B22F3/1021 ,  B22F3/105 ,  B22F3/12 ,  B22F3/15 ,  B22F3/225 ,  B22F7/008 ,  B22F7/06 ,  B32B18/00 ,  C04B35/111 ,  C04B35/119 ,  C04B35/4885 ,  C04B35/634 ,  C04B35/638 ,  C04B35/64 ,  C04B35/6455 ,  C04B2235/3225 ,  C04B2235/3229 ,  C04B2235/6022 ,  C04B2235/77 ,  C04B2235/96 ,  C04B2237/343 ,  C04B2237/348 ,  C04B2237/58 ,  C04B2237/84

摘要： A manufacturing method of a multilayer shell-core composite structural component comprises the following procedures: (1) respectively preparing feeding material for injection forming of a core layer, a buffer layer and a shell layer, wherein the powders of feeding material of the core layer and the shell layer are selected from one or more of metallic powder, ceramic powder or toughened ceramic powder, and are different from each other, and the powder of feeding material of the buffer layer is gradient composite material powder; (2) layer by layer producing the blank of multilayer shell-core composite structural component by powder injection molding; (3) degreasing the blank; and (4) sintering the blank to obtain the multilayer shell-core composite structural component. The multilayer shell-core composite structural component has the advantages of high surface hardness, abrasion resistance, uniform thickness of the shell layer, stable and persistent performance.

公开(公告)号：US20180036802A1

公开(公告)日：2018-02-08

申请号：US15788805

申请日：2017-10-20

申请人： Yadong Li ,  Yajun Li

发明人： Yadong Li ,  Yajun Li

IPC分类号： B22F7/02 ,  B22F3/105 ,  C04B35/638 ,  C04B35/634 ,  C04B35/488 ,  C04B35/119 ,  C04B35/111 ,  B32B18/00 ,  A61F2/36 ,  C04B35/64 ,  B22F7/00 ,  B22F3/15 ,  B22F3/12 ,  A61F2/32 ,  B22F7/06 ,  B22F3/22 ,  B22F3/10 ,  C04B35/645

CPC分类号： B22F7/02 ,  A61F2/32 ,  A61F2/3601 ,  B22F3/1021 ,  B22F3/105 ,  B22F3/12 ,  B22F3/15 ,  B22F3/225 ,  B22F7/008 ,  B22F7/06 ,  B32B18/00 ,  C04B35/111 ,  C04B35/119 ,  C04B35/4885 ,  C04B35/634 ,  C04B35/638 ,  C04B35/64 ,  C04B35/6455 ,  C04B2235/3225 ,  C04B2235/3229 ,  C04B2235/6022 ,  C04B2235/77 ,  C04B2235/96 ,  C04B2237/343 ,  C04B2237/348 ,  C04B2237/58 ,  C04B2237/84

摘要： A manufacturing method of a multilayer shell-core composite structural component comprises the following procedures: (1) respectively preparing feeding material for injection forming of a core layer, a buffer layer and a shell layer, wherein the powders of feeding material of the core layer and the shell layer are selected from one or more of metallic powder, ceramic powder or toughened ceramic powder, and are different from each other, and the powder of feeding material of the buffer layer is gradient composite material powder; (2) layer by layer producing the blank of multilayer shell-core composite structural component by powder injection molding; (3) degreasing the blank; and (4) sintering the blank to obtain the multilayer shell-core composite structural component. The multilayer shell-core composite structural component has the advantages of high surface hardness, abrasion resistance, uniform thickness of the shell layer, stable and persistent performance.

公开(公告)号：US09009367B2

公开(公告)日：2015-04-14

申请号：US13566298

申请日：2012-08-03

申请人： Yadong Li ,  Linden Cornett ,  Manasi Deval ,  Anil Vasudevan ,  Parthasarathy Sarangam

发明人： Yadong Li ,  Linden Cornett ,  Manasi Deval ,  Anil Vasudevan ,  Parthasarathy Sarangam

IPC分类号： G06F3/00 ,  G06F15/16 ,  G06F13/24

CPC分类号： G06F13/24 ,  H04L69/165

摘要： Generally, this disclosure relates to adaptive interrupt moderation. A method may include determining, by a host device, a number of connections between the host device and one or more link partners based, at least in part, on a connection identifier associated with each connection; determining, by the host device, a new interrupt rate based at least in part on a number of connections; updating, by the host device, an interrupt moderation timer with a value related to the new interrupt rate; and configuring the interrupt moderation timer to allow interrupts to occur at the new interrupt rate.

摘要翻译： 通常，本公开涉及自适应中断调节。 方法可以包括：至少部分地基于与每个连接相关联的连接标识符，由主机设备确定主机设备与一个或多个链路伙伴之间的连接数; 由所述主机设备至少部分地基于多个连接来确定新的中断率; 通过所述主机设备更新具有与所述新中断速率相关的值的中断调节定时器; 并配置中断调节定时器以允许以新的中断速率发生中断。

公开(公告)号：US08566494B2

公开(公告)日：2013-10-22

申请号：US13076789

申请日：2011-03-31

申请人： Yadong Li ,  Linden Cornett

发明人： Yadong Li ,  Linden Cornett

IPC分类号： G06F13/24

CPC分类号： G06F13/24

摘要： An apparatus which comprises two or more moderation timers associated with an interrupt vector is presented. In one embodiment, the apparatus comprises two or more interrupt vectors and moderation timers are set with different interrupt rates. An interrupt vector logic unit sends an interrupt vector if there is an interrupt event from the queue associated with a moderation timer and the moderation timer expires.

摘要翻译： 提出了一种包括与中断向量相关联的两个或更多个调节定时器的装置。 在一个实施例中，该装置包括两个或多个中断向量，并且以不同的中断速率设置调节定时器。 中断向量逻辑单元发送一个中断向量，如果存在与调节定时器相关联的队列中断事件，并且调节定时器到期。

公开(公告)号：US07037265B2

公开(公告)日：2006-05-02

申请号：US10679542

申请日：2003-10-06

申请人： Xiaohui Hao ,  Richard Chiao ,  Steven Miller ,  Yadong Li

发明人： Xiaohui Hao ,  Richard Chiao ,  Steven Miller ,  Yadong Li

IPC分类号： A61B8/00

CPC分类号： G01S15/8959 ,  G01S7/52038 ,  G01S7/52093 ,  G01S7/52095 ,  G01S15/8963

摘要： The present invention relates to a method and apparatus providing tissue harmonic imaging using an ultrasound machine. Coded pulses and the phase inverted version of the said coded pulses with time bandwidth greater than 1 are transmitted into the tissue. Backscattered echoes are received and filtered before or after coherent summation. Decoding/compressing of the received echoes of the coded pulses is implemented naturally through the propagation of the specially designed ultrawide band (>80%) waveforms inside tissue and pulse inversion. Costly decoding/compression filter are not necessary.

摘要翻译： 本发明涉及使用超声波机器提供组织谐波成像的方法和装置。 编码脉冲和时间带宽大于1的所述编码脉冲的相位反转版本被传送到组织中。 反向散射回波在相干求和之前或之后被接收和滤波。 编码脉冲的接收回波的解码/压缩通过在组织内部特别设计的超宽带（> 80％）波形的传播和脉冲反转来自然地实现。 经济的解码/压缩滤波器不是必需的。