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    METHODS OF FORMING TRENCHES IN SILICON AND A SEMICONDUCTOR DEVICE INCLUDING SAME
    3.
    发明申请
    METHODS OF FORMING TRENCHES IN SILICON AND A SEMICONDUCTOR DEVICE INCLUDING SAME 有权
    在硅中形成铁素体的方法和包括其中的半导体器件

    公开(公告)号：US20130037919A1

    公开(公告)日：2013-02-14

    申请号：US13206907

    申请日：2011-08-10

    申请人： Sanjeev Sapra ,  Cheng-Shun Chen ,  Hung-Ming Tsai ,  Sheng-Wei Yang

    发明人： Sanjeev Sapra ,  Cheng-Shun Chen ,  Hung-Ming Tsai ,  Sheng-Wei Yang

    IPC分类号： H01L21/306 ,  H01L29/06 ,  B82Y40/00 ,  B82Y99/00

    CPC分类号： H01L23/5283 ,  B82Y30/00 ,  H01L21/02238 ,  H01L21/30604 ,  H01L21/3083 ,  H01L21/31111 ,  H01L29/04 ,  H01L29/16 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of creating a trench having a portion of a bulb-shaped cross-section in silicon is disclosed. The method comprises forming at least one trench in silicon and forming a liner in the at least one trench. The liner is removed from a bottom surface of the at least one trench to expose the underlying silicon. A portion of the underlying exposed silicon is removed to form a cavity in the silicon. At least one removal cycle is conducted to remove exposed silicon in the cavity to form a bulb-shaped cross-sectional profile, with each removal cycle comprising subjecting the silicon in the cavity to ozonated water to oxidize the silicon and subjecting the oxidized silicon to a hydrogen fluoride solution to remove the oxidized silicon. A semiconductor device structure comprising the at least one trench comprising a cavity with a bulb-shaped cross-sectional profile is also disclosed.

    摘要翻译： 公开了一种在硅中产生一个具有一个灯泡形横截面的沟槽的方法。 该方法包括在硅中形成至少一个沟槽并在至少一个沟槽中形成衬垫。 将衬垫从至少一个沟槽的底表面移除以暴露下面的硅。 去除底层暴露的硅的一部分以在硅中形成空腔。 进行至少一个去除周期以去除空腔中的暴露的硅以形成球形横截面轮廓，每个去除周期包括使空腔中的硅经受臭氧化水以氧化硅并将氧化的硅经受 氟化氢溶液去除氧化硅。 还公开了一种半导体器件结构，其包括包括具有灯泡形横截面轮廓的空腔的至少一个沟槽。

    Methods of forming bulb-shaped trenches in silicon
    4.
    发明授权
    Methods of forming bulb-shaped trenches in silicon 有权
    在硅中形成球形沟槽的方法

    公开(公告)号：US09117759B2

    公开(公告)日：2015-08-25

    申请号：US13206907

    申请日：2011-08-10

    申请人： Sanjeev Sapra ,  Cheng-Shun Chen ,  Hung-Ming Tsai ,  Sheng-Wei Yang

    发明人： Sanjeev Sapra ,  Cheng-Shun Chen ,  Hung-Ming Tsai ,  Sheng-Wei Yang

    IPC分类号： H01L21/3205 ,  H01L21/306 ,  H01L21/02 ,  H01L21/308 ,  H01L21/311 ,  B82Y30/00

    CPC分类号： H01L23/5283 ,  B82Y30/00 ,  H01L21/02238 ,  H01L21/30604 ,  H01L21/3083 ,  H01L21/31111 ,  H01L29/04 ,  H01L29/16 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of creating a trench having a portion of a bulb-shaped cross-section in silicon is disclosed. The method comprises forming at least one trench in silicon and forming a liner in the at least one trench. The liner is removed from a bottom surface of the at least one trench to expose the underlying silicon. A portion of the underlying exposed silicon is removed to form a cavity in the silicon. At least one removal cycle is conducted to remove exposed silicon in the cavity to form a bulb-shaped cross-sectional profile, with each removal cycle comprising subjecting the silicon in the cavity to ozonated water to oxidize the silicon and subjecting the oxidized silicon to a hydrogen fluoride solution to remove the oxidized silicon. A semiconductor device structure comprising the at least one trench comprising a cavity with a bulb-shaped cross-sectional profile is also disclosed.

    摘要翻译： 公开了一种在硅中产生一个具有一个灯泡形横截面的沟槽的方法。 该方法包括在硅中形成至少一个沟槽并在至少一个沟槽中形成衬垫。 将衬垫从至少一个沟槽的底表面移除以暴露下面的硅。 去除底层暴露的硅的一部分以在硅中形成空腔。 进行至少一个去除周期以去除空腔中的暴露的硅以形成球形横截面轮廓，每个去除周期包括使空腔中的硅经受臭氧化水以氧化硅并将氧化的硅经受 氟化氢溶液去除氧化硅。 还公开了一种半导体器件结构，其包括包括具有灯泡形横截面轮廓的空腔的至少一个沟槽。

    MEMORY PROCESS AND MEMORY STRUCTURE MADE THEREBY
    5.
    发明申请
    MEMORY PROCESS AND MEMORY STRUCTURE MADE THEREBY 有权
    存储过程和存储器结构

    公开(公告)号：US20140054794A1

    公开(公告)日：2014-02-27

    申请号：US13590204

    申请日：2012-08-21

    申请人： Vivek Gopalan ,  Robert Kerr ,  Hung-Ming Tsai

    发明人： Vivek Gopalan ,  Robert Kerr ,  Hung-Ming Tsai

    IPC分类号： H01L21/283 ,  H01L23/48

    CPC分类号： H01L21/76883 ,  H01L21/76802 ,  H01L27/108 ,  H01L27/10891

    摘要： A memory process is described. A substrate is provided, having therein trenches and conductive lines buried in the trenches and having thereon an array area, wherein each of the conductive lines has an array portion in the array area. A contact area apart from the array area is defined on the substrate, wherein each of the conductive lines has a contact portion in the contact area. The substrate between the contact portions of the conductive lines is etched down to below the tops of the conductive layers to form gaps between the contact portions of the conductive lines. The gaps are then filled with an insulating layer.

    摘要翻译： 描述记忆过程。 提供了一种衬底，其中具有埋在沟槽中的沟槽和导线，并且具有阵列区域，其中每条导线在阵列区域中具有阵列部分。 在基板上限定与阵列区域分开的接触区域，其中每个导线在接触区域中具有接触部分。 导电线的接触部分之间的衬底被蚀刻到导电层的顶部之下，以在导电线的接触部分之间形成间隙。 然后用绝缘层填充间隙。

    Dynamic network address translation system and method of transparent private network device
    6.
    发明授权
    Dynamic network address translation system and method of transparent private network device 有权
    透明私网设备的动态网络地址转换系统及方法

    公开(公告)号：US07577144B2

    公开(公告)日：2009-08-18

    申请号：US10442161

    申请日：2003-05-21

    申请人： Hung-chun Chang ,  Ming-Deng Hsieh ,  Chien-Chao Tseng ,  Hung-Ming Tsai

    发明人： Hung-chun Chang ,  Ming-Deng Hsieh ,  Chien-Chao Tseng ,  Hung-Ming Tsai

    IPC分类号： H04L12/28 ,  H04L12/56

    CPC分类号： H04L29/12066 ,  H04L29/12377 ,  H04L29/12462 ,  H04L29/12547 ,  H04L45/00 ,  H04L61/1511 ,  H04L61/2517 ,  H04L61/255 ,  H04L61/2582

    摘要： The present invention provides a dynamic network address translation system and method of transparent private network device. With the NAT approach, the first device in a public network can be connected to a second device in a private network. The first packet for the connection is sent from the first device in the public network to the second device in the private network. Before establishing the connection, the first device exchanges information between the NAPT router of the private network. The NAPT router maintains its translation table according to the information. Then, the first device sends a connection request to a specific port of the NAPT router, and the packet will be transformed and routed properly to the second device.

    摘要翻译： 本发明提供一种透明专用网络设备的动态网络地址转换系统和方法。 使用NAT方法，公共网络中的第一个设备可以连接到专用网络中的第二个设备。 用于连接的第一个分组从公共网络中的第一个设备发送到专用网络中的第二个设备。 在建立连接之前，第一个设备在专网的NAPT路由器之间交换信息。 NAPT路由器根据信息维护其转换表。 然后，第一个设备向NAPT路由器的特定端口发送连接请求，并且该数据包将被正确转换并路由到第二个设备。

    METHODS FOR FORMING CONNECTIONS TO A MEMORY ARRAY AND PERIPHERY
    7.
    发明申请
    METHODS FOR FORMING CONNECTIONS TO A MEMORY ARRAY AND PERIPHERY 审中-公开
    用于形成与存储器阵列和外围设备的连接的方法

    公开(公告)号：US20130049074A1

    公开(公告)日：2013-02-28

    申请号：US13216164

    申请日：2011-08-23

    申请人： Shyam Surthi ,  Hung-Ming Tsai

    发明人： Shyam Surthi ,  Hung-Ming Tsai

    IPC分类号： H01L23/52 ,  H01L21/768

    CPC分类号： H01L27/1052 ,  H01L27/10826 ,  H01L27/10879 ,  H01L27/10894

    摘要： Methods are disclosed for forming connections to a memory array and a periphery of the array. The methods include forming stacks of conductive materials on the array and the periphery and forming a step between the periphery stack and the array stack. The step is removed during subsequent processing, and connections are formed from the conductive materials remaining on the array and the periphery. In some embodiments, the step is removed before any photolithographic processes.

    摘要翻译： 公开了用于形成到阵列的存储器阵列和外围的连接的方法。 所述方法包括在阵列和周边上形成导电材料的叠层并在外围堆叠和阵列堆叠之间形成一个台阶。 在随后的处理期间移除该步骤，并且由保留在阵列和周边上的导电材料形成连接。 在一些实施例中，在任何光刻工艺之前去除该步骤。

    FLASH MEMORY AND FLASH MEMORY ARRAY
    8.
    发明申请
    FLASH MEMORY AND FLASH MEMORY ARRAY 审中-公开
    闪存和闪存存储阵列

    公开(公告)号：US20100097854A1

    公开(公告)日：2010-04-22

    申请号：US12352588

    申请日：2009-01-12

    申请人： Jen-Jui Huang ,  Hung-Ming Tsai ,  Kuo-Chung Chen

    发明人： Jen-Jui Huang ,  Hung-Ming Tsai ,  Kuo-Chung Chen

    IPC分类号： G11C16/04 ,  H01L29/788 ,  H01L27/115

    CPC分类号： H01L27/11521 ,  G11C16/3427 ,  H01L29/40114 ,  H01L29/42336 ,  H01L29/66825 ,  H01L29/7881

    摘要： A flash memory including a substrate having a recess, a buried bit line, a word line, a single side insulating layer, a floating gate, a tunneling dielectric layer, a control gate, and an inter-gate dielectric layer is provided. The buried bit line extends below the recess of the substrate along a first direction. The word line is on the substrate, and extends above the recess along a second direction. The single side insulating layer is on a first sidewall of the recess. The floating gate is on a second sidewall of the recess to be opposite to the single side insulating layer. The tunneling dielectric layer is sandwiched by the floating gate and the substrate to contact the buried bit line. The control gate fills the recess and contacts the word line. The inter-gate dielectric layer is sandwiched by the control gate and the floating gate.

    摘要翻译： 提供一种闪速存储器，其包括具有凹部，掩埋位线，字线，单侧绝缘层，浮动栅极，隧道电介质层，控制栅极和栅极间介电层的衬底。 埋置的位线沿着第一方向延伸到衬底的凹部下方。 字线在基板上，并且沿着第二方向在凹部上方延伸。 单侧绝缘层位于凹部的第一侧壁上。 浮动栅极位于凹槽的与单侧绝缘层相对的第二侧壁上。 隧道电介质层被浮动栅极和衬底夹在接触掩埋位线之间。 控制门填充凹槽并接触字线。 栅极间电介质层被控制栅极和浮动栅极夹在中间。

    Compensation system for an engine of a vehicle
    9.
    发明授权
    Compensation system for an engine of a vehicle 失效
    车辆发动机补偿系统

    公开(公告)号：US06694737B2

    公开(公告)日：2004-02-24

    申请号：US10161386

    申请日：2002-05-31

    申请人： Yeong-Shyeong Tsai ,  Shinn-Jieh Wang ,  Hung-Ming Tsai ,  Po-Yu Tsai ,  Lu-Hsing Tsai

    发明人： Yeong-Shyeong Tsai ,  Shinn-Jieh Wang ,  Hung-Ming Tsai ,  Po-Yu Tsai ,  Lu-Hsing Tsai

    IPC分类号： F02G300

    CPC分类号： F01K21/005 ,  F01K23/061

    摘要： A compensation system for a vehicle has a main reservoir, a vapor collector, an expansion tube, a working liquid supplying reservoir and an oil tank. The main reservoir is connected with the vapor collector via a heat absorbing pipe. The expansion tube is connected to the vapor collector. Two turbines are rotatably received in the expansion tube and are connected to a generator. The supplying reservoir is connected to the expansion tube. The oil tank encloses the expansion tube and absorbs the heat of the waste gas dissipated from the engine. Accordingly, the turbines will be actuated to rotate by means of expansion of volume of the working liquid sprayed into the expansion tube to actuate the generator to operate. The waste heat dissipated from the engine of the vehicle can be efficiently reused.

    摘要翻译： 车辆的补偿系统具有主容器，蒸气收集器，膨胀管，工作液供给容器和油箱。 主储槽通过吸热管与蒸气收集器连接。 膨胀管连接到蒸气收集器。 两个涡轮机可旋转地容纳在膨胀管中并连接到发电机。 供应储存器连接到膨胀管。 油箱封闭膨胀管并吸收从发动机排出的废气的热量。 因此，涡轮机将通过膨胀喷射到膨胀管中的工作液体的体积而致动而旋转，以驱动发电机进行操作。 可以有效地重新利用从车辆的发动机消散的废热。

    Memory process and memory structure made thereby
    10.
    发明授权
    Memory process and memory structure made thereby 有权
    由此产生的内存进程和内存结构

    公开(公告)号：US09123784B2

    公开(公告)日：2015-09-01

    申请号：US13590204

    申请日：2012-08-21

    申请人： Vivek Gopalan ,  Robert Kerr ,  Hung-Ming Tsai

    发明人： Vivek Gopalan ,  Robert Kerr ,  Hung-Ming Tsai

    IPC分类号： H01L27/108 ,  H01L21/768

    CPC分类号： H01L21/76883 ,  H01L21/76802 ,  H01L27/108 ,  H01L27/10891

    摘要： A memory process is described. A substrate is provided, having therein trenches and conductive lines buried in the trenches and having thereon an array area, wherein each of the conductive lines has an array portion in the array area. A contact area apart from the array area is defined on the substrate, wherein each of the conductive lines has a contact portion in the contact area. The substrate between the contact portions of the conductive lines is etched down to below the tops of the conductive layers to form gaps between the contact portions of the conductive lines. The gaps are then filled with an insulating layer.

    摘要翻译： 描述记忆过程。 提供了一种衬底，其中具有埋在沟槽中的沟槽和导线，并且具有阵列区域，其中每条导线在阵列区域中具有阵列部分。 在基板上限定与阵列区域分开的接触区域，其中每个导线在接触区域中具有接触部分。 导电线的接触部分之间的衬底被蚀刻到导电层的顶部之下，以在导电线的接触部分之间形成间隙。 然后用绝缘层填充该间隙。