公开(公告)号：US08877598B2

公开(公告)日：2014-11-04

申请号：US13486050

申请日：2012-06-01

申请人： Chung-Ming Wang ,  Yu Lun Liu ,  Chia-Chu Liu ,  Ya Hui Chang ,  Kuei-Shun Chen

发明人： Chung-Ming Wang ,  Yu Lun Liu ,  Chia-Chu Liu ,  Ya Hui Chang ,  Kuei-Shun Chen

IPC分类号： H01L21/336 ,  H01L21/4763 ,  H01L29/786 ,  H01L27/12

CPC分类号： H01L29/78606 ,  H01L21/02118 ,  H01L21/02282 ,  H01L21/0271 ,  H01L21/2652 ,  H01L21/31144 ,  H01L27/1292 ,  H01L29/6659

摘要： A method of forming a integrated circuit pattern. The method includes forming gate stacks on a substrate, two adjacent gate stacks of the gate stacks being spaced away by a dimension G; forming a nitrogen-containing layer on the gate stacks and the substrate; forming a dielectric material layer on the nitrogen-containing layer, the dielectric material layer having a thickness T substantially less than G/2; coating a photoresist layer on the dielectric material layer; and patterning the photoresist layer by a lithography process.

摘要翻译： 一种形成集成电路图案的方法。 该方法包括在衬底上形成栅极堆叠，门堆叠的两个相邻栅堆叠被尺寸G间隔开; 在栅叠层和衬底上形成含氮层; 在所述含氮层上形成介电材料层，所述电介质材料层的厚度T大致小于G / 2; 在介电材料层上涂覆光致抗蚀剂层; 并通过光刻工艺图案化光致抗蚀剂层。

公开(公告)号：US08431291B2

公开(公告)日：2013-04-30

申请号：US13281198

申请日：2011-10-25

申请人： George Liu ,  Kuei Shun Chen ,  Chih-Yang Yeh ,  Te-Chih Huang ,  Wen-Hao Liu ,  Ying-Chou Cheng ,  Boren Luo ,  Tsong-Hua Ou ,  Yu-Po Tang ,  Wen-Chun Huang ,  Ru-Gun Liu ,  Shu-Chen Lu ,  Yu Lun Liu ,  Yao-Ching Ku ,  Tsai-Sheng Gau

发明人： George Liu ,  Kuei Shun Chen ,  Chih-Yang Yeh ,  Te-Chih Huang ,  Wen-Hao Liu ,  Ying-Chou Cheng ,  Boren Luo ,  Tsong-Hua Ou ,  Yu-Po Tang ,  Wen-Chun Huang ,  Ru-Gun Liu ,  Shu-Chen Lu ,  Yu Lun Liu ,  Yao-Ching Ku ,  Tsai-Sheng Gau

IPC分类号： G03F1/00 ,  G03F1/36

CPC分类号： G06F17/5068 ,  G03F1/00 ,  G03F1/68

摘要： An intensity selective exposure photomask, also describes as a gradated photomask, is provided. The photomask includes a first region including a first array of sub-resolution features. The first region blocks a first percentage of the incident radiation. The photomask also includes a second region including a second array of sub-resolution features. The second region blocks a second percentage of the incident radiation different that the first percentage.

摘要翻译： 还提供强度选择性曝光光掩模，还描述为渐变光掩模。 光掩模包括包括第一子分解特征阵列的第一区域。 第一个区域阻止了第一个入射辐射的百分比。 光掩模还包括包括第二子分辨率特征阵列的第二区域。 第二个区域阻止了第二个百分比的入射辐射不同于第一个百分比。

公开(公告)号：US20110012024A1

公开(公告)日：2011-01-20

申请号：US12560451

申请日：2009-09-16

申请人： Gou-Chung Chi ,  Ping-Jung Huang ,  Chung-Wei Chen ,  Ching-Jen Pan ,  Yu-Lun Liu ,  Fu-Chun Tsao

发明人： Gou-Chung Chi ,  Ping-Jung Huang ,  Chung-Wei Chen ,  Ching-Jen Pan ,  Yu-Lun Liu ,  Fu-Chun Tsao

IPC分类号： H01J27/02

CPC分类号： H01J27/26 ,  H01J37/08 ,  H01J37/3171

摘要： A method for preparing an ion source from nanoparticles is provided. The method includes the steps of: providing nanoparticles, vaporizing the nanoparticles from a solid state to a gaseous state, and ionizing the gas to form the ion source. The ion source is prepared by placing solid nanoparticles in a stainless tube, heating and vaporizing the solid nanoparticles into a gaseous state, and ionizing the gas. The gas can be formed at a lower heating temperature than when solid lumps are used because solid nanoparticles have a lower melting point than solid lumps. Thus, the heating temperature is lowered, and the preparing time of the ion source is shortened. Besides, under the same temperature, an ion source prepared from nanoparticles provides higher vapor pressure and allows a higher implantation dose than when the ion source is prepared from solid lumps, thus expanding the applicability of ion implantation technology.

摘要翻译： 提供了一种从纳米颗粒制备离子源的方法。 该方法包括以下步骤：提供纳米颗粒，将纳米颗粒从固体状态汽化成气态，并使气体离子化形成离子源。 离子源通过将固体纳米颗粒置于不锈钢管中，将固体纳米颗粒加热并汽化成气态并使气体离子化来制备。 气体可以在比使用固体块时低的加热温度下形成，因为固体纳米颗粒具有比固体块更低的熔点。 因此，加热温度降低，离子源的制备时间缩短。 此外，在相同温度下，从纳米颗粒制备的离子源提供更高的蒸气压力，并且允许比从固体块制备离子源时更高的注入剂量，从而扩大了离子注入技术的适用性。

公开(公告)号：US08872339B2

公开(公告)日：2014-10-28

申请号：US13370828

申请日：2012-02-10

申请人： Chia-Chu Liu ,  Yi-Shien Mor ,  Kuei Shun Chen ,  Yu Lun Liu ,  Han-Hsun Chang ,  Shiao-Chian Yeh

发明人： Chia-Chu Liu ,  Yi-Shien Mor ,  Kuei Shun Chen ,  Yu Lun Liu ,  Han-Hsun Chang ,  Shiao-Chian Yeh

IPC分类号： H01L23/482 ,  H01L23/485 ,  H01L21/02

CPC分类号： H01L21/76879 ,  H01L21/32139 ,  H01L21/76802 ,  H01L21/76885 ,  H01L27/0629 ,  H01L2924/0002

摘要： A structure includes a substrate, a first supporting member over the substrate, a second supporting member over the substrate, and a layer of material over the substrate and covering the first supporting member and the second supporting member. The first supporting member has a first width, and the second supporting member has a second width. The first supporting member and the second supporting member are separated by a gap region. The first width is at least 10 times the second width, and a gap width of the gap region ranges from 5 to 30 times the second width.

摘要翻译： 一种结构包括基底，在基底上方的第一支撑构件，在基底上方的第二支撑构件，以及在基底上方的覆盖第一支撑构件和第二支撑构件的材料层。 第一支撑构件具有第一宽度，并且第二支撑构件具有第二宽度。 第一支撑构件和第二支撑构件由间隙区域分开。 第一宽度为第二宽度的至少10倍，间隙区域的间隙宽度为第二宽度的5至30倍。

公开(公告)号：US08765363B2

公开(公告)日：2014-07-01

申请号：US13478559

申请日：2012-05-23

申请人： Chung-Ming Wang ,  Yu Lun Liu ,  Chia-Chu Liu ,  Kuei-Shun Chen

发明人： Chung-Ming Wang ,  Yu Lun Liu ,  Chia-Chu Liu ,  Kuei-Shun Chen

IPC分类号： G03F7/38

CPC分类号： G03F7/38 ,  G03F7/09 ,  H01L21/0274 ,  H01L21/76224

摘要： A method of forming a integrated circuit pattern. The method includes coating a photoresist layer on a substrate; performing a lithography exposure process to the photoresist layer; performing a multiple-step post-exposure-baking (PEB) process to the photoresist layer; and developing the photoresist layer to form a patterned photoresist layer.

摘要翻译： 一种形成集成电路图案的方法。 该方法包括在基底上涂覆光致抗蚀剂层; 对光致抗蚀剂层进行光刻曝光工艺; 对光致抗蚀剂层进行多步曝光后烘烤（PEB）处理; 并且显影光致抗蚀剂层以形成图案化的光致抗蚀剂层。

公开(公告)号：US20130316510A1

公开(公告)日：2013-11-28

申请号：US13478559

申请日：2012-05-23

申请人： Chung-Ming Wang ,  Yu Lun Liu ,  Chia-Chu Liu ,  Kuei-Shun Chen

发明人： Chung-Ming Wang ,  Yu Lun Liu ,  Chia-Chu Liu ,  Kuei-Shun Chen

IPC分类号： H01L21/336 ,  H01L21/302 ,  G03F7/20

CPC分类号： G03F7/38 ,  G03F7/09 ,  H01L21/0274 ,  H01L21/76224

摘要： A method of forming a integrated circuit pattern. The method includes coating a photoresist layer on a substrate; performing a lithography exposure process to the photoresist layer; performing a multiple-step post-exposure-baking (PEB) process to the photoresist layer; and developing the photoresist layer to form a patterned photoresist layer.

摘要翻译： 一种形成集成电路图案的方法。 该方法包括在基底上涂覆光致抗蚀剂层; 对光致抗蚀剂层进行光刻曝光工艺; 对光致抗蚀剂层进行多步曝光后烘烤（PEB）处理; 并且显影光致抗蚀剂层以形成图案化的光致抗蚀剂层。

公开(公告)号：US20130207265A1

公开(公告)日：2013-08-15

申请号：US13370828

申请日：2012-02-10

申请人： Chia-Chu LIU ,  Yi-Shien MOR ,  Kuei-Shun CHEN ,  Yu Lun LIU ,  Han-Hsun CHANG ,  Shiao-Chian YEH

发明人： Chia-Chu LIU ,  Yi-Shien MOR ,  Kuei-Shun CHEN ,  Yu Lun LIU ,  Han-Hsun CHANG ,  Shiao-Chian YEH

IPC分类号： H01L23/482 ,  H01L23/485 ,  H01L21/02

CPC分类号： H01L21/76879 ,  H01L21/32139 ,  H01L21/76802 ,  H01L21/76885 ,  H01L27/0629 ,  H01L2924/0002

摘要： A structure includes a substrate, a first supporting member over the substrate, a second supporting member over the substrate, and a layer of material over the substrate and covering the first supporting member and the second supporting member. The first supporting member has a first width, and the second supporting member has a second width. The first supporting member and the second supporting member are separated by a gap region. The first width is at least 10 times the second width, and a gap width of the gap region ranges from 5 to 30 times the second width.

摘要翻译： 一种结构包括基底，在基底上方的第一支撑构件，在基底上方的第二支撑构件，以及在基底上方的覆盖第一支撑构件和第二支撑构件的材料层。 第一支撑构件具有第一宽度，并且第二支撑构件具有第二宽度。 第一支撑构件和第二支撑构件由间隙区域分开。 第一宽度是第二宽度的至少10倍，间隙区域的间隙宽度是第二宽度的5至30倍。

公开(公告)号：US07969528B2

公开(公告)日：2011-06-28

申请号：US12485423

申请日：2009-06-16

申请人： Ming-Chuan Hung ,  Chun-Chang Chiu ,  Hsu-Cheng Yeh ,  Chuan-Fa Lee ,  Yu-Lun Liu

发明人： Ming-Chuan Hung ,  Chun-Chang Chiu ,  Hsu-Cheng Yeh ,  Chuan-Fa Lee ,  Yu-Lun Liu

IPC分类号： G02F1/1333 ,  G02F1/1335

CPC分类号： G02F1/133308 ,  G02F2001/133311 ,  G02F2001/133314 ,  G02F2001/13332 ,  G02F2001/133325

摘要： A method for assembling a liquid crystal display device includes: a) assembling together a front frame, a liquid crystal panel and an optical plate unit in a dust-free environment to form a first unit in a manner that the liquid crystal panel closes an opening in the front frame and that a sealed state is established between the liquid crystal panel and the optical plate unit; b) assembling a circuit board to one side of a rear frame without requirement of a dust-free environment to form a second unit; c) assembling a light source to one of the first and second units; and d) interconnecting the first and second units without requirement of a dust-free environment in a manner that the light source is able to provide light to a light-entrance surface of the optical plate unit.

摘要翻译： 液晶显示装置的组装方法包括：a）在无尘环境下将前框架，液晶面板和光板单元组装在一起，形成第一单元，使得液晶面板封闭开口 并且在液晶面板和光学板单元之间建立密封状态; b）将电路板组装在后框架的一侧，而不需要无尘环境以形成第二单元; c）将光源组装到第一和第二单元之一; 以及d）使所述第一和第二单元互连，而不需要无尘环境，使得所述光源能够向所述光学板单元的光入射表面提供光。

公开(公告)号：US20090322981A1

公开(公告)日：2009-12-31

申请号：US12485423

申请日：2009-06-16

申请人： Ming-Chuan HUNG ,  Chun-Chang CHIU ,  Hsu-Cheng YEH ,  Chuan-Fa LEE ,  Yu-Lun LIU

发明人： Ming-Chuan HUNG ,  Chun-Chang CHIU ,  Hsu-Cheng YEH ,  Chuan-Fa LEE ,  Yu-Lun LIU

IPC分类号： G02F1/1333 ,  H01J9/20

CPC分类号： G02F1/133308 ,  G02F2001/133311 ,  G02F2001/133314 ,  G02F2001/13332 ,  G02F2001/133325

摘要： A method for assembling a liquid crystal display device includes: a) assembling together a front frame, a liquid crystal panel and an optical plate unit in a dust-free environment to form a first unit in a manner that the liquid crystal panel closes an opening in the front frame and that a sealed state is established between the liquid crystal panel and the optical plate unit; b) assembling a circuit board to one side of a rear frame without requirement of a dust-free environment to form a second unit; c) assembling a light source to one of the first and second units; and d) interconnecting the first and second units without requirement of a dust-free environment in a manner that the light source is able to provide light to a light-entrance surface of the optical plate unit.

摘要翻译： 液晶显示装置的组装方法包括：a）在无尘环境下将前框架，液晶面板和光板单元组装在一起，形成第一单元，使得液晶面板封闭开口 并且在液晶面板和光学板单元之间建立密封状态; b）将电路板组装在后框架的一侧，而不需要无尘环境以形成第二单元; c）将光源组装到第一和第二单元之一; 以及d）使所述第一和第二单元互连，而不需要无尘环境，使得所述光源能够向所述光学板单元的光入射表面提供光。

公开(公告)号：US08673520B2

公开(公告)日：2014-03-18

申请号：US13046265

申请日：2011-03-11

申请人： George Liu ,  Kuei Shun Chen ,  Chih-Yang Yeh ,  Te-Chih Huang ,  Wen-Hao Liu ,  Ying-Chou Cheng ,  Boren Luo ,  Tsong-Hua Ou ,  Yu-Po Tang ,  Wen-Chun Huang ,  Ru-Gun Liu ,  Shu-Chen Lu ,  Yu Lun Liu ,  Yao-Ching Ku ,  Tsai-Sheng Gau

发明人： George Liu ,  Kuei Shun Chen ,  Chih-Yang Yeh ,  Te-Chih Huang ,  Wen-Hao Liu ,  Ying-Chou Cheng ,  Boren Luo ,  Tsong-Hua Ou ,  Yu-Po Tang ,  Wen-Chun Huang ,  Ru-Gun Liu ,  Shu-Chen Lu ,  Yu Lun Liu ,  Yao-Ching Ku ,  Tsai-Sheng Gau

IPC分类号： G03F1/00

CPC分类号： G06F17/5068 ,  G03F1/00 ,  G03F1/68

摘要： An intensity selective exposure photomask, also describes as a gradated photomask, is provided. The photomask includes a first region including a first array of sub-resolution features. The first region blocks a first percentage of the incident radiation. The photomask also includes a second region including a second array of sub-resolution features. The second region blocks a second percentage of the incident radiation different that the first percentage. Each of the features of the first and second array includes an opening disposed in an area of attenuating material.

摘要翻译： 还提供强度选择性曝光光掩模，还描述为渐变光掩模。 光掩模包括包括第一子分解特征阵列的第一区域。 第一个区域阻止了第一个入射辐射的百分比。 光掩模还包括包括第二子分辨率特征阵列的第二区域。 第二个区域阻止了第二个百分比的入射辐射不同于第一个百分比。 第一和第二阵列的每个特征包括设置在衰减材料区域中的开口。