公开(公告)号：US5313453A

公开(公告)日：1994-05-17

申请号：US854888

申请日：1992-03-20

申请人： Yoshihiro Uchida ,  Satoshi Kakuma ,  Naoyuki Izawa ,  Yasuhiro Aso ,  Shuji Yoshimura ,  Masami Murayama

发明人： Yoshihiro Uchida ,  Satoshi Kakuma ,  Naoyuki Izawa ,  Yasuhiro Aso ,  Shuji Yoshimura ,  Masami Murayama

IPC分类号： H04L1/00 ,  H04L12/26 ,  H04L12/56 ,  H04Q11/04 ,  H04J3/14

CPC分类号： H04L12/5601 ,  H04L1/0083 ,  H04L12/2697 ,  H04L43/50 ,  H04L49/1553 ,  H04L49/255 ,  H04L49/309 ,  H04Q11/0478 ,  H04J2203/0019 ,  H04L2012/5628 ,  H04L2012/5672 ,  H04L2012/5681

摘要： A first form of an ATM channel testing apparatus tests an ATM channel by having a test cell detector in each switch to detect whether or not the switch appropriately switches a test cell generated by a test cell generating trunk. A second form of an ATM channel testing apparatus easily tests an ATM channel by having test cell generators provided for the respective input highways sequentially generating test cells including test cell identifying information and input highway identifying information, and having test cell checkers provided respectively for the output highways simply tally the test cells by the respective input highways. A third form of an ATM channel testing apparatus tests an ATM channel with less pieces of hardware by having turnaround parts in respective ordinary trunks sequentially turn around a test cell generated by a test cell generating trunk to be finally returned to the test cell generating trunk. A fourth form of an ATM channel testing apparatus tests an ATM channel by having a test cell checker provided for each of output highways to examine whether or not the test data carried in respective octets of the payloads in extracted test cells are of consecutive values.

摘要翻译： ATM信道测试装置的第一形式通过在每个交换机中具有测试小区检测器来检测ATM信道，以检测交换机是否适当地切换由测试小区产生的中继线产生的测试小区。 ATM信道测试装置的第二种形式通过为相应的输入高速公路提供测试单元发生器来容易地测试ATM信道，该测试单元发生器依次产生包括测试单元识别信息和输入公路识别信息的测试单元，并且具有分别为输出提供的测试单元检查器 高速公路通过相应的输入高速公路简单地测试单元格。 ATM信道测试装置的第三种形式通过在相应的普通中继线中具有周转部分来顺序地转换由测试小区生成中继线产生的测试小区，以最终返回到测试小区生成中继线，来测试具有较少硬件的ATM信道。 ATM信道测试装置的第四种形式通过为每个输出高速公路提供测试单元检查来检测ATM信道，以检查提取的测试小区中有效载荷的相应八位字节中承载的测试数据是否是连续值。

公开(公告)号：US07551612B2

公开(公告)日：2009-06-23

申请号：US09277213

申请日：1999-03-26

申请人： Yasusi Kobayashi ,  Yoshihiro Watanabe ,  Hiroshi Nishida ,  Masami Murayama ,  Naoyuki Izawa ,  Yasuhiro Aso ,  Yoshihiro Uchida ,  Hiromi Yamanaka ,  Jin Abe ,  Yoshihisa Tsuruta ,  Yoshiharu Kato ,  Satoshi Kakuma ,  Shiro Uriu ,  Noriko Samejima ,  Eiji Ishioka ,  Shigeru Sekine ,  Yoshiyuki Karakawa ,  Atsushi Kagawa ,  Mikio Nakayama ,  Miyuki Kawataka ,  Satoshi Esaka ,  Nobuyuki Tsutsui ,  Fumio Hirase ,  Atsuko Suzuki ,  Shouji Kohira ,  Kenichi Okabe ,  Takashi Hatano ,  Yasuhiro Nishikawa ,  Jun Itoh ,  Shinichi Araya

发明人： Yasusi Kobayashi ,  Yoshihiro Watanabe ,  Hiroshi Nishida ,  Masami Murayama ,  Naoyuki Izawa ,  Yasuhiro Aso ,  Yoshihiro Uchida ,  Hiromi Yamanaka ,  Jin Abe ,  Yoshihisa Tsuruta ,  Yoshiharu Kato ,  Satoshi Kakuma ,  Shiro Uriu ,  Noriko Samejima ,  Eiji Ishioka ,  Shigeru Sekine ,  Yoshiyuki Karakawa ,  Atsushi Kagawa ,  Mikio Nakayama ,  Miyuki Kawataka ,  Satoshi Esaka ,  Nobuyuki Tsutsui ,  Fumio Hirase ,  Atsuko Suzuki ,  Shouji Kohira ,  Kenichi Okabe ,  Takashi Hatano ,  Yasuhiro Nishikawa ,  Jun Itoh ,  Shinichi Araya

IPC分类号： H04L12/66

CPC分类号： H04L5/16 ,  H04L2012/5628 ,  H04L2012/5645 ,  H04L2012/5652 ,  H04Q11/0478

摘要： A switch station including an ATM switch; a memory storing control data for operations of the switch station; an intra-station device, accommodating a subscriber line, performing communication operation on subscriber ATM cell; a control processor generating control information in link access protocol (LAP) format; and an interface unit converting LAP control information into ATM cell to the intra-station device through the ATM switch, wherein the control information is communicated according to LAP, the intra-station device receives the control information and transmits a direct memory access request to obtain control data stored in the memory, the interface unit obtains and converts the data format of the control data into ATM cell to transmit to the intra-station device through the switch, and the intra-station device performs the communication operation on the subscriber ATM cell based on the control data received through the switch.

摘要翻译： 包括ATM交换机的交换台; 存储用于所述开关站的操作的控制数据的存储器; 站内设备，容纳用户线路，对用户ATM信元进行通信操作; 控制处理器生成链路接入协议（LAP）格式的控制信息; 以及接口单元，其通过ATM交换机将LAP控制信息转换为ATM信元到站内设备，其中根据LAP传送控制信息，站内设备接收控制信息并发送直接存储器访问请求以获得 存储在存储器中的控制数据，接口单元获取控制数据的数据格式并将其转换成ATM信元，通过交换机发送到站内设备，并且站内设备对用户ATM信元进行通信操作 基于通过交换机接收的控制数据。

公开(公告)号：US06333932B1

公开(公告)日：2001-12-25

申请号：US08518110

申请日：1995-08-21

申请人： Yasusi Kobayasi ,  Yoshihiro Watanabe ,  Hiroshi Nishida ,  Masami Murayama ,  Naoyuki Izawa ,  Yasuhiro Aso ,  Yoshihiro Uchida ,  Hiromi Yamanaka ,  Jin Abe ,  Yoshihisa Tsuruta ,  Yoshiharu Kato ,  Satoshi Kakuma ,  Shiro Uriu ,  Noriko Samejima ,  Eiji Ishioka ,  Shigeru Sekine ,  Yoshiyuki Karakawa ,  Atsushi Kagawa ,  Mikio Nakayama ,  Miyuki Kawataka ,  Satoshi Esaka ,  Nobuyuki Tsutsui ,  Fumio Hirase ,  Atsuko Suzuki ,  Shouji Kohira ,  Kenichi Okabe ,  Takashi Hatano ,  Yasuhiro Nishikawa ,  Jun Itoh ,  Shinichi Araya

发明人： Yasusi Kobayasi ,  Yoshihiro Watanabe ,  Hiroshi Nishida ,  Masami Murayama ,  Naoyuki Izawa ,  Yasuhiro Aso ,  Yoshihiro Uchida ,  Hiromi Yamanaka ,  Jin Abe ,  Yoshihisa Tsuruta ,  Yoshiharu Kato ,  Satoshi Kakuma ,  Shiro Uriu ,  Noriko Samejima ,  Eiji Ishioka ,  Shigeru Sekine ,  Yoshiyuki Karakawa ,  Atsushi Kagawa ,  Mikio Nakayama ,  Miyuki Kawataka ,  Satoshi Esaka ,  Nobuyuki Tsutsui ,  Fumio Hirase ,  Atsuko Suzuki ,  Shouji Kohira ,  Kenichi Okabe ,  Takashi Hatano ,  Yasuhiro Nishikawa ,  Jun Itoh ,  Shinichi Araya

IPC分类号： H04Q1104

CPC分类号： H04L5/16 ,  H04L2012/5628 ,  H04L2012/5645 ,  H04L2012/5652 ,  H04Q11/0478

摘要： The quality and performance of the connectionless communications system are improved. When a BOM is received, the destination address DA of the L3-PDU stored in the payload of the BOM is retrieved, and the tag information is obtained from the DA (S11). The output message identifier MID is reserved (S12), and the tag information and output MID are assigned to the BOM (S13). Then, the tag information and output MID are written to the table. When a COM is received, the tag information and output MID are retrieved using the MID of the COM as a key, and the information is provided for the COM (S31 and S32). When an EOM is received, the tag information and output MID are retrieved using the MID of the EOM as a key, and the information is provided for the EOM (S41 and S42). Then, the output MID is released (S43).

摘要翻译： 无连接通信系统的质量和性能得到提高。 当接收到BOM时，检索存储在BOM的有效载荷中的L3-PDU的目的地地址DA，并从DA获得标签信息（S11）。 输出消息标识符MID被保留（S12），标签信息和输出MID被分配给BOM（S13）。 然后，将标签信息和输出MID写入表中。 当接收到COM时，使用COM的MID作为密钥检索标签信息和输出MID，并为COM提供信息（S31和S32）。 当接收到EOM时，使用EOM的MID作为密钥检索标签信息和输出MID，并且为EOM提供信息（S41和S42）。 然后，释放输出MID（S43）。

公开(公告)号：US5444658A

公开(公告)日：1995-08-22

申请号：US206221

申请日：1994-03-07

申请人： Naoyuki Izawa ,  Yasuhiro Aso ,  Yoshihiro Uchida ,  Satoshi Kakuma

发明人： Naoyuki Izawa ,  Yasuhiro Aso ,  Yoshihiro Uchida ,  Satoshi Kakuma

IPC分类号： H04J3/06 ,  H04L7/00 ,  G11C7/00

CPC分类号： H04J3/0626

摘要： An elastic store memory circuit includes first and second elastic store memories. Each of the first and second elastic store memories generates a phase comparison signal when a phase difference between a write timing and a read timing is within a predetermined phase range. The elastic store memory circuit also includes a selector which selects either the input data read out from the first elastic store memory or the input data read out from the second elastic store memory, and a slip signal generator for generating a slip signal on the basis of a write reset timing at which the first and second elastic store memories are reset, a read reset timing at which the first and second elastic store memories are reset, and the phase comparison signal. The slip signal indicates which one of the write reset timing and the read reset timing precedes the other one.

摘要翻译： 弹性存储存储器电路包括第一和第二弹性存储器存储器。 当写入定时和读取定时之间的相位差在预定相位范围内时，第一和第二弹性存储存储器中的每一个产生相位比较信号。 弹性存储器电路还包括选择器，其选择从第一弹性存储存储器读出的输入数据或从第二弹性存储器读出的输入数据，以及滑移信号发生器，用于基于 复位第一和第二弹性存储器的写入复位定时，复位第一和第二弹性存储器的读取复位定时以及相位比较信号。 打印信号指示写入复位定时和读取复位定时中哪一个先于另一个。

公开(公告)号：US5153578A

公开(公告)日：1992-10-06

申请号：US542043

申请日：1990-06-22

申请人： Naoyuki Izawa ,  Yoshihiro Uchida ,  Masami Murayama ,  Yasuhiro Aso

发明人： Naoyuki Izawa ,  Yoshihiro Uchida ,  Masami Murayama ,  Yasuhiro Aso

IPC分类号： H04Q11/04 ,  H04L12/70 ,  H04L12/931 ,  H04Q3/00

CPC分类号： H04L49/552 ,  H04L49/103 ,  H04L49/1523 ,  H04L49/25

摘要： An ATM switching system includes two ATM switches which are the same as each other. Each of the ATM switches includes a switch buffer, and a cell counter which indicates the number of cells in the switch buffer. Each of the ATM switches also includes a difference calculator, which calculates the difference between the number of cells in the two switch buffers when one of the ATM switches is changed from an out-of-service state to a slave mode. At this time, the other ATM switch operates in a master mode. Each of the ATM switches further includes a dummy cell generator, which generates a number of dummy cells which corresponds to the difference calculated by the difference calculator. The generated dummy cells are written into the switch buffer in the slave mode. When it is determined that when all of the dummy cells have been output from the switch buffer, the two ATM switches are syunchronized with each other.

公开(公告)号：US5295134A

公开(公告)日：1994-03-15

申请号：US853257

申请日：1992-03-18

申请人： Shuji Yoshimura ,  Satoshi Kakuma ,  Shiro Uriu ,  Naoyuki Izawa

发明人： Shuji Yoshimura ,  Satoshi Kakuma ,  Shiro Uriu ,  Naoyuki Izawa

IPC分类号： H04M3/22 ,  H04Q3/545 ,  H04Q11/04 ,  H04L12/26

CPC分类号： H04L12/5601 ,  H04L49/106 ,  H04L49/255 ,  H04L49/3081 ,  H04L49/309 ,  H04Q11/0478 ,  H04L2012/5627 ,  H04L2012/5681

摘要： An in-service activator for a broadband exchanger has a dual system structure, in which a first system and a second system form a dual pair. The first system and the second system in the dual pair each has at least one [1] channel converter and a switcher. A channel converter stores channel setting information for use in routing a cell inputted from a line, and outputs the cell inputted from the line by attaching the channel setting information to the cell. The switcher switches a cell outputted from a channel converter. The interfacer stores, in a channel converter of a to-be-activated standby system in the dual pair, the channel setting information read from the corresponding channel converter of an act system in the duplex pair.

摘要翻译： 用于宽带交换机的在线激活器具有双系统结构，其中第一系统和第二系统形成双对。 双对中的第一系统和第二系统每个具有至少一个（1）信道转换器和切换器。 通道转换器存储用于路由从一行输入的单元的通道设置信息，并且通过将通道设置信息附加到该单元来输出从该行输入的单元。 切换器切换从信道转换器输出的单元。 该接口在双对中的待激活待机系统的信道转换器中存储从双工对中的动作系统的相应信道转换器读取的信道设置信息。

公开(公告)号：US5521924A

公开(公告)日：1996-05-28

申请号：US384224

申请日：1995-02-06

申请人： Satoshi Kakuma ,  Shuji Yoshimura ,  Naoyuki Izawa

发明人： Satoshi Kakuma ,  Shuji Yoshimura ,  Naoyuki Izawa

IPC分类号： H04L29/06 ,  H04L12/66 ,  H04L12/951 ,  H04M3/00 ,  H04Q11/04 ,  H04J3/24

CPC分类号： H04Q11/0478 ,  H04L2012/5614 ,  H04L2012/5672

摘要： On receiving voice data from a subscriber accommodated in a broadband network, a terminal adaptor separately puts the voice data in cells in 8-bit units every 125 .mu.s separately, and transmits the cells by a remote switching unit in the broadband network to subscriber terminal equipment. The subscriber terminal equipment accommodates and processes each item of 8-bit data in 24 channels in the PCM format, puts in cells the PCM-formatted data in 24 channels, and sends the cells sequentially to a broadband network transmission line through the remote switching unit. On receiving the above described data in cells, an adaptor provided between the broadband network and an existing telephone network converts the data to the PCM transmission format, and sends them to the existing telephone network after adding a signaling bit to them.

摘要翻译： 在从宽带网络中收到的用户接收语音数据的情况下，终端适配器分别将每个125μs的8位单元中的话音数据单独放置，并将宽带网络中的远程交换单元的小区发送给用户终端 设备。 用户终端设备以PCM格式适应和处理24个信道中的每个8位数据项，将PCM格式的数据单元格放入24个信道中，并通过远程交换单元将单元顺序发送到宽带网络传输线 。 在单元中接收上述数据之后，在宽带网络和现有电话网络之间提供的适配器将数据转换为PCM传输格式，并在向它们添加信令位之后将其发送到现有的电话网络。

公开(公告)号：US5251204A

公开(公告)日：1993-10-05

申请号：US762338

申请日：1991-09-19

申请人： Naoyuki Izawa ,  Shuji Yoshimura ,  Satoshi Kakuma

发明人： Naoyuki Izawa ,  Shuji Yoshimura ,  Satoshi Kakuma

IPC分类号： H04J3/14 ,  H04J3/16 ,  H04L12/70 ,  H04Q11/04

CPC分类号： H04Q11/0478 ,  H04J3/14 ,  H04J3/1617 ,  H04J2203/0089 ,  H04L2012/5628 ,  H04L2012/5672

摘要： The present invention relates to a transmission line test method in the broadband ISDN for assembling an ATM formatted cell into a frame and sending it in the synchronous optical network (SONET) formatted transmission line as a protocol of an optical fiber communication network. First, test data are inserted into an ATM cell according to a command of the central controlling unit in an ATM switching unit. Then, the test cell is sent through an ATM switch in the ATM switching unit after the insertion of the test data; the test data are extracted from the test cell turned around by an ATM layer provided between the ATM switch and the SONET-formatted transmission line or by a subscriber terminal adapter, or from the test frame (including the test cell) turned around by a terminator in the SONET-formatted transmission line or by a network terminator at a subscriber terminal in the transmission line; and finally a transmission test is conducted by checking the data in the line up to each turnaround point.

摘要翻译： 本发明涉及宽带ISDN中用于将ATM格式化小区组装成帧并在作为光纤通信网络的协议的同步光网络（SONET）格式化传输线路中发送它的传输线路测试方法。 首先，根据ATM交换单元中的中央控制单元的命令将测试数据插入到ATM信元中。 然后，测试单元在插入测试数据之后通过ATM交换单元中的ATM交换机发送; 从由ATM交换机和SONET格式的传输线之间提供的ATM层或由用户终端适配器或由终端器转过的测试框（包括测试单元）转移的测试单元提取测试数据 在SONET格式的传输线路中，或者由传输线路中的用户终端的网络终端器; 最后通过检查直到每个周转点的行中的数据进行传输测试。

公开(公告)号：US5796734A

公开(公告)日：1998-08-18

申请号：US633151

申请日：1996-04-16

申请人： Naoyuki Izawa ,  Masami Murayama

发明人： Naoyuki Izawa ,  Masami Murayama

IPC分类号： H04Q3/00 ,  H04L12/46 ,  H04L12/801 ,  H04L12/811 ,  H04L12/911 ,  H04L12/951 ,  H04Q11/04 ,  H04L12/02

CPC分类号： H04L12/4604 ,  H04Q11/0478 ,  H04L2012/5645 ,  H04L2012/5652

摘要： A first storage unit stores a reception count, which is the number of simultaneously-occurring messages for each of subscribers corresponding to subscriber identification information. A second storage unit stores a predetermined number of the simultaneously-occurring messages, which is an upper limit of allowing the messages to occur in parallel, for each of the subscribers corresponding to the subscriber identification information. A third storage unit stores each message identification information corresponding to each of the simultaneously-occurring messages, together with the order of occurrence, for each of the subscribers corresponding to the subscriber identification information. A control unit controls transfers of the simultaneously-occurring messages, by controlling the first, second, and third storage means according to the transfer order identification information, the subscriber identification information, and the message identification information extracted from the received data unit.

摘要翻译： 第一存储单元存储对应于用户识别信息的每个用户的同时发送消息的数量的接收计数。 对于与用户识别信息对应的每个用户，第二存储单元存储预定数量的同时发生的消息，其为允许消息并行发生的上限。 第三存储单元对应于与用户识别信息对应的每个用户，存储与每个同时发生的消息相对应的每个消息标识信息以及出现顺序。 控制单元通过根据从接收数据单元提取的传送顺序识别信息，用户识别信息和消息识别信息控制第一，第二和第三存储装置来控制同时发生的消息的传送。

公开(公告)号：US5784274A

公开(公告)日：1998-07-21

申请号：US609918

申请日：1996-02-29

申请人： Masami Murayama ,  Naoyuki Izawa

发明人： Masami Murayama ,  Naoyuki Izawa

IPC分类号： H04L12/24 ,  H04L12/26 ,  G05B15/00

CPC分类号： H04L41/06 ,  H04L43/0847 ,  H04L43/16

摘要： A performance monitor system monitors a number of errors occurring in data processed in a communication apparatus having a duplex configuration formed of two systems. The performance monitor system includes a first unit for monitoring a number of errors occurring in data processed in one of the two systems a second unit for monitoring a number of errors occurring in data processed in another one of the two systems and a control unit for controlling operations of the first and second units. Each of the first and second units has a first counter outputting a first error count value and a second counter outputting a second error count value. The control unit controls the first and second counters so that the sum of the first and second error count values obtained in the first unit is equal to sum of those obtained in the second unit.

摘要翻译： 性能监视器系统监视在具有由两个系统形成的双工配置的通信设备中处理的数据中发生的许多错误。 性能监视器系统包括用于监视在两个系统之一处理的数据中发生的数量错误的第一单元，用于监视在两个系统中的另一个系统中处理的数据中出现的错误数量的第二单元和用于控制 第一单元和第二单元的操作。 第一和第二单元中的每一个具有输出第一错误计数值的第一计数器和输出第二错误计数值的第二计数器。 控制单元控制第一和第二计数器，使得在第一单元中获得的第一和第二误差计数值的和等于在第二单元中获得的和的和。