公开(公告)号：US08878333B2

公开(公告)日：2014-11-04

申请号：US13545046

申请日：2012-07-10

申请人： Youichi Nogami ,  Hidetoshi Koyama ,  Yoshitsugu Yamamoto

发明人： Youichi Nogami ,  Hidetoshi Koyama ,  Yoshitsugu Yamamoto

IPC分类号： H01L21/70 ,  H01L23/482

CPC分类号： H01L23/4855 ,  H01L23/481 ,  H01L23/482 ,  H01L23/4821 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a semiconductor substrate having a main surface; an electrode in a device region on the main surface; a metal wiring on the main surface and having a first end connected to the electrode; an electrode pad outside the device region and spaced from the metal wiring; an air gap between the main surface and an air gap forming film on the main surface, enveloping the first end of the metal wiring and the electrode, and having a first opening; a resin closing the first opening and covering a second end of the metal wiring; a liquid repellent film facing the air gap and increasing contact angle of the resin, when liquid, relative to contact angles on the semiconductor substrate and the air gap forming film; and a metal film connecting the metal wiring to the electrode pad through a second opening located in the resin.

摘要翻译： 半导体器件包括：具有主表面的半导体衬底; 主表面上的器件区域中的电极; 在主表面上的金属布线，并且具有连接到电极的第一端; 位于器件区域外部并与金属布线间隔开的电极焊盘; 主表面和主表面上的气隙形成膜之间的气隙，包围金属布线和电极的第一端，并具有第一开口; 封闭所述第一开口并覆盖所述金属布线的第二端的树脂; 相对于半导体衬底和气隙形成膜上的接触角，面向气隙的防液膜和当液体相对于树脂的接触角增大时， 以及通过位于树脂中的第二开口将金属布线连接到电极焊盘的金属膜。

公开(公告)号：US08524601B2

公开(公告)日：2013-09-03

申请号：US13334213

申请日：2011-12-22

申请人： Kenichiro Kurahashi ,  Hidetoshi Koyama ,  Kazuyuki Onoe

发明人： Kenichiro Kurahashi ,  Hidetoshi Koyama ,  Kazuyuki Onoe

IPC分类号： H01L21/302

CPC分类号： H01L21/28264 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66446 ,  H01L29/7787

摘要： A method of manufacturing a semiconductor device includes forming an insulating film on a surface of a semiconductor layer, forming a resist on a surface of the insulating film, the resist having an opening, forming a hardened layer on an inner circumference of the resist by attaching a pattern shrinking agent to the resist, the pattern shrinking agent undergoing a cross-linking reaction with the resist, etching the insulating film using the resist and the hardened layer as masks, removing the hardened layer, and forming a metal layer on a surface of the semiconductor layer, on a surface of the insulating film, and on a surface of the resist. The method further includes removing the resist and the portion of the metal layer on the surface of the resist by lift-off.

摘要翻译： 一种制造半导体器件的方法包括在半导体层的表面上形成绝缘膜，在绝缘膜的表面上形成抗蚀剂，所述抗蚀剂具有开口，通过附着在所述抗蚀剂的内周上形成硬化层 图案收缩剂到抗蚀剂，图案收缩剂与抗蚀剂进行交联反应，使用抗蚀剂和硬化层作为掩模蚀刻绝缘膜，去除硬化层，以及在表面上形成金属层 半导体层，在绝缘膜的表面上和抗蚀剂的表面上。 该方法还包括通过剥离去除抗蚀剂和抗蚀剂表面上金属层的部分。

公开(公告)号：US20120208365A1

公开(公告)日：2012-08-16

申请号：US13334213

申请日：2011-12-22

申请人： Kenichiro KURAHASHI ,  Hidetoshi Koyama ,  Kazuyuki Onoe

发明人： Kenichiro KURAHASHI ,  Hidetoshi Koyama ,  Kazuyuki Onoe

IPC分类号： H01L21/28

CPC分类号： H01L21/28264 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66446 ,  H01L29/7787

摘要： A method of manufacturing a semiconductor device includes forming an insulating film on a surface of a semiconductor layer, forming a resist on a surface of the insulating film, the resist having an opening, forming a hardened layer on an inner circumference of the resist by attaching a pattern shrinking agent to the resist, the pattern shrinking agent undergoing a cross-linking reaction with the resist, etching the insulating film using the resist and the hardened layer as masks, removing the hardened layer, and forming a metal layer on a surface of the semiconductor layer, on a surface of the insulating film, and on a surface of the resist. The method further includes removing the resist and the portion of the metal layer on the surface of the resist by lift-off.

摘要翻译： 一种制造半导体器件的方法包括在半导体层的表面上形成绝缘膜，在绝缘膜的表面上形成抗蚀剂，所述抗蚀剂具有开口，通过附着在所述抗蚀剂的内周上形成硬化层 图案收缩剂到抗蚀剂，图案收缩剂与抗蚀剂进行交联反应，使用抗蚀剂和硬化层作为掩模蚀刻绝缘膜，去除硬化层，以及在表面上形成金属层 半导体层，在绝缘膜的表面上和抗蚀剂的表面上。 该方法还包括通过剥离去除抗蚀剂和抗蚀剂表面上金属层的部分。

公开(公告)号：US08008667B2

公开(公告)日：2011-08-30

申请号：US11955672

申请日：2007-12-13

申请人： Hidetoshi Koyama ,  Yoshitaka Kamo

发明人： Hidetoshi Koyama ,  Yoshitaka Kamo

IPC分类号： H01L29/04 ,  H01L29/15 ,  H01L31/036

CPC分类号： H01L27/0688 ,  H01L21/0237 ,  H01L21/02378 ,  H01L21/02458 ,  H01L21/0254

摘要： A semiconductor device includes a first semiconductor layer and a first semiconductor element located in the first semiconductor layer. The semiconductor device also includes a second semiconductor layer of a transparent semiconductor material. The second semiconductor layer is disposed on the first semiconductor layer covering the first semiconductor element. The semiconductor device also includes a second semiconductor element located in the second semiconductor layer. The semiconductor device also includes a wire extending within the second semiconductor layer and electrically connecting the first and second semiconductor elements.

摘要翻译： 半导体器件包括位于第一半导体层中的第一半导体层和第一半导体元件。 半导体器件还包括透明半导体材料的第二半导体层。 第二半导体层设置在覆盖第一半导体元件的第一半导体层上。 半导体器件还包括位于第二半导体层中的第二半导体元件。 半导体器件还包括在第二半导体层内延伸的电线，并电连接第一和第二半导体元件。

公开(公告)号：US07851831B2

公开(公告)日：2010-12-14

申请号：US11859846

申请日：2007-09-24

申请人： Hidetoshi Koyama ,  Yoshitaka Kamo ,  Toshihiko Shiga

发明人： Hidetoshi Koyama ,  Yoshitaka Kamo ,  Toshihiko Shiga

IPC分类号： H01L29/66 ,  H01L29/00

CPC分类号： H01L29/475 ,  H01L29/2003 ,  H01L29/812

摘要： A transistor includes a nitride semiconductor layer and a gate electrode layer. The gate electrode layer includes a tantalum nitride layer on the nitride semiconductor layer. The tantalum nitride layer forms a Schottky junction with the nitride semiconductor layer. The transistor also includes an insulating film on the nitride semiconductor layer. The insulating film surrounds the gate electrode layer. A first portion of the gate electrode layer, in contact with the nitride semiconductor layer, has a higher nitrogen mole fraction than a second portion of the gate electrode layer.

摘要翻译： 晶体管包括氮化物半导体层和栅电极层。 栅电极层包括在氮化物半导体层上的氮化钽层。 氮化钽层与氮化物半导体层形成肖特基结。 晶体管还包括在氮化物半导体层上的绝缘膜。 绝缘膜围绕栅电极层。 与氮化物半导体层接触的栅电极层的第一部分具有比栅电极层的第二部分高的氮摩尔分数。

公开(公告)号：US20090014728A1

公开(公告)日：2009-01-15

申请号：US11955672

申请日：2007-12-13

申请人： Hidetoshi Koyama ,  Yoshitaka Kamo

发明人： Hidetoshi Koyama ,  Yoshitaka Kamo

IPC分类号： H01L29/12

CPC分类号： H01L27/0688 ,  H01L21/0237 ,  H01L21/02378 ,  H01L21/02458 ,  H01L21/0254

摘要： A semiconductor device includes a first semiconductor layer and a first semiconductor element located in the first semiconductor layer. The semiconductor device also includes a second semiconductor layer of a transparent semiconductor material. The second semiconductor layer is disposed on the first semiconductor layer covering the first semiconductor element. The semiconductor device also includes a second semiconductor element located in the second semiconductor layer. The semiconductor device also includes a wire extending within the second semiconductor layer and electrically connecting the first and second semiconductor elements.

摘要翻译： 半导体器件包括位于第一半导体层中的第一半导体层和第一半导体元件。 半导体器件还包括透明半导体材料的第二半导体层。 第二半导体层设置在覆盖第一半导体元件的第一半导体层上。 半导体器件还包括位于第二半导体层中的第二半导体元件。 半导体器件还包括在第二半导体层内延伸的电线，并电连接第一和第二半导体元件。

公开(公告)号：US20080246060A1

公开(公告)日：2008-10-09

申请号：US11859846

申请日：2007-09-24

申请人： Hidetoshi Koyama ,  Yoshitaka Kamo ,  Toshihiko Shiga

发明人： Hidetoshi Koyama ,  Yoshitaka Kamo ,  Toshihiko Shiga

IPC分类号： H01L29/812

CPC分类号： H01L29/475 ,  H01L29/2003 ,  H01L29/812

摘要： A transistor includes a nitride semiconductor layer and a gate electrode layer. The gate electrode layer includes a tantalum nitride layer being formed on the nitride semiconductor layer. The tantalum nitride layer forms a Schottky junction with the nitride semiconductor layer. The transistor also includes an insulating film formed on the nitride semiconductor layer. The insulating film surrounds the gate electrode layer. The portion of the gate electrode layer in contact with the nitride semiconductor layer has a higher nitrogen mole fraction than the other portion of the gate electrode layer.

摘要翻译： 晶体管包括氮化物半导体层和栅电极层。 栅电极层包括在氮化物半导体层上形成的氮化钽层。 氮化钽层与氮化物半导体层形成肖特基结。 晶体管还包括形成在氮化物半导体层上的绝缘膜。 绝缘膜围绕栅电极层。 与氮化物半导体层接触的栅电极层的部分具有比栅电极层的其他部分高的氮摩尔分数。