Connector for testing a semiconductor package
    1.
    发明申请
    Connector for testing a semiconductor package 有权
    用于测试半导体封装的连接器

    公开(公告)号:US20060121757A1

    公开(公告)日:2006-06-08

    申请号:US11295208

    申请日:2005-12-05

    IPC分类号: H01R4/58

    摘要: In one embodiment, a connector is made using a mixture of insulating silicone powder and conductive powder. The connector comprises a connector body formed from the insulating silicone powder and on or more preferably regularly arrayed conductive silicone members that are formed by migrating the conductive powder to a site of the connector corresponding to a solder ball of the semiconductor package. The conductive silicone member comprises a high-density conductive silicone part formed to be proximate an upper surface of the connector body and to protrude therefrom and a low-density conductive silicone part formed in substantial vertical alignment beneath the high-density conductive silicone part, the low-density conductive silicone part having a lower surface exposed from a lower surface of the connector body.

    摘要翻译: 在一个实施例中,使用绝缘硅氧烷粉末和导电粉末的混合物制造连接器。 连接器包括由绝缘硅氧烷粉末形成的连接器主体,并且通过将导电粉末迁移到对应于半导体封装的焊料球的连接部位而形成的或更优选地规则排列的导电硅树脂构件。 导电硅树脂构件包括形成为接近连接器主体的上表面并从其突出的高密度导电硅树脂部件,以及在高密度导电硅树脂部件下方大致垂直取向地形成的低密度导电硅树脂部件, 低密度导电硅部件,其具有从连接器本体的下表面露出的下表面。

    Connector for testing a semiconductor package
    2.
    发明授权
    Connector for testing a semiconductor package 有权
    用于测试半导体封装的连接器

    公开(公告)号:US07438563B2

    公开(公告)日:2008-10-21

    申请号:US11295208

    申请日:2005-12-05

    IPC分类号: H01R4/58

    摘要: In one embodiment, a connector is made using a mixture of insulating silicone powder and conductive powder. The connector comprises a connector body formed from the insulating silicone powder and on or more preferably regularly arrayed conductive silicone members that are formed by migrating the conductive powder to a site of the connector corresponding to a solder ball of the semiconductor package. The conductive silicone member comprises a high-density conductive silicone part formed to be proximate an upper surface of the connector body and to protrude therefrom and a low-density conductive silicone part formed in substantial vertical alignment beneath the high-density conductive silicone part, the low-density conductive silicone part having a lower surface exposed from a lower surface of the connector body.

    摘要翻译: 在一个实施例中,使用绝缘硅氧烷粉末和导电粉末的混合物制造连接器。 连接器包括由绝缘硅氧烷粉末形成的连接器主体,并且通过将导电粉末迁移到对应于半导体封装的焊料球的连接部位而形成的或更优选地规则排列的导电硅树脂构件。 导电硅树脂构件包括形成为接近连接器主体的上表面并从其突出的高密度导电硅树脂部件和在高密度导电硅树脂部件下方基本上垂直取向形成的低密度导电硅树脂部件, 低密度导电硅部件,其具有从连接器本体的下表面露出的下表面。

    Contact-free test system for semiconductor device
    3.
    发明申请
    Contact-free test system for semiconductor device 审中-公开
    无接触式半导体器件测试系统

    公开(公告)号:US20060076965A1

    公开(公告)日:2006-04-13

    申请号:US11147437

    申请日:2005-06-08

    IPC分类号: G01R31/305

    CPC分类号: G01R31/307

    摘要: The present invention provides a contact-free test system for testing a semiconductor device. The contact-free test system comprises a test signal member applying a test signal to the semiconductor device, an electronic beam radiator generating a first electronic beam and radiating it to an area of the semiconductor device, a detector to detect a second electronic beam reflected from the semiconductor device, and a comparator to compare the test signal with the second electronic beam.

    摘要翻译: 本发明提供了一种用于测试半导体器件的无接触测试系统。 无接触测试系统包括向半导体器件施加测试信号的测试信号部件,产生第一电子束并将其辐射到半导体器件的区域的电子束辐射器,检测器,用于检测从半导体器件反射的第二电子束 半导体器件和比较器,用于将测试信号与第二电子束进行比较。

    Semiconductor memory device
    5.
    发明授权
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号:US08130577B2

    公开(公告)日:2012-03-06

    申请号:US12590417

    申请日:2009-11-06

    IPC分类号: G11C8/00

    摘要: A semiconductor memory device includes a sub memory cell array region having memory cells each connected between word lines extending in a first direction and bit lines extending in a second direction that is orthogonal to the first direction of extension of the word lines and a sub word line driver region disposed at a side of the sub memory cell array region in the first direction and including sub word line drivers that activate the word lines. A sensing region is disposed at a side of the sub memory cell array region in the second direction and including an equalizer that precharges the bit line in response to a signal transferred through a drive signal line and at least one first control signal driver that activates an inverted control signal line in response to a signal transferred through a control signal line. A conjunction region disposed at an intersection between the sub word line driver region and the sensing region, in which the inverted control signal line is connected to the drive signal line.

    摘要翻译: 半导体存储器件包括具有存储单元的子存储单元阵列区域,每个存储单元分别连接在沿第一方向延伸的字线和沿着与字线的第一延伸方向正交的第二方向延伸的位线和一个子字线 驱动器区域,设置在副存储单元阵列区域的第一方向的一侧,并且包括激活字线的子字线驱动器。 感测区域设置在副存储单元阵列区域的第二方向的一侧,并且包括响应于通过驱动信号线传送的信号而对位线进行预充电的均衡器,以及至少一个第一控制信号驱动器,其激活 响应于通过控制信号线传送的信号的反相控制信号线。 配置在副字线驱动器区域和感测区域之间的交叉点处的连接区域,其中反相控制信号线连接到驱动信号线。

    Electrical test system including coaxial cables
    7.
    发明授权
    Electrical test system including coaxial cables 有权
    电测试系统包括同轴电缆

    公开(公告)号:US07538566B2

    公开(公告)日:2009-05-26

    申请号:US11926172

    申请日:2007-10-29

    IPC分类号: G01R31/02 G01R31/28

    CPC分类号: G01R31/2889

    摘要: An electrical test system includes a test head, a performance board, a probe card and coaxial cables. The performance board includes a first side and an opposite second side, where the first side of the performance board is electrically connected to the test head and the second side of the performance board includes first coaxial cable connection portions. The probe card includes a first side and an opposite second side, where the first side of the probe card includes second coaxial cable connection portions and the second side includes a wafer test probes. The coaxial cables respectively electrically connect the first coaxial cable connection portions of the performance board to the second coaxial cable connection portions of the probe card.

    摘要翻译: 电气测试系统包括测试头,演奏板,探针卡和同轴电缆。 所述性能板包括第一侧和相对的第二侧,其中所述性能板的第一侧电连接到所述测试头,并且所述性能板的第二侧包括第一同轴电缆连接部分。 探针卡包括第一侧和相对的第二侧,其中探针卡的第一侧包括第二同轴电缆连接部分,并且第二侧包括晶片测试探针。 同轴电缆分别将性能板的第一同轴电缆连接部分电连接到探针卡的第二同轴电缆连接部分。

    Probe card for test of semiconductor chips and method for test of semiconductor chips using the same
    9.
    发明申请
    Probe card for test of semiconductor chips and method for test of semiconductor chips using the same 审中-公开
    用于半导体芯片测试的探针卡和使用其的半导体芯片的测试方法

    公开(公告)号:US20080164898A1

    公开(公告)日:2008-07-10

    申请号:US12005888

    申请日:2007-12-28

    IPC分类号: G01R31/02

    CPC分类号: G01R1/07385 G01R1/07342

    摘要: There are provided a probe card for test of semiconductor chips and a method for testing semiconductor chips using the probe card. In implementing the probe card for electrically testing semiconductor chips, the probe blocks corresponding to multiple selected ones of the semiconductor chips on the wafer can be selected so that the selected semiconductor chips are EDS tested in a one-step process. As the selected semiconductor chips are EDS tested in a one-step process, equipment efficiency is improved, and statistical objectivity of data indicating characteristics of the wafer can be achieved.

    摘要翻译: 提供了用于半导体芯片测试的探针卡和使用探针卡测试半导体芯片的方法。 在实现用于电测试半导体芯片的探针卡时,可以选择对应于晶片上的多个选定的半导体芯片的探针块,使得所选择的半导体芯片在一步法中进行EDS测试。 由于所选择的半导体芯片在一步法中进行了EDS测试,所以提高了设备​​效率,并且可以实现表示晶片特性的数据的统计客观性。

    Semiconductor memory device
    10.
    发明申请
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号:US20100118615A1

    公开(公告)日:2010-05-13

    申请号:US12590417

    申请日:2009-11-06

    IPC分类号: G11C7/12 G11C7/10

    摘要: A semiconductor memory device includes a sub memory cell array region having memory cells each connected between word lines extending in a first direction and bit lines extending in a second direction that is orthogonal to the first direction of extension of the word lines and a sub word line driver region disposed at a side of the sub memory cell array region in the first direction and including sub word line drivers that activate the word lines. A sensing region is disposed at a side of the sub memory cell array region in the second direction and including an equalizer that precharges the bit line in response to a signal transferred through a drive signal line and at least one first control signal driver that activates an inverted control signal line in response to a signal transferred through a control signal line. A conjunction region disposed at an intersection between the sub word line driver region and the sensing region, in which the inverted control signal line is connected to the drive signal line.

    摘要翻译: 半导体存储器件包括具有存储单元的子存储单元阵列区域,每个存储单元分别连接在沿第一方向延伸的字线和沿着与字线的第一延伸方向正交的第二方向延伸的位线和一个子字线 驱动器区域,设置在副存储单元阵列区域的第一方向的一侧,并且包括激活字线的子字线驱动器。 感测区域设置在副存储单元阵列区域的第二方向的一侧,并且包括响应于通过驱动信号线传送的信号而对位线进行预充电的均衡器,以及至少一个第一控制信号驱动器,其激活 响应于通过控制信号线传送的信号的反相控制信号线。 配置在副字线驱动器区域和感测区域之间的交叉点处的连接区域,其中反相控制信号线连接到驱动信号线。