摘要:
The disclosed is a silica-polymeric resin composite of blending the silicon dioxide nanoparticles in thermoplastic polymer and method for manufacturing the same, thereby improving its scratch-resistance. A thermoplastic polymer is dissolved in solvent to form a thermoplastic polymer solution. The polymer solution is evenly mixed with a silicon dioxide sol, and the solvent is then removed to complete the silica-polymeric resin composite. In the silica-polymeric resin composite, the silicon dioxide nanoparticles and the thermoplastic polymer have no chemical bonding therebetween, and the silicon dioxide nanoparticles are evenly dispersed in the thermoplastic polymer.
摘要:
A method of removing organic contaminants from surfaces of solid wastes is disclosed. The method includes the steps of forming a TiO2 sol; mixing the solid wastes and the TiO2 sol by stirring. Furthermore, the mixture undergoes photo-catalytic remediation under illumination of a UV source prior to a solid-liquid separation process of the illuminated TiO2 sol and solid wastes.
摘要:
A method of removing organic contaminants from surfaces of solid wastes is disclosed. The method includes the steps of forming a TiO2 sol; mixing the solid wastes and the TiO2 sol by stirring. Furthermore, the mixture undergoes photo-catalytic remediation under illumination of a UV source prior to a solid-liquid separation process of the illuminated TiO2 sol and solid wastes.
摘要:
Aspects of the invention are directed to a method of forming graphene structures. Initially, a cluster of particles is received. The cluster of particles comprises a plurality of particles with each particle in the plurality of particles contacting one or more other particles in the plurality of particles. Subsequently, one or more layers are deposited on the cluster of particles with the one or more layers comprising graphene. The plurality of particles are then etched away without substantially etching the deposited one or more layers. Lastly, the remaining one or more layers are dried. The resultant graphene structures are particularly resistant to the negative effects of aggregation and compaction.
摘要:
Graphene transistor devices and methods of their fabrication are disclosed. One such graphene transistor device includes source and drain electrodes and a gate structure including a dielectric sidewall spacer that is disposed between the source and drain electrodes. The device further includes a graphene layer that is adjacent to at least one of the source and drain electrodes, where an interface between the source/drain electrode(s) and the graphene layer maintains a consistent degree of electrical conductivity throughout the interface.
摘要:
Aspects of the invention are directed to a method of forming a thin film adhered to a target substrate. The method comprises the steps of: (i) forming the thin film on a deposition substrate; (ii) depositing a support layer on the thin film; (iii) removing the deposition substrate without substantially removing the thin film and the support layer; (iv) drying the thin film and the support layer while the thin film is only adhered to the support layer; (v) placing the dried thin film and the dried support layer on the target substrate such that the thin film adheres to the target substrate; and (vi) removing the support layer without substantially removing the thin film and the target substrate.
摘要:
A silicon nitride layer is provided on an uppermost surface of a graphene layer and then a hafnium dioxide layer is provided on an uppermost surface of the silicon nitride layer. The silicon nitride layer acts as a wetting agent for the hafnium dioxide layer and thus prevents the formation of discontinuous columns of hafnium dioxide atop the graphene layer. The silicon nitride layer and the hafnium dioxide layer, which collectively form a low EOT bilayer gate dielectric, exhibit continuous morphology atop the graphene layer.
摘要:
Techniques for fabricating carbon nanotube-based devices are provided. In one aspect, a method for fabricating a carbon nanotube-based integrated circuit is provided. The method comprises the following steps. A first wafer comprising carbon nanotubes is provided. A second wafer comprising one or more device elements is provided. One or more of the carbon nanotubes are connected with one or more of the device elements by bonding the first wafer and the second wafer together. A carbon nanotube-based integrated circuit is also provided.
摘要:
A graphene-based field effect transistor includes source and drain electrodes that are self-aligned to a gate electrode. A stack of a seed layer and a dielectric metal oxide layer is deposited over a patterned graphene layer. A conductive material stack of a first metal portion and a second metal portion is formed above the dielectric metal oxide layer. The first metal portion is laterally etched employing the second metal portion, and exposed portions of the dielectric metal oxide layer are removed to form a gate structure in which the second metal portion overhangs the first metal portion. The seed layer is removed and the overhang is employed to shadow proximal regions around the gate structure during a directional deposition process to form source and drain electrodes that are self-aligned and minimally laterally spaced from edges of the gate electrode.
摘要:
An integrated circuit includes a graphene layer, the graphene layer comprising a region of undoped graphene, the undoped graphene comprising a channel of a transistor, and a region of doped graphene, the doped graphene comprising a contact of the transistor; and a gate of the transistor, the gate comprising a carbon nanotube film. A method of fabricating an integrated circuit comprising graphene and carbon nanotubes, includes forming a graphene layer; doping a portion of the graphene layer, resulting in doped graphene and undoped graphene; forming a carbon nanotube film; and etching the carbon nanotube film to form a gate of a transistor, wherein the transistor further comprises a channel comprising the undoped graphene and a contact comprising the doped graphene. A transistor includes a gate, the gate comprising a carbon nanotube film; a channel, the channel comprising undoped graphene; and a contact, the contact comprising doped graphene.