公开(公告)号：US20080179605A1

公开(公告)日：2008-07-31

申请号：US11937234

申请日：2007-11-08

申请人： Yuji TAKASE ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Yuji TAKASE ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L33/00

CPC分类号： H01L33/32 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/105 ,  H01L33/145 ,  H01L33/465

摘要： A nitride semiconductor light emitting device includes: a dielectric layered film over a substrate, the dielectric layered film being formed by stacking a plurality of dielectric films having different compositions; a semiconductor thin film formed of a single crystal over the dielectric layered film; and a pn junction diode structure over the semiconductor thin film, the pn junction diode structure being formed of a nitride semiconductor.

摘要翻译： 氮化物半导体发光器件包括：在衬底上的电介质层压膜，所述电介质层叠膜通过堆叠多个具有不同组成的电介质膜形成; 由介电层叠膜上的单晶形成的半导体薄膜; 以及在半导体薄膜上的pn结二极管结构，pn结二极管结构由氮化物半导体形成。

公开(公告)号：US08076698B2

公开(公告)日：2011-12-13

申请号：US11995040

申请日：2006-06-27

申请人： Daisuke Ueda ,  Tsuyoshi Tanaka ,  Yasuhiro Uemoto ,  Tetsuzo Ueda ,  Manabu Yanagihara ,  Masahiro Hikita ,  Hiroaki Ueno

发明人： Daisuke Ueda ,  Tsuyoshi Tanaka ,  Yasuhiro Uemoto ,  Tetsuzo Ueda ,  Manabu Yanagihara ,  Masahiro Hikita ,  Hiroaki Ueno

IPC分类号： H01L31/0328

CPC分类号： H01L29/739 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/7786

摘要： In a transistor, an AlN buffer layer 102, an undoped GaN layer 103, an undoped AlGaN layer 104, a p-type control layer 105, and a p-type contact layer 106 are formed in this order on a sapphire substrate 101. The transistor further includes a gate electrode 110 in ohmic contact with the p-type contact layer 106, and a source electrode 108 and a drain electrode 109 provided on the undoped AlGaN layer 104. By applying a positive voltage to the p-type control layer 105, holes are injected into a channel to increase a current flowing in the channel.

摘要翻译： 在晶体管中，在蓝宝石衬底101上依次形成AlN缓冲层102，未掺杂的GaN层103，未掺杂的AlGaN层104，p型控制层105和p型接触层106。 晶体管还包括与p型接触层106欧姆接触的栅电极110以及设置在未掺杂的AlGaN层104上的源电极108和漏极109.通过向p型控制层105施加正电压 ，孔被注入到通道中以增加在通道中流动的电流。

公开(公告)号：US07825434B2

公开(公告)日：2010-11-02

申请号：US11647218

申请日：2006-12-29

申请人： Hiroaki Ueno ,  Manabu Yanagihara ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Hiroaki Ueno ,  Manabu Yanagihara ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L29/08

CPC分类号： H01L29/7783 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/432 ,  H01L29/452 ,  H01L29/7787

摘要： A nitride semiconductor device includes: a first semiconductor layer made of first nitride semiconductor; a second semiconductor layer formed on a principal surface of the first semiconductor layer and made of second nitride semiconductor having a bandgap wider than that of the first nitride semiconductor; a control layer selectively formed on, or above, an upper portion of the second semiconductor layer and made of third nitride semiconductor having a p-type conductivity; source and drain electrodes formed on the second semiconductor layer at respective sides of the control layer; a gate electrode formed on the control layer; and a fourth semiconductor layer formed on a surface of the first semiconductor layer opposite to the principal surface, having a potential barrier in a valence band with respect to the first nitride semiconductor and made of fourth nitride semiconductor containing aluminum.

摘要翻译： 氮化物半导体器件包括：由第一氮化物半导体制成的第一半导体层; 第二半导体层，其形成在第一半导体层的主表面上并且由具有比第一氮化物半导体的带隙宽的第二氮化物半导体构成; 选择性地形成在所述第二半导体层的上部并且由上述第二半导体层的上部制成的具有p型导电性的第三氮化物半导体的控制层; 源极和漏极，形成在控制层的相应侧上的第二半导体层上; 形成在所述控制层上的栅电极; 以及第四半导体层，形成在与所述主表面相对的所述第一半导体层的表面上，相对于所述第一氮化物半导体具有价带中的势垒，并且由包含铝的第四氮化物半导体构成。

公开(公告)号：US08390029B2

公开(公告)日：2013-03-05

申请号：US12867427

申请日：2009-01-23

申请人： Hidekazu Umeda ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Hidekazu Umeda ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L29/00

CPC分类号： H01L29/7786 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/432 ,  H01L29/66462

摘要： A semiconductor device includes an undoped GaN layer (103) formed on a substrate (101), an undoped AlGaN layer (104) formed on the undoped GaN layer (103) and having a band gap energy larger than that of the undoped GaN layer (103), a p-type AlGaN layer (105) and a high-concentration p-type GaN layer (106) formed on the undoped AlGaN layer (104), and an n-type AlGaN layer (107) formed on the high-concentration p-type GaN layer (106). A gate electrode (112) which makes ohmic contact with the high-concentration p-type GaN layer (106) is formed on the high-concentration p-type GaN layer (106) in a region thereof exposed through an opening (107a) formed in the n-type AlGaN layer (107).

摘要翻译： 半导体器件包括形成在衬底（101）上的未掺杂的GaN层（103），形成在未掺杂的GaN层（103）上并且具有比未掺杂的GaN层的带隙能量大的带隙能量的未掺杂的AlGaN层（104） 103），形成在未掺杂的AlGaN层（104）上的p型AlGaN层（105）和高浓度p型GaN层（106）以及形成在高掺杂AlGaN层上的n型AlGaN层（107） 浓度p型GaN层（106）。 在高浓度p型GaN层（106）上形成与高浓度p型GaN层（106）欧姆接触的栅电极（112），其形成在通过形成的开口（107a）的部分露出的区域 在n型AlGaN层（107）中。

公开(公告)号：US08129748B2

公开(公告)日：2012-03-06

申请号：US11878352

申请日：2007-07-24

申请人： Yasuhiro Uemoto ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Yasuhiro Uemoto ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L29/66

CPC分类号： H01L29/7786 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/7783

摘要： A nitride semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a wider band gap than the first nitride semiconductor layer; and a third nitride semiconductor layer formed on the second nitride semiconductor layer. A region of the third nitride semiconductor layer located below the gate electrode is formed with a control region having a p-type conductivity, and a region of the third nitride semiconductor layer located between the gate electrode and each of the source electrode and the drain electrode is formed with a high resistive region having a higher resistance than the that of the control region.

摘要翻译： 氮化物半导体器件包括：第一氮化物半导体层; 形成在所述第一氮化物半导体层上并且具有比所述第一氮化物半导体层更宽的带隙的第二氮化物半导体层; 以及形成在所述第二氮化物半导体层上的第三氮化物半导体层。 位于栅电极下方的第三氮化物半导体层的区域形成有具有p型导电性的控制区域，以及位于栅电极与源电极和漏极之间的第三氮化物半导体层的区域 形成有具有比控制区域更高的电阻的高电阻区域。

公开(公告)号：US20100327320A1

公开(公告)日：2010-12-30

申请号：US12879565

申请日：2010-09-10

申请人： Hiroaki Ueno ,  Manabu Yanagihara ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Hiroaki Ueno ,  Manabu Yanagihara ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L29/80

CPC分类号： H01L29/7783 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/432 ,  H01L29/452 ,  H01L29/7787

摘要： A nitride semiconductor device includes: a first semiconductor layer made of first nitride semiconductor; a second semiconductor layer formed on a principal surface of the first semiconductor layer and made of second nitride semiconductor having a bandgap wider than that of the first nitride semiconductor; a control layer selectively formed on, or above, an upper portion of the second semiconductor layer and made of third nitride semiconductor having a p-type conductivity; source and drain electrodes formed on the second semiconductor layer at respective sides of the control layer; a gate electrode formed on the control layer; and a fourth semiconductor layer formed on a surface of the first semiconductor layer opposite to the principal surface, having a potential barrier in a valence band with respect to the first nitride semiconductor and made of fourth nitride semiconductor containing aluminum.

摘要翻译： 氮化物半导体器件包括：由第一氮化物半导体制成的第一半导体层; 第二半导体层，其形成在第一半导体层的主表面上并且由具有比第一氮化物半导体的带隙宽的第二氮化物半导体构成; 选择性地形成在所述第二半导体层的上部并且由上述第二半导体层的上部制成的具有p型导电性的第三氮化物半导体的控制层; 源极和漏极，形成在控制层的相应侧上的第二半导体层上; 形成在所述控制层上的栅电极; 以及形成在与所述主表面相对的所述第一半导体层的表面上的第四半导体层，所述第四半导体层相对于所述第一氮化物半导体具有价带中的势垒，并且由包含铝的第四氮化物半导体制成。

公开(公告)号：US20120153355A1

公开(公告)日：2012-06-21

申请号：US13402631

申请日：2012-02-22

申请人： Hidekazu UMEDA ,  Yoshiharu Anda ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Hidekazu UMEDA ,  Yoshiharu Anda ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L29/78

CPC分类号： H01L29/2003 ,  H01L29/1066 ,  H01L29/4175 ,  H01L29/66462 ,  H01L29/7787 ,  H01L29/861

摘要： A nitride semiconductor device includes a semiconductor substrate, and a nitride semiconductor layer formed on the semiconductor substrate. The semiconductor substrate includes a normal region and an interface current block region surrounding the normal region. The nitride semiconductor layer includes an element region and an isolation region surrounding the element region. The element region is formed over the normal region. The interface current block region contains impurities, and forms a potential barrier against carriers generated at an interface between the nitride semiconductor layer and the semiconductor substrate.

摘要翻译： 氮化物半导体器件包括半导体衬底和形成在半导体衬底上的氮化物半导体层。 半导体衬底包括正常区域和围绕法线区域的界面电流阻挡区域。 氮化物半导体层包括元件区域和围绕元件区域的隔离区域。 元件区域形成在正常区域上。 界面电流阻挡区域含有杂质，并且在氮化物半导体层和半导体衬底之间的界面处产生的载流子形成势垒。

公开(公告)号：US20120126290A1

公开(公告)日：2012-05-24

申请号：US13360275

申请日：2012-01-27

申请人： Yasuhiro UEMOTO ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Yasuhiro UEMOTO ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L29/778

CPC分类号： H01L29/7786 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/7783

摘要： A nitride semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a wider band gap than the first nitride semiconductor layer; and a third nitride semiconductor layer formed on the second nitride semiconductor layer. A region of the third nitride semiconductor layer located below the gate electrode is formed with a control region having a p-type conductivity, and a region of the third nitride semiconductor layer located between the gate electrode and each of the source electrode and the drain electrode is formed with a high resistive region having a higher resistance than the that of the control region.

摘要翻译： 氮化物半导体器件包括：第一氮化物半导体层; 形成在所述第一氮化物半导体层上并且具有比所述第一氮化物半导体层更宽的带隙的第二氮化物半导体层; 以及形成在所述第二氮化物半导体层上的第三氮化物半导体层。 位于栅电极下方的第三氮化物半导体层的区域形成有具有p型导电性的控制区域，以及位于栅电极与源电极和漏极之间的第三氮化物半导体层的区域 形成有具有比控制区域更高的电阻的高电阻区域。

公开(公告)号：US07859087B2

公开(公告)日：2010-12-28

申请号：US12637240

申请日：2009-12-14

申请人： Tomohiro Murata ,  Hiroaki Ueno ,  Hidetoshi Ishida ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Tomohiro Murata ,  Hiroaki Ueno ,  Hidetoshi Ishida ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L23/58

CPC分类号： H01L29/7787 ,  H01L23/367 ,  H01L23/3677 ,  H01L29/2003 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a semiconductor layer; at least one electrode formed on a semiconductor layer to be in contact with the semiconductor layer; and a passivation film covering the semiconductor layer and at least part of the top surface of the electrode to protect the semiconductor layer and formed of a plurality of sub-films. The passivation film includes a first sub-film made of aluminum nitride.

公开(公告)号：US20100090250A1

公开(公告)日：2010-04-15

申请号：US12637240

申请日：2009-12-14

申请人： Tomohiro MURATA ,  Hiroaki Ueno ,  Hidetoshi Ishida ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Tomohiro MURATA ,  Hiroaki Ueno ,  Hidetoshi Ishida ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L29/205 ,  H01L29/772 ,  H01L29/06

CPC分类号： H01L29/7787 ,  H01L23/367 ,  H01L23/3677 ,  H01L29/2003 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a semiconductor layer; at least one electrode formed on a semiconductor layer to be in contact with the semiconductor layer; and a passivation film covering the semiconductor layer and at least part of the top surface of the electrode to protect the semiconductor layer and formed of a plurality of sub-films. The passivation film includes a first sub-film made of aluminum nitride.

摘要翻译： 半导体器件包括：半导体层; 形成在与半导体层接触的半导体层上的至少一个电极; 以及覆盖半导体层和电极的顶表面的至少一部分的钝化膜，以保护半导体层并由多个子膜形成。 钝化膜包括由氮化铝制成的第一子膜。