公开(公告)号：US20120126290A1

公开(公告)日：2012-05-24

申请号：US13360275

申请日：2012-01-27

申请人： Yasuhiro UEMOTO ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Yasuhiro UEMOTO ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L29/778

CPC分类号： H01L29/7786 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/7783

摘要： A nitride semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a wider band gap than the first nitride semiconductor layer; and a third nitride semiconductor layer formed on the second nitride semiconductor layer. A region of the third nitride semiconductor layer located below the gate electrode is formed with a control region having a p-type conductivity, and a region of the third nitride semiconductor layer located between the gate electrode and each of the source electrode and the drain electrode is formed with a high resistive region having a higher resistance than the that of the control region.

摘要翻译： 氮化物半导体器件包括：第一氮化物半导体层; 形成在所述第一氮化物半导体层上并且具有比所述第一氮化物半导体层更宽的带隙的第二氮化物半导体层; 以及形成在所述第二氮化物半导体层上的第三氮化物半导体层。 位于栅电极下方的第三氮化物半导体层的区域形成有具有p型导电性的控制区域，以及位于栅电极与源电极和漏极之间的第三氮化物半导体层的区域 形成有具有比控制区域更高的电阻的高电阻区域。

公开(公告)号：US20080149965A1

公开(公告)日：2008-06-26

申请号：US11939899

申请日：2007-11-14

申请人： Kazuhiro KAIBARA ,  Masahiro HIKITA ,  Tetsuzo UEDA ,  Yasuhiro UEMOTO ,  Tsuyoshi TANAKA

发明人： Kazuhiro KAIBARA ,  Masahiro HIKITA ,  Tetsuzo UEDA ,  Yasuhiro UEMOTO ,  Tsuyoshi TANAKA

IPC分类号： H01L29/80 ,  H01L21/335

CPC分类号： H01L29/7787 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/432

摘要： A transistor includes: a first semiconductor layer and a second semiconductor layer with a first region and a second region, which are sequentially formed above a substrate; a first p-type semiconductor layer formed on a region of the second semiconductor layer other than the first and second regions; and a second p-type semiconductor layer formed on the first p-type semiconductor layer. The first p-type semiconductor layer is separated from a drain electrode by interposing therebetween a first groove having a bottom composed of the first region, and from a source electrode by interposing therebetween a second groove having a bottom composed of the second region.

摘要翻译： 晶体管包括：第一半导体层和具有第一区域和第二区域的第二半导体层，其顺序地形成在衬底上; 形成在除了第一和第二区域之外的第二半导体层的区域上的第一p型半导体层; 以及形成在第一p型半导体层上的第二p型半导体层。 第一p型半导体层与漏电极分离，其间具有由第一区域构成的底部的第一沟槽和源极电极之间插入具有由第二区域构成的底部的第二沟槽。

公开(公告)号：US20110114967A1

公开(公告)日：2011-05-19

申请号：US13010238

申请日：2011-01-20

申请人： Masahiro HIKITA ,  Tetsuzo UEDA ,  Manabu YANAGIHARA ,  Yasuhiro UEMOTO ,  Tsuyoshi TANAKA

发明人： Masahiro HIKITA ,  Tetsuzo UEDA ,  Manabu YANAGIHARA ,  Yasuhiro UEMOTO ,  Tsuyoshi TANAKA

IPC分类号： H01L29/205 ,  H01L29/78

CPC分类号： H01L29/7786 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/432 ,  H01L29/66462

摘要： A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer formed over the substrate; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a larger band gap energy than the first nitride semiconductor layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer and including a p-type nitride semiconductor with at least a single-layer structure; a gate electrode formed on the third nitride semiconductor layer; and a source electrode and a drain electrode formed in regions located on both sides of the gate electrode, respectively. The third nitride semiconductor layer has a thickness greater in a portion below the gate electrode than in a portion below the side of the gate electrode.

摘要翻译： 氮化物半导体器件包括：衬底; 形成在所述基板上的第一氮化物半导体层; 形成在所述第一氮化物半导体层上并且具有比所述第一氮化物半导体层更大的带隙能量的第二氮化物半导体层; 形成在所述第二氮化物半导体层上并且包括具有至少单层结构的p型氮化物半导体的第三氮化物半导体层; 形成在所述第三氮化物半导体层上的栅电极; 以及分别形成在位于栅电极两侧的区域中的源电极和漏电极。 所述第三氮化物半导体层的厚度比所述栅极电极侧的部分的厚度大。

公开(公告)号：US20080067546A1

公开(公告)日：2008-03-20

申请号：US11898958

申请日：2007-09-18

申请人： Tomohiro MURATA ,  Hiroaki UENO ,  Hidetoshi ISHIDA ,  Tetsuzo UEDA ,  Yasuhiro UEMOTO ,  Tsuyoshi TANAKA ,  Daisuke UEDA

发明人： Tomohiro MURATA ,  Hiroaki UENO ,  Hidetoshi ISHIDA ,  Tetsuzo UEDA ,  Yasuhiro UEMOTO ,  Tsuyoshi TANAKA ,  Daisuke UEDA

IPC分类号： H01L29/20

CPC分类号： H01L29/7787 ,  H01L23/367 ,  H01L23/3677 ,  H01L29/2003 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a semiconductor layer; at least one electrode formed on a semiconductor layer to be in contact with the semiconductor layer; and a passivation film covering the semiconductor layer and at least part of the top surface of the electrode to protect the semiconductor layer and formed of a plurality of sub-films. The passivation film includes a first sub-film made of aluminum nitride.

摘要翻译： 半导体器件包括：半导体层; 形成在与半导体层接触的半导体层上的至少一个电极; 以及覆盖半导体层和电极的顶表面的至少一部分的钝化膜，以保护半导体层并由多个子膜形成。 钝化膜包括由氮化铝制成的第一子膜。

公开(公告)号：US20130009676A1

公开(公告)日：2013-01-10

申请号：US13613724

申请日：2012-09-13

申请人： Tatsuo MORITA ,  Daisuke UEDA ,  Yasuhiro UEMOTO ,  Tetsuzo UEDA

发明人： Tatsuo MORITA ,  Daisuke UEDA ,  Yasuhiro UEMOTO ,  Tetsuzo UEDA

IPC分类号： H01L29/78 ,  H03K3/00

CPC分类号： H01L29/7787 ,  H01L27/0605 ,  H01L29/1066 ,  H01L29/2003

摘要： A bidirectional switching device includes a semiconductor multilayer structure made of a nitride semiconductor, a first ohmic electrode and a second ohmic electrode which are formed on the semiconductor multilayer structure, and a first gate electrode and a second gate electrode. The first gate electrode is covered with a first shield electrode having a potential substantially equal to that of the first ohmic electrode. The second gate electrode is covered with the second shield electrode having a potential substantially equal to that of the second ohmic electrode. An end of the first shield electrode is positioned between the first gate electrode and the second gate electrode, and an end of the second shield electrode is positioned between the second gate electrode and the first gate electrode.

摘要翻译： 双向开关器件包括由半导体多层结构上形成的由氮化物半导体，第一欧姆电极和第二欧姆电极构成的半导体多层结构以及第一栅电极和第二栅电极。 第一栅电极被第一屏蔽电极覆盖，该第一屏蔽电极的电位基本上等于第一欧姆电极的电位。 第二栅电极被第二屏蔽电极覆盖，其电位基本上等于第二欧姆电极的电位。 第一屏蔽电极的端部位于第一栅极电极和第二栅极电极之间，第二屏蔽电极的端部位于第二栅极电极和第一栅极电极之间。

公开(公告)号：US20120061729A1

公开(公告)日：2012-03-15

申请号：US13295762

申请日：2011-11-14

申请人： Daisuke SHIBATA ,  Manabu YANAGIHARA ,  Yasuhiro UEMOTO

发明人： Daisuke SHIBATA ,  Manabu YANAGIHARA ,  Yasuhiro UEMOTO

IPC分类号： H01L29/778 ,  H01L21/20

CPC分类号： H01L29/7786 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/66893 ,  H01L29/808

摘要： A nitride semiconductor device includes a semiconductor layer stack including a first nitride semiconductor layer and a second nitride semiconductor layer stacked in this order on a substrate. A p-type third nitride semiconductor layer is selectively formed on the semiconductor layer stack, and a gate electrode is formed on the third nitride semiconductor layer. A first ohmic electrode and a second ohmic electrode are formed on regions of the semiconductor layer stack located at both sides of the third nitride semiconductor layer, respectively. A first gate electrode forms a Schottky contact with the third nitride semiconductor layer.

摘要翻译： 氮化物半导体器件包括在衬底上依次堆叠的第一氮化物半导体层和第二氮化物半导体层的半导体层堆叠。 在半导体层堆叠上选择性地形成p型第三氮化物半导体层，在第三氮化物半导体层上形成栅电极。 分别在位于第三氮化物半导体层两侧的半导体层堆叠的区域上形成第一欧姆电极和第二欧姆电极。 第一栅电极与第三氮化物半导体层形成肖特基接触。

公开(公告)号：US20110215746A1

公开(公告)日：2011-09-08

申请号：US13036207

申请日：2011-02-28

申请人： Ayanori IKOSHI ,  Hiroto YAMAGIWA ,  Shingo HASHIZUME ,  Manabu YANAGIHARA ,  Yasuhiro UEMOTO

发明人： Ayanori IKOSHI ,  Hiroto YAMAGIWA ,  Shingo HASHIZUME ,  Manabu YANAGIHARA ,  Yasuhiro UEMOTO

IPC分类号： H02P6/14 ,  H03K3/021

CPC分类号： H02P6/14 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/49112 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13063 ,  H01L2924/13091 ,  H01L2924/30107 ,  H01L2924/3011 ,  H03K3/021 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/206

摘要： A semiconductor device according to the present invention is a semiconductor device which includes: a semiconductor element; a gate drive circuit; and a connection terminal unit, wherein the semiconductor element includes: a gate electrode pad; and first and second ohmic electrode pads, the connection terminal includes: a first ohmic electrode terminal connected to the first ohmic electrode pad; a second ohmic electrode terminal connected to the second ohmic electrode pad; a gate drive terminal connected to the first ohmic electrode pad; and a gate terminal connected to the gate electrode pad, an input terminal of the gate drive circuit is connected to the gate drive terminal, an output terminal of the gate drive circuit is connected to the gate terminal, and a potential of the first ohmic electrode pad corresponds to a reference potential of the gate drive circuit.

摘要翻译： 根据本发明的半导体器件是半导体器件，其包括：半导体元件; 门驱动电路; 以及连接端子单元，其中所述半导体元件包括：栅极电极焊盘; 以及第一和第二欧姆电极焊盘，所述连接端子包括：连接到所述第一欧姆电极焊盘的第一欧姆电极端子; 连接到第二欧姆电极焊盘的第二欧姆电极端子; 连接到所述第一欧姆电极焊盘的栅极驱动端子; 以及连接到栅极电极焊盘的栅极端子，栅极驱动电路的输入端子连接到栅极驱动端子，栅极驱动电路的输出端子连接到栅极端子，并且第一欧姆电极的电位 焊盘对应于栅极驱动电路的参考电位。

公开(公告)号：US20080211567A1

公开(公告)日：2008-09-04

申请号：US12020163

申请日：2008-01-25

申请人： Tatsuo MORITA ,  Manabu YANAGIHARA ,  Hidetoshi ISHIDA ,  Yasuhiro UEMOTO ,  Manabu INOUE

发明人： Tatsuo MORITA ,  Manabu YANAGIHARA ,  Hidetoshi ISHIDA ,  Yasuhiro UEMOTO ,  Manabu INOUE

IPC分类号： H03K17/687

CPC分类号： H03K17/687 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/7787 ,  H03K17/302 ,  H03K17/567 ,  H03K17/6877 ,  H03K17/74 ,  H03K17/78 ,  H03K17/795 ,  H03K2217/0036

摘要： A bidirectional switch includes a field-effect transistor having a first ohmic electrode, a second ohmic electrode and a gate electrode, and a control circuit for controlling between a conduction state and a cut-off state by applying a bias voltage to the gate electrode. The control circuit applies the bias voltage from the first ohmic electrode as a reference when a potential of the second ohmic electrode is higher than the potential of the first ohmic electrode, and applies the bias voltage from the second ohmic electrode as a reference when the potential of the second electrode is lower than the potential of the first ohmic electrode.

摘要翻译： 双向开关包括具有第一欧姆电极，第二欧姆电极和栅电极的场效应晶体管，以及通过向栅电极施加偏压来控制导通状态和截止状态的控制电路。 当第二欧姆电极的电位高于第一欧姆电极的电位时，控制电路施加来自第一欧姆电极的偏置电压作为参考，并且当第二欧姆电极的电位为电位时施加来自第二欧姆电极的偏置电压作为参考 的第二电极的电位低于第一欧姆电极的电位。