公开(公告)号：US20110294291A1

公开(公告)日：2011-12-01

申请号：US13035546

申请日：2011-02-25

申请人： Yukiteru Matsui ,  Gaku Minamihaba ,  Hajime Eda ,  Masayoshi Iwayama ,  Minoru Amano ,  Masatoshi Yoshikawa ,  Motoyuki Sato ,  Kyoichi Suguro ,  Masako Kodera

发明人： Yukiteru Matsui ,  Gaku Minamihaba ,  Hajime Eda ,  Masayoshi Iwayama ,  Minoru Amano ,  Masatoshi Yoshikawa ,  Motoyuki Sato ,  Kyoichi Suguro ,  Masako Kodera

IPC分类号： H01L21/768

CPC分类号： H01L21/02697 ,  H01L21/3212 ,  H01L21/7684 ,  H01L21/76877 ,  H01L21/76883 ,  H01L27/228

摘要： According to one embodiment, a semiconductor device includes a switch element provided in a surface area of a semiconductor substrate, a contact plug with an upper surface and a lower surface, and a function element provided on the upper surface of the contact plug. The lower surface of the contact plug is connected to the switch element. The upper surface of the contact plug has a maximum roughness of 0.2 nm or less.

摘要翻译： 根据一个实施例，半导体器件包括设置在半导体衬底的表面区域中的开关元件，具有上表面和下表面的接触插塞以及设置在接触插塞的上表面上的功能元件。 接触插头的下表面连接到开关元件。 接触塞的上表面的最大粗糙度为0.2nm以下。

公开(公告)号：US08058080B2

公开(公告)日：2011-11-15

申请号：US12699721

申请日：2010-02-03

申请人： Takeshi Kajiyama ,  Yoshiaki Asao ,  Minoru Amano ,  Shigeki Takahashi ,  Masayoshi Iwayama ,  Kuniaki Sugiura

发明人： Takeshi Kajiyama ,  Yoshiaki Asao ,  Minoru Amano ,  Shigeki Takahashi ,  Masayoshi Iwayama ,  Kuniaki Sugiura

IPC分类号： H01L21/00 ,  H01L21/20 ,  H01L21/36

CPC分类号： H01L43/12 ,  G11C11/161 ,  H01L27/228

摘要： A magnetic material of a magnetoresistive element is formed on a lower electrode. An upper electrode is formed on the magnetic material. A resist for nano-imprint lithography is formed on the upper electrode. A first pattern or a second pattern is formed in the resist by setting a first template or a second template into contact with the resist and curing the resist. The first template has the first pattern that corresponds to the magnetoresistive element and the lower electrode. The second template has the second pattern that corresponds to the magnetoresistive element and the upper electrode. The magnetic material and the lower electrode are patterned at the same time by using the resist having the first pattern, or the magnetic material and the upper electrode are patterned at the same time by using the resist having the second pattern.

摘要翻译： 磁阻元件的磁性材料形成在下电极上。 在磁性材料上形成上部电极。 在上电极上形成用于纳米压印光刻的抗蚀剂。 通过将第一模板或第二模板与抗蚀剂接触并固化抗蚀剂，在抗蚀剂中形成第一图案或第二图案。 第一模板具有对应于磁阻元件和下电极的第一图案。 第二模板具有对应于磁阻元件和上电极的第二图案。 通过使用具有第一图案的抗蚀剂，同时对磁性材料和下部电极进行图案化，或者通过使用具有第二图案的抗蚀剂同时对磁性材料和上部电极进行图案化。

公开(公告)号：US20140124883A1

公开(公告)日：2014-05-08

申请号：US14124647

申请日：2012-03-01

申请人： Masayoshi Iwayama

发明人： Masayoshi Iwayama

IPC分类号： H01L27/22 ,  H01L43/12

CPC分类号： H01L27/222 ,  H01L27/0207 ,  H01L28/20 ,  H01L43/08 ,  H01L43/12

摘要： The semiconductor storage device includes a memory cell array region in which a plurality of storing MTJ elements capable of changing resistance depending on a direction of magnetization are arranged on a semiconductor substrate. The semiconductor storage device includes a resistive element region in which a plurality of resisting MTJ elements are arranged on the semiconductor substrate along a first direction and a second direction perpendicular to the first direction. An area of a first cross section of the resisting MTJ element parallel with an upper surface of the semiconductor substrate is larger than an area of a second cross section of the storing MTJ element parallel with the upper surface of the semiconductor substrate.

摘要翻译： 半导体存储装置包括：存储单元阵列区域，其中能够根据磁化方向改变电阻的多个存储MTJ元件布置在半导体基板上。 半导体存储装置包括电阻元件区域，其中沿着第一方向和垂直于第一方向的第二方向在半导体衬底上布置多个电阻MTJ元件。 与半导体衬底的上表面平行的抗电MTJ元件的第一横截面的面积大于与半导体衬底的上表面平行的存储MTJ元件的第二截面的面积。

公开(公告)号：US08309950B2

公开(公告)日：2012-11-13

申请号：US12700536

申请日：2010-02-04

申请人： Masayoshi Iwayama ,  Takeshi Kajiyama ,  Yoshiaki Asao

发明人： Masayoshi Iwayama ,  Takeshi Kajiyama ,  Yoshiaki Asao

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/0665 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78696

摘要： First semiconductor layers are in source/drain regions on the semiconductor substrate. A second semiconductor layer comprises first portions on the first semiconductor layers and a second portion on a channel region between the source/drain regions. Third semiconductor layers are on the first portions of the second semiconductor layer. A gate electrode is around the second portion of the second semiconductor layer via an insulating film. Contact plugs are in the first semiconductor layers, the first portions of the second semiconductor layers and the third semiconductor layers in the source/drain regions. A diameter of the contact plug in the second semiconductor layer is smaller than a diameter of the contact plug in the first and third semiconductor layers.

摘要翻译： 第一半导体层位于半导体衬底上的源/漏区中。 第二半导体层包括第一半导体层上的第一部分和源/漏区之间的沟道区上的第二部分。 第三半导体层位于第二半导体层的第一部分上。 栅电极经由绝缘膜在第二半导体层的第二部分周围。 接触插塞位于第一半导体层中，第二半导体层的第一部分和源/漏区中的第三半导体层。 第二半导体层中的接触插塞的直径小于第一和第三半导体层中的接触插塞的直径。

公开(公告)号：US07919826B2

公开(公告)日：2011-04-05

申请号：US12108093

申请日：2008-04-23

申请人： Masayoshi Iwayama ,  Yoshiaki Asao ,  Takeshi Kajiyama ,  Keiji Hosotani

发明人： Masayoshi Iwayama ,  Yoshiaki Asao ,  Takeshi Kajiyama ,  Keiji Hosotani

IPC分类号： H01L21/00

CPC分类号： H01L43/08 ,  H01L27/222 ,  H01L43/12

摘要： A magnetoresistive element includes a first stacked structure formed by sequentially stacking a first fixed layer in which a magnetization direction is fixed and a first nonmagnetic layer, a second stacked structure formed on the first stacked structure by sequentially stacking a free layer in which a magnetization direction is changeable, a second nonmagnetic layer, and a second fixed layer in which a magnetization direction is fixed, and a circumferential wall formed in contact with a circumferential surface of the second stacked structure to surround the second stacked structure, and made of an insulator. A circumferential surface of the first stacked structure is substantially perpendicular. The second stacked structure has a tapered shape which narrows upward.

摘要翻译： 磁阻元件包括通过顺序层叠形成磁化方向的第一固定层和第一非磁性层的第一堆叠结构而形成的第一堆叠结构，通过顺序堆叠在第一层叠结构上形成的第二堆叠结构，其中磁化方向 可变化的第二非磁性层和固定有磁化方向的第二固定层，以及与第二堆叠结构的周向表面接触以围绕第二堆叠结构并由绝缘体制成的周壁。 第一堆叠结构的圆周表面基本垂直。 第二堆叠结构具有向上变窄的锥形形状。

公开(公告)号：US20080277703A1

公开(公告)日：2008-11-13

申请号：US12107955

申请日：2008-04-23

申请人： Masayoshi Iwayama

发明人： Masayoshi Iwayama

IPC分类号： H01L31/062 ,  G11C11/00 ,  H01L21/00

CPC分类号： H01L27/226 ,  B82Y10/00 ,  G11C11/16 ,  G11C11/5607

摘要： A magnetic random access memory includes a single tunnel junction element which includes a first fixed layer, a first recording layer, and a first nonmagnetic layer, a double tunnel junction element which includes a second fixed layer and a third fixed layer, a second recording layer, a second nonmagnetic layer formed between the second fixed layer and the second recording layer, and a third nonmagnetic layer formed between the third fixed layer and the second recording layer, and in which the magnetization directions in the second fixed layer and the second recording layer take one of the parallel state and the antiparallel state in accordance with a direction of an electric current flowing between the second fixed layer and the second recording layer, and a transistor connected to a memory cell having the single tunnel junction element and the double tunnel junction element connected in parallel.

摘要翻译： 磁性随机存取存储器包括单个隧道结元件，其包括第一固定层，第一记录层和第一非磁性层，双隧道结元件，其包括第二固定层和第三固定层，第二记录层 形成在第二固定层和第二记录层之间的第二非磁性层和形成在第三固定层和第二记录层之间的第三非磁性层，其中第二固定层和第二记录层中的磁化方向 根据在第二固定层和第二记录层之间流动的电流的方向，采取平行状态和反平行状态之一，以及连接到具有单一隧道结元件和双隧道结的存储单元的晶体管 元件并联连接。

公开(公告)号：US20080265347A1

公开(公告)日：2008-10-30

申请号：US12108093

申请日：2008-04-23

申请人： Masayoshi Iwayama ,  Yoshiaki Asao ,  Takeshi Kajiyama ,  Keiji Hosotani

发明人： Masayoshi Iwayama ,  Yoshiaki Asao ,  Takeshi Kajiyama ,  Keiji Hosotani

IPC分类号： H01L29/82 ,  H01L21/00

CPC分类号： H01L43/08 ,  H01L27/222 ,  H01L43/12

摘要： A magnetoresistive element includes a first stacked structure formed by sequentially stacking a first fixed layer in which a magnetization direction is fixed and a first nonmagnetic layer, a second stacked structure formed on the first stacked structure by sequentially stacking a free layer in which a magnetization direction is changeable, a second nonmagnetic layer, and a second fixed layer in which a magnetization direction is fixed, and a circumferential wall formed in contact with a circumferential surface of the second stacked structure to surround the second stacked structure, and made of an insulator. A circumferential surface of the first stacked structure is substantially perpendicular. The second stacked structure has a tapered shape which narrows upward.

摘要翻译： 磁阻元件包括通过顺序层叠形成磁化方向的第一固定层和第一非磁性层的第一堆叠结构而形成的第一堆叠结构，通过顺序堆叠在第一层叠结构上形成的第二堆叠结构，其中磁化方向 可变化的第二非磁性层和固定有磁化方向的第二固定层，以及与第二堆叠结构的周向表面接触以围绕第二堆叠结构并由绝缘体制成的周壁。 第一堆叠结构的圆周表面基本垂直。 第二堆叠结构具有向上变窄的锥形形状。

公开(公告)号：US09640756B2

公开(公告)日：2017-05-02

申请号：US14808347

申请日：2015-07-24

申请人： Hisanori Aikawa ,  Masayoshi Iwayama

发明人： Hisanori Aikawa ,  Masayoshi Iwayama

IPC分类号： H01L43/12 ,  H01L43/02 ,  H01L43/08 ,  H01L21/66

CPC分类号： H01L43/12 ,  G11C11/161 ,  G11C2029/5002 ,  H01L22/14 ,  H01L43/02 ,  H01L43/08

摘要： According to one embodiment, a method for manufacturing a magnetic memory is disclosed. The method includes forming a magnetoresistive element on a substrate. The method further includes measuring an electrical characteristic of the magnetoresistive element, and applying a voltage to the magnetoresistive element which the electrical characteristic is measured.

公开(公告)号：US09276039B2

公开(公告)日：2016-03-01

申请号：US14124647

申请日：2012-03-01

申请人： Masayoshi Iwayama

发明人： Masayoshi Iwayama

IPC分类号： H01L29/82 ,  H01L27/22 ,  H01L49/02 ,  H01L43/08 ,  H01L43/12 ,  H01L27/02

CPC分类号： H01L27/222 ,  H01L27/0207 ,  H01L28/20 ,  H01L43/08 ,  H01L43/12

摘要： The semiconductor storage device includes a memory cell array region in which a plurality of storing MTJ elements capable of changing resistance depending on a direction of magnetization are arranged on a semiconductor substrate. The semiconductor storage device includes a resistive element region in which a plurality of resisting MTJ elements are arranged on the semiconductor substrate along a first direction and a second direction perpendicular to the first direction. An area of a first cross section of the resisting MTJ element parallel with an upper surface of the semiconductor substrate is larger than an area of a second cross section of the storing MTJ element parallel with the upper surface of the semiconductor substrate.

摘要翻译： 半导体存储装置包括：存储单元阵列区域，其中能够根据磁化方向改变电阻的多个存储MTJ元件布置在半导体基板上。 半导体存储装置包括电阻元件区域，其中沿着第一方向和垂直于第一方向的第二方向在半导体衬底上布置多个电阻MTJ元件。 与半导体衬底的上表面平行的抗电MTJ元件的第一横截面的面积大于与半导体衬底的上表面平行的存储MTJ元件的第二截面的面积。

公开(公告)号：US08314464B2

公开(公告)日：2012-11-20

申请号：US12700502

申请日：2010-02-04

申请人： Masayoshi Iwayama ,  Yoshiaki Asao ,  Takeshi Kajiyama

发明人： Masayoshi Iwayama ,  Yoshiaki Asao ,  Takeshi Kajiyama

IPC分类号： H01L29/78

CPC分类号： H01L29/42392 ,  B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/66439 ,  H01L29/7613 ,  H01L29/775 ,  H01L29/78696

摘要： First semiconductor layers are in source/drain regions on the semiconductor substrate. A second semiconductor layer comprises first portions on the first semiconductor layers and a second portion in a linear form in a channel region between the source/drain regions. A gate electrode is around the second portion of the second semiconductor layer via an insulating film. A film thickness of the second portion of the second semiconductor layer is smaller than a film thickness of the first portion of the second semiconductor layer.

摘要翻译： 第一半导体层位于半导体衬底上的源/漏区中。 第二半导体层包括在第一半导体层上的第一部分和在源极/漏极区之间的沟道区中线性形式的第二部分。 栅电极经由绝缘膜在第二半导体层的第二部分周围。 第二半导体层的第二部分的膜厚度小于第二半导体层的第一部分的膜厚度。