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5 条记录 (耗时 0.021 秒)

    Method for forming a low-k dielectric structure on a substrate
    1.
    发明授权
    Method for forming a low-k dielectric structure on a substrate 有权
    在衬底上形成低k电介质结构的方法

    公开(公告)号：US06967158B2

    公开(公告)日：2005-11-22

    申请号：US10384398

    申请日：2003-03-07

    申请人： Yuri Solomentsev ,  Matthew S. Angyal ,  Errol Todd Ryan ,  Susan Gee-Young Kim

    发明人： Yuri Solomentsev ,  Matthew S. Angyal ,  Errol Todd Ryan ,  Susan Gee-Young Kim

    IPC分类号： H01L21/321 ,  H01L21/768 ,  H01L21/4763

    CPC分类号： H01L21/3212 ,  H01L21/76829 ,  H01L21/7684

    摘要： The present invention provides a method for forming a low-k dielectric structure on a substrate 10 that includes depositing, upon the substrate, a dielectric layer 12. A multi-film cap layer 18 is deposited upon the dielectric layer. The multi-film cap layer includes first 181 and second 182 films, with the second film being disposed between the dielectric layer and the first film. The first film typically has a removal rate associated therewith that is less than the removal rate associated with the second film. A deposition layer 20 is deposited upon the multi-film cap layer and subsequently removed. The properties of the multi-film cap layer are selected so as to prevent the dielectric layer from being exposed/removed during removal of the deposition film. In this manner, a deposition layer, having variable rates of removal, such as copper, may be planarized without damaging the underlying dielectric layer.

    摘要翻译： 本发明提供了一种用于在衬底10上形成低k电介质结构的方法，该方法包括在衬底上沉积介电层12.多层覆盖层18沉积在电介质层上。 多层膜层包括第一和第二膜182，其中第二膜设置在电介质层和第一膜之间。 第一膜通常具有与其相关联的去除速率小于与第二膜相关联的去除速率。 沉积层20沉积在多膜覆盖层上并随后除去。 选择多层盖层的性质，以防止在去除沉积膜期间电介质层被曝光/去除。 以这种方式，可以平坦化具有可变迁移速率（例如铜）的沉积层，而不会损坏下面的介电层。

    Method and structure for low-k dielectric constant applications
    2.
    发明授权
    Method and structure for low-k dielectric constant applications 有权
    低k介电常数应用的方法和结构

    公开(公告)号：US06774053B1

    公开(公告)日：2004-08-10

    申请号：US10384350

    申请日：2003-03-07

    申请人： Errol Todd Ryan ,  Cindy K. Goldberg ,  Yuri Solomentsev ,  Yeong-Jyh T. Lii

    发明人： Errol Todd Ryan ,  Cindy K. Goldberg ,  Yuri Solomentsev ,  Yeong-Jyh T. Lii

    IPC分类号： H01L2131

    CPC分类号： H01L21/76835 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76829 ,  H01L21/7684

    摘要： The present invention provides a low-k dielectric constant structure and method of forming the same on a substrate 10 that features having a dielectric layer 20 with differing regions of density 12 and 18. To that end, the method includes depositing, upon the substrate, a dielectric layer having first and second density regions. The density associated with the second density region being greater than the density associated with the first density region, and the first density region being disposed between the substrate and the second density region.

    摘要翻译： 本发明提供了一种低k介电常数结构及其在衬底10上形成的方法，其特征在于具有不同密度区域12和18的电介质层20.为此，该方法包括在衬底上沉积， 具有第一和第二密度区域的电介质层。 与第二密度区域相关联的密度大于与第一密度区域相关联的密度，并且第一密度区域设置在衬底和第二密度区域之间。

    Single mask MIM capacitor and resistor with in trench copper drift barrier
    3.
    发明申请
    Single mask MIM capacitor and resistor with in trench copper drift barrier 有权
    单掩模MIM电容器和电阻器具有沟槽铜漂移屏障

    公开(公告)号：US20060160299A1

    公开(公告)日：2006-07-20

    申请号：US11037530

    申请日：2005-01-18

    申请人： Satyavolu Rao ,  Darius Crenshaw ,  Stephan Grunow ,  Kenneth Brennan ,  Somit Joshi ,  Montray Leavy ,  Phillip Matz ,  Sameer Ajmera ,  Yuri Solomentsev

    发明人： Satyavolu Rao ,  Darius Crenshaw ,  Stephan Grunow ,  Kenneth Brennan ,  Somit Joshi ,  Montray Leavy ,  Phillip Matz ,  Sameer Ajmera ,  Yuri Solomentsev

    IPC分类号： H01L21/8242

    CPC分类号： H01L21/76834 ,  H01L21/288 ,  H01L21/76816 ,  H01L21/76849 ,  H01L23/5223 ,  H01L28/20 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The formation of a MIM (metal insulator metal) capacitor (164) and concurrent formation of a resistor (166) is disclosed. A copper diffusion barrier (124) is formed over a copper deposition (110) that serves as a bottom electrode (170) of the capacitor (164). The copper diffusion barrier (124) mitigates unwanted diffusion of copper from the copper deposition (110), and is formed via electro-less deposition such that little to none of the barrier material is deposited at locations other than over a top surface (125) of the deposition of copper/bottom electrode. Subsequently, layers of dielectric (150) and conductive (152) materials are applied to form a dielectric (172) and top electrode (174) of the MIM capacitor (164), respectively, where the layer of conductive top electrode material (152) also functions to concurrently develop the resistor (166) on the same chip as the capacitor (164).

    摘要翻译： 公开了MIM（金属绝缘金属）电容器（164）的形成和电阻器（166）的同时形成。 在用作电容器（164）的底部电极（170）的铜沉积（110）上形成铜扩散阻挡层（124）。 铜扩散阻挡层（124）减轻了铜从铜沉积物（110）的不期望的扩散，并且通过无电沉积形成，使得在除了顶部表面（125）之外的位置处几乎不会沉积阻挡材料， 的铜/底电极的沉积。 随后，分别施加介电层（150）和导电（152）材料层以形成MIM电容器（164）的电介质（172）和顶电极（174），其中导电顶电极材料层（152） 还用于同时开发与电容器（164）相同的芯片上的电阻器（166）。

    CMP metal polishing slurry and process with reduced solids concentration
    4.
    发明授权
    CMP metal polishing slurry and process with reduced solids concentration 失效
    CMP金属抛光浆料和固体浓度降低的工艺

    公开(公告)号：US07456105B1

    公开(公告)日：2008-11-25

    申请号：US10321973

    申请日：2002-12-17

    申请人： Kevin Elliot Cooper ,  Jennifer Lynn Cooper ,  Janos Farkas ,  John C. Flake ,  Johannes Friedrich Groschopf ,  Yuri Solomentsev

    发明人： Kevin Elliot Cooper ,  Jennifer Lynn Cooper ,  Janos Farkas ,  John C. Flake ,  Johannes Friedrich Groschopf ,  Yuri Solomentsev

    IPC分类号： H01L21/302 ,  H01L21/461

    CPC分类号： H01L21/3212 ,  C09G1/02

    摘要： This disclosure describes a low particle concentration formulation for slurry which is particularly useful in continuous CMP polishing of copper layers during semiconductor wafer manufacture. The slurry is characterized by particle concentrations generally less than 2 wt %, and advantageously less than 1 wt %. In particular embodiments, where the particle concentration is in a range of 50 to 450 PPM, an 8-fold increase in polishing rate over reactive liquid slurries has been realized. Slurries thus formulated also achieve a reduction in defectivity and in the variations in planarity from wafer to wafer during manufacture, by improving the stability of polishing quality. The slurry formulations permit substantial cost savings over traditional 2-component, reactive liquid and fixed/bonded abrasive slurries. In addition the formulations provides an advantageous way during CMP to easily change the selectivity or rate of removal of one film material vs. another. Yet another use is to provide slurry “pulsing” as a means to activate bonded abrasive or fixed abrasive slurry technology.

    摘要翻译： 本公开内容描述了用于浆料的低颗粒浓度配方，其特别适用于半导体晶片制造过程中铜层的连续CMP抛光。 浆料的特征在于颗粒浓度通常小于2重量％，有利地小于1重量％。 在特定实施方案中，其中颗粒浓度在50至450PPM的范围内，抛光速率比反应性液体浆料高8倍。 因此，通过提高抛光质量的稳定性，由此制成的浆料也可以在制造过程中实现缺陷率的降低和从晶片到晶片的平面度的变化。 与传统的2组分反应性液体和固定/粘结的磨料浆料相比，浆料配方可节省大量成本。 此外，制剂在CMP期间提供有利的方式以容易地改变一种膜材料相对于另一种膜材料的选择性或速率。 另一种用途是提供浆料“脉冲”作为活化粘合磨料或固定磨料浆料技术的手段。