公开(公告)号：US5079415A

公开(公告)日：1992-01-07

申请号：US503046

申请日：1990-04-02

申请人： Yutaka Hayashi ,  Hiroyoshi Funato ,  Iwao Hamaguchi ,  Shunsuke Fujita

发明人： Yutaka Hayashi ,  Hiroyoshi Funato ,  Iwao Hamaguchi ,  Shunsuke Fujita

IPC分类号： H01L27/146

CPC分类号： H01L27/14643

摘要： An apparatus for converting optical information into an electrical information signal includes a plurality of one-dimensional conversion arrays arranged in parallel form. Each one-dimensional conversion array has first and second photoelectric conversion structures integrally formed. The first photoelectric conversion structure has photoelectric conversion elements each having a light receiving surface onto which an information light is projected. The second photoelectric conversion structure has photoelectric conversion elements each having a sweep light receiving surface onto which a sweep light is projected. The sweep light has a cross section which simultaneously scans the sweep light receiving surface of one of the photoelectric conversion elements included in each of the one-dimensional conversion arrays. The electrical information signal is read out from the photoelectric conversion elements provided in the first photoelectric conversion structure when the sweep light is projected onto the photoelectric conversion elements provided in the second photoelectric conversion structure.

摘要翻译： 用于将光学信息转换为电信息信号的装置包括以并行形式布置的多个一维转换阵列。 每一维转换阵列具有一体形成的第一和第二光电转换结构。 第一光电转换结构具有各自具有投影信息光的受光面的光电转换元件。 第二光电转换结构具有光电转换元件，每个光电转换元件具有投射有扫描光的扫掠光接收表面。 扫描光具有同时扫描包括在每个一维转换阵列中的一个光电转换元件的扫描光接收表面的横截面。 当扫描光投射到设置在第二光电转换结构中的光电转换元件上时，从设置在第一光电转换结构中的光电转换元件读出电信息信号。

公开(公告)号：US5235542A

公开(公告)日：1993-08-10

申请号：US776642

申请日：1991-10-15

申请人： Yutaka Hayashi ,  Iwao Hamaguchi ,  Shunsuke Fujita

发明人： Yutaka Hayashi ,  Iwao Hamaguchi ,  Shunsuke Fujita

IPC分类号： H01L27/146

CPC分类号： H01L27/14643

摘要： An apparatus for converting optical information into an electrical information signal includes a plurality of one-dimensional conversion arrays arranged in parallel form. Each one-dimensional conversion array has first and second photoelectric conversion structures integrally formed. The first photoelectric conversion structure has photoelectric conversion elements each having a light receiving surface onto which an information light is projected. The second photoelectric conversion structure has photoelectric conversion elements each having a sweep light receiving surface onto which a sweep light is projected. The sweep light has a cross section which simultaneously scans the sweep light receiving surface of one of the photoelectric conversion elements included in each of the one-dimensional conversion arrays. The electrical information signal is read out from the photoelectric conversion elements provided in the first photoelectric conversion structure when the sweep light is projected onto the photoelectric conversion elements provided in the second photoelectric conversion structure.

摘要翻译： 用于将光学信息转换为电信息信号的装置包括以并行形式布置的多个一维转换阵列。 每一维转换阵列具有一体形成的第一和第二光电转换结构。 第一光电转换结构具有各自具有投影信息光的受光面的光电转换元件。 第二光电转换结构具有光电转换元件，每个光电转换元件具有投射有扫描光的扫掠光接收表面。 扫描光具有同时扫描包括在每个一维转换阵列中的一个光电转换元件的扫描光接收表面的横截面。 当扫描光投射到设置在第二光电转换结构中的光电转换元件上时，从设置在第一光电转换结构中的光电转换元件读出电信息信号。

公开(公告)号：US5351209A

公开(公告)日：1994-09-27

申请号：US776643

申请日：1991-10-15

申请人： Yutaka Hayashi ,  Iwao Hamaguchi ,  Shunsuke Fujita

发明人： Yutaka Hayashi ,  Iwao Hamaguchi ,  Shunsuke Fujita

IPC分类号： H01L27/146 ,  G11C13/04

CPC分类号： H01L27/14643

摘要： An apparatus for converting optical information into an electrical information signal includes a plurality of one-dimensional conversion arrays arranged in parallel form. Each one-dimensional conversion array has first and second photoelectric conversion structures integrally formed. The first photoelectric conversion structure has photoelectric conversion elements each having a light receiving surface onto which an information light is projected. The second photoelectric conversion structure has photoelectric conversion elements each having a sweep light receiving surface onto which a sweep light is projected. The sweep light has a cross section which simultaneously scans the sweep light receiving surface of one of the photoelectric conversion elements included in each of the one-dimensional conversion arrays. The electrical information signal is read out from the photoelectric conversion elements provided in the first photoelectric conversion structure when the sweep light is projected onto the photoelectric conversion elements provided in the second photoelectric conversion structure.

摘要翻译： 用于将光学信息转换为电信息信号的装置包括以并行形式布置的多个一维转换阵列。 每一维转换阵列具有一体形成的第一和第二光电转换结构。 第一光电转换结构具有各自具有投影信息光的受光面的光电转换元件。 第二光电转换结构具有光电转换元件，每个光电转换元件具有投射有扫描光的扫掠光接收表面。 扫描光具有同时扫描包括在每个一维转换阵列中的一个光电转换元件的扫描光接收表面的横截面。 当扫描光投射到设置在第二光电转换结构中的光电转换元件上时，从设置在第一光电转换结构中的光电转换元件读出电信息信号。

公开(公告)号：US4567061A

公开(公告)日：1986-01-28

申请号：US635477

申请日：1984-07-30

申请人： Yutaka Hayashi ,  Iwao Hamaguchi ,  Kiyohiko Kobayashi

发明人： Yutaka Hayashi ,  Iwao Hamaguchi ,  Kiyohiko Kobayashi

IPC分类号： H01L29/78 ,  H01L21/316

CPC分类号： H01L21/02131 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/31658 ,  H01L21/31662 ,  Y10S438/91

摘要： An insulation film of improved properties and an interface of similarly improved properties between the insulation film and a semiconductor are produced by heating silicon, a silicon compound or a silicon dioxide film in an atmosphere formed by incorporating a carbon fluorine gas into an oxidative gas.

摘要翻译： 通过在通过将碳氟气引入到氧化气体中形成的气氛中加热硅，硅化合物或二氧化硅膜来制造绝缘膜和半导体之间具有改善的性能和类似改善性能的界面的绝缘膜。

公开(公告)号：US4900396A

公开(公告)日：1990-02-13

申请号：US233585

申请日：1988-08-18

申请人： Yutaka Hayashi ,  Kenichi Ishii ,  Shunsuke Fujita

发明人： Yutaka Hayashi ,  Kenichi Ishii ,  Shunsuke Fujita

IPC分类号： H01L21/033 ,  H01L21/314 ,  H01L21/32

CPC分类号： H01L21/033 ,  H01L21/3144 ,  H01L21/32

摘要： A two-dimensional pattern of a silicon oxide film is formed on a silicon surface of a substrate, thereby to form a material, the two-dimensional pattern being represented by the presence and absence and/or thickness variations of the silicon oxide film. The material is nitrided to form a modified layer on the surface of the material, the modified layer being thicker on the silicon oxide film and thinner on the silicon surface of the substrate or thicker on the thicker portion of the silicon oxide film and thinner on the thinner portion of the silicon oxide film. The thinner portion of the modified layer is removed while leaving the thicker portion of the modified layer, for thereby forming the modified layer on the silicon oxide film substantially in the same shape as the silicon oxide film. An oxidant diffusion prevention film is formed at least on a thicker portion of the oxide film which has a thicker portion and a thinner portion on a substrate, then a silicon film, a silicide film, or a multilayer film composed of silicon and silicide films is deposited on a surface of the substrate a mask layer is formed on the film or films. The silicon film, the silicide film, or the multilayer film is oxidized to pattern the same in a shape corresponding to the mask layer. A relatively thin silicon oxide film may be formed on the oxidant diffusion prevention film.

摘要翻译： 在基板的硅表面上形成氧化硅膜的二维图案，从而形成材料，二维图案由氧化硅膜的存在和/或厚度变化来表示。 该材料被氮化以在材料的表面上形成改性层，改性层在氧化硅膜上更厚并且在衬底的硅表面上更薄，或者在氧化硅膜的较厚部分上更厚， 较薄的氧化硅膜部分。 除去改性层的较薄部分，同时留下改性层的较厚部分，由此在氧化硅膜上形成基本上与氧化硅膜相同形状的改性层。 至少在基板上具有较厚部分和较薄部分的氧化物膜的较厚部分上形成氧化物扩散防止膜，则硅膜，硅化物膜或由硅和硅化物膜构成的多层膜为 沉积在衬底的表面上，在膜或膜上形成掩模层。 硅膜，硅化物膜或多层膜被氧化成与掩模层相对应的形状。 可以在氧化剂扩散防止膜上形成相对薄的氧化硅膜。

公开(公告)号：US20130224557A1

公开(公告)日：2013-08-29

申请号：US13881747

申请日：2011-10-13

申请人： Tomohiro Hayakawa ,  Takayoshi Hosoya ,  Hiroyuki Kawai ,  Hideo Hayashi ,  Yutaka Hayashi ,  Kohsuke Togashi ,  Naotaka Gotoh

发明人： Tomohiro Hayakawa ,  Takayoshi Hosoya ,  Hiroyuki Kawai ,  Hideo Hayashi ,  Yutaka Hayashi ,  Kohsuke Togashi ,  Naotaka Gotoh

IPC分类号： H01M2/16

CPC分类号： H01M2/1653 ,  C08G18/04 ,  C08G18/4009 ,  H01M2/162 ,  H01M2/1666 ,  H01M2/1686 ,  H01M10/052 ,  Y02E60/122 ,  Y02P70/54

摘要： Provided is a separator for non-aqueous batteries, capable of being usefully used in non-aqueous batteries, and a non-aqueous battery equipped with this separator. The separator for non-aqueous batteries includes: a base layer comprising a fiber aggregate, and an electrolyte-swellable resin layer formed on at least one surface of the base layer, the resin layer comprising a urethane resin (C) obtained by reacting a polyol (A) including a vinyl polymer (a1) and a polyether polyol (a2) with a polyisocyanate (B). The vinyl polymer (a1) has as a main chain a vinyl polymer (a1′) having two hydroxyl groups at one of the termini of the main chain, and a polyoxyethylene chain having a number average molecular weight of 200 to 800 as a side chain, the percentage of the polyoxyethylene chain based on the vinyl polymer (a1) being within the range of 70 mass % to 98 mass %.

摘要翻译： 本发明提供一种能够用于非水电池的非水电池用隔膜，以及配备有该隔膜的非水电池。 非水电池用隔膜包括：包含纤维聚集体的基层和形成在基层的至少一个表面上的电解质溶胀性树脂层，所述树脂层包含聚氨酯树脂（C），其通过使多元醇 （A）包括乙烯基聚合物（a1）和聚醚多元醇（a2）与多异氰酸酯（B）。 乙烯基聚合物（a1）作为主链具有在主链的一个末端具有两个羟基的乙烯基聚合物（a1'）和作为侧链的数均分子量为200〜800的聚氧乙烯链 基于乙烯基聚合物（a1）的聚氧乙烯链的百分比在70质量％至98质量％的范围内。

公开(公告)号：US08450799B2

公开(公告)日：2013-05-28

申请号：US11975923

申请日：2007-10-22

申请人： Yutaka Hayashi ,  Hisashi Hasegawa ,  Hiroaki Takasu ,  Jun Osanai

发明人： Yutaka Hayashi ,  Hisashi Hasegawa ,  Hiroaki Takasu ,  Jun Osanai

IPC分类号： H01L29/34

CPC分类号： H01L29/78615 ,  H01L29/66772

摘要： A field effect transistor has an insulating substrate, a semiconductor thin film formed on the insulating substrate, and a gate insulating film on the semiconductor thin film. A first gate electrode is formed on the gate insulating film. A first region and a second region having a first conductivity type are formed on or in a surface of the semiconductor film on opposite sides of the first gate electrode in a length direction thereof. A third region having a second conductivity type opposite the first conductivity type is arranged on or in the semiconductor film side by side with the second region in a width direction of the first gate electrode. The third region and the second region are in contact with each other and make a low resistance junction. A second gate electrode is formed on the gate insulating film along the second region. A fourth region having the first conductivity type is formed on or in the semiconductor film on an opposite side of the second region with respect to the second gate electrode. One of the first and the fourth regions is used as an output region according to a circuit operation.

公开(公告)号：US08094484B2

公开(公告)日：2012-01-10

申请号：US12644851

申请日：2009-12-22

申请人： Tsuyoshi Takahashi ,  Yutaka Hayashi ,  Yuichiro Masuda ,  Shigeo Furuta ,  Masatoshi Ono

发明人： Tsuyoshi Takahashi ,  Yutaka Hayashi ,  Yuichiro Masuda ,  Shigeo Furuta ,  Masatoshi Ono

IPC分类号： G11C11/00

CPC分类号： H01L27/24 ,  G11C13/00 ,  G11C13/0069 ,  G11C13/02 ,  G11C2013/0071 ,  G11C2013/009 ,  G11C2213/79

摘要： Disclosed is a memory cell array including word and first bit lines and second bit lines respectively connected to memory cells, wherein each memory cell includes a MOS transistor and switching element having first and second conductive layers and a gap in which a resistance value changes by applying a predetermined voltage, and data is written by specifying the first bit line to connect it to a ground, specifying the word line and supplying a write voltage to the second bit lines, and read by specifying the first bit line to connect it to the sense amplifier, specifying the word line and supplying a read voltage lower than the write voltage to the second bit lines, and the word line is specified when the word line voltage becomes a gate threshold value voltage or more and a sum of a drive voltage and the gate threshold value voltage or less.

摘要翻译： 公开了一种存储单元阵列，包括分别连接到存储单元的单词和第一位线和第二位线，其中每个存储单元包括MOS晶体管和具有第一和第二导电层的开关元件以及通过施加电阻值而改变电阻值的间隙 通过指定第一位线将其连接到地，写入数据，指定字线并向第二位线提供写入电压，并通过指定第一位线将其连接到感测来读取 放大器，指定字线并将低于写入电压的读取电压提供给第二位线，并且当字线电压变为栅极阈值电压或更高时指定字线，并且驱动电压和 门极阈值电压以下。

公开(公告)号：US20100208522A1

公开(公告)日：2010-08-19

申请号：US12601788

申请日：2008-05-23

申请人： Yutaka Hayashi ,  Kazuhika Matsumoto ,  Takafumi Kamimura

发明人： Yutaka Hayashi ,  Kazuhika Matsumoto ,  Takafumi Kamimura

IPC分类号： G11C16/02 ,  H01L27/105

CPC分类号： H01L29/7881 ,  B82Y10/00 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/28291 ,  H01L29/0657 ,  H01L29/1606 ,  H01L29/42336 ,  H01L29/42352 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/6684 ,  H01L29/7781 ,  H01L29/792

摘要： A memory device (1) includes at least a first semiconductor region (100) having a length, a first surface, and a cross section surrounded by the first surface, a memory means (300) provided on the first surface, and a gate (400) provided on the memory means (300), and an equivalent sectional radius of the cross section of the first semiconductor region (100) is set to be equal to or smaller than an equivalent silicon oxide film thickness of the memory means (300) to realize low program voltage. The equivalent sectional radius r of the cross section is set to be 10 nm or less and the gate length is set to be 20 nm or less so that multi-level interval converted to gate voltage becomes a specific value which can be identified under the room temperature.

摘要翻译： 存储器件（1）至少包括具有由第一表面包围的长度，第一表面和横截面的第一半导体区域（100），设置在第一表面上的存储器件（300）和栅极 400），并且将第一半导体区域（100）的横截面的等效截面半径设定为等于或小于存储装置（300）的等效氧化硅膜厚度， 实现低编程电压。 横截面的等效截面半径r设定为10nm以下，栅极长度设定为20nm以下，使得转换为栅极电压的多级间隔成为能够在室内识别的特定值 温度。

公开(公告)号：US20100165696A1

公开(公告)日：2010-07-01

申请号：US12644608

申请日：2009-12-22

申请人： Tsuyoshi Takahashi ,  Yutaka Hayashi ,  Yuichiro Masuda ,  Shigeo Furuta ,  Masatoshi Ono

发明人： Tsuyoshi Takahashi ,  Yutaka Hayashi ,  Yuichiro Masuda ,  Shigeo Furuta ,  Masatoshi Ono

IPC分类号： G11C5/06 ,  G11C7/00

CPC分类号： H01L27/24 ,  G11C13/00 ,  G11C13/0069 ,  G11C13/02 ,  G11C2013/0071 ,  G11C2013/009 ,  G11C2213/79

摘要： Disclosed is a memory cell array including word and first bit lines and second bit lines respectively connected to memory cells, wherein each memory cell includes a MOS transistor and switching element having first and second conductive layers and a gap in which a resistance value changes by applying a predetermined voltage, and data is written by specifying the first bit line to connect it to a ground, specifying the word line and supplying a write voltage to the second bit lines, and read by specifying the word line, and specifying the first bit line to supply a read voltage lower than the write voltage to the second bit lines, and the word line is specified when the voltage of the word line becomes a gate threshold value voltage or more and a sum of a drive voltage and the gate threshold value voltage or less.

摘要翻译： 公开了一种存储单元阵列，包括分别连接到存储单元的单词和第一位线和第二位线，其中每个存储单元包括MOS晶体管和具有第一和第二导电层的开关元件以及通过施加电阻值而改变电阻值的间隙 通过指定第一位线将其连接到地，写入数据，指定字线并向第二位线提供写入电压，并通过指定字线进行读取，并指定第一位线 以向第二位线提供低于写入电压的读取电压，并且当字线的电压变为栅极阈值电压以上并且驱动电压和栅极阈值电压之和时，指定字线 或更少。