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    Mixed-scale electronic interfaces
    1.
    发明授权
    Mixed-scale electronic interfaces 失效
    混合电子接口

    公开(公告)号：US07741204B2

    公开(公告)日：2010-06-22

    申请号：US11590492

    申请日：2006-10-30

    申请人： Zhiyong Li ,  Warren Robinett

    发明人： Zhiyong Li ,  Warren Robinett

    IPC分类号： H01L21/44

    CPC分类号： G11C5/06 ,  B82B1/00 ,  B82B3/00 ,  B82Y10/00 ,  B82Y40/00 ,  G11C5/12 ,  G11C2213/81 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L51/0595 ,  Y10S977/762 ,  Y10S977/94

    摘要： Certain embodiments of the present invention are directed to a method of fabricating a mixed-scale electronic interface. A substrate is provided with a first set of conductive elements. A first layer of nanowires may be formed over the first set of conductive elements. A number of channels may be formed, with each of the channels extending diagonally through a number of the nanowires of the first layer. A number of pads may be formed, each of which is electrically interconnected with an underlying conductive element of the first set of conductive elements and one or more adjacent nanowires of the first layer of nanowires. The pads and corresponding electrically interconnected nanowires define a number of pad-interconnected-nanowire-units. Additional embodiments are directed to a method of forming a nanoimprinting mold and a method of selectively programming nanowire-to-conductive element electrical connections.

    摘要翻译： 本发明的某些实施例涉及一种制造混合比例电子接口的方法。 衬底设置有第一组导电元件。 可以在第一组导电元件上形成第一层纳米线。 可以形成多个通道，其中每个通道对角地延伸穿过第一层的多个纳米线。 可以形成多个焊盘，每个焊盘与第一组导电元件的下面的导电元件和第一纳米线层的一个或多个相邻的纳米线电互连。 焊盘和相应的电互连纳米线限定了多个衬垫互连的纳米线单元。 另外的实施例涉及形成纳米压印模具的方法和选择性地编程纳米线至导电元件电连接的方法。

    MIXED-SCALE ELECTRONIC INTERFACES
    2.
    发明申请
    MIXED-SCALE ELECTRONIC INTERFACES 有权
    混合尺寸电子接口

    公开(公告)号：US20100197117A1

    公开(公告)日：2010-08-05

    申请号：US12761300

    申请日：2010-04-15

    申请人： Zhiyong Li ,  Warren Robinett

    发明人： Zhiyong Li ,  Warren Robinett

    IPC分类号： H01L21/768 ,  H01L23/525 ,  H01L21/02

    CPC分类号： G11C5/06 ,  B82B1/00 ,  B82B3/00 ,  B82Y10/00 ,  B82Y40/00 ,  G11C5/12 ,  G11C2213/81 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L51/0595 ,  Y10S977/762 ,  Y10S977/94

    摘要： Certain embodiments of the present invention are directed to a method of programming nanowire-to-conductive element electrical connections. The method comprises: providing a substrate including a number of conductive elements overlaid with a first layer of nanowires, at least some of the conductive elements electrically coupled to more than one of the nanowires through individual switching junctions, each of the switching junctions configured in either a low-conductance state or a high-conductance state; and switching a portion of the switching junctions from the low-conductance state to the high-conductance state or the high-conductance state to the low-conductance state so that individual nanowires of the first layer of nanowires are electrically coupled to different conductive elements of the number of conductive elements using a different one of the switching junctions configured in the high-conductance state. Other embodiments of the present invention are directed to a nanowire structure including a mixed-scale interface.

    摘要翻译： 本发明的某些实施例涉及一种编程纳米线至导电元件电连接的方法。 该方法包括：提供包括多个覆盖有第一纳米线层的导电元件的衬底，至少一些导电元件通过单独的开关结与多于一个的纳米线电耦合，每个开关结配置在 低电导状态或高电导状态; 以及将所述开关结的一部分从所述低电导状态切换到所述高电导状态或所述高电导状态至所述低电导状态，使得所述第一纳米线层的单个纳米线电耦合到不同的导电元件 使用在高电导状态下配置的不同的一个开关结的导电元件的数量。 本发明的其它实施方案涉及包括混合规模界面的纳米线结构。

    Mixed-scale electronic interfaces
    3.
    发明申请
    Mixed-scale electronic interfaces 失效
    混合电子接口

    公开(公告)号：US20080099929A1

    公开(公告)日：2008-05-01

    申请号：US11590492

    申请日：2006-10-30

    申请人： Zhiyong Li ,  Warren Robinett

    发明人： Zhiyong Li ,  Warren Robinett

    IPC分类号： H01L23/52 ,  H01L21/44

    CPC分类号： G11C5/06 ,  B82B1/00 ,  B82B3/00 ,  B82Y10/00 ,  B82Y40/00 ,  G11C5/12 ,  G11C2213/81 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L51/0595 ,  Y10S977/762 ,  Y10S977/94

    摘要： Certain embodiments of the present invention are directed to a method of fabricating a mixed-scale electronic interface. A substrate is provided with a first set of conductive elements. A first layer of nanowires may be formed over the first set of conductive elements. A number of channels may be formed, with each of the channels extending diagonally through a number of the nanowires of the first layer. A number of pads may be formed, each of which is electrically interconnected with an underlying conductive element of the first set of conductive elements and one or more adjacent nanowires of the first layer of nanowires. The pads and corresponding electrically interconnected nanowires define a number of pad-interconnected-nanowire-units. Additional embodiments are directed to a method of forming a nanoimprinting mold and a method of selectively programming nanowire-to-conductive element electrical connections.

    摘要翻译： 本发明的某些实施例涉及一种制造混合比例电子接口的方法。 衬底设置有第一组导电元件。 可以在第一组导电元件上形成第一层纳米线。 可以形成多个通道，其中每个通道对角地延伸穿过第一层的多个纳米线。 可以形成多个焊盘，每个焊盘与第一组导电元件的下面的导电元件和第一纳米线层的一个或多个相邻的纳米线电互连。 焊盘和相应的电互连纳米线限定了多个衬垫互连的纳米线单元。 另外的实施例涉及形成纳米压印模具的方法和选择性地编程纳米线至导电元件电连接的方法。

    Mixed-scale electronic interfaces
    4.
    发明授权
    Mixed-scale electronic interfaces 有权
    混合电子接口

    公开(公告)号：US08773882B2

    公开(公告)日：2014-07-08

    申请号：US12761300

    申请日：2010-04-15

    申请人： Zhiyong Li ,  Warren Robinett

    发明人： Zhiyong Li ,  Warren Robinett

    IPC分类号： G11C5/06 ,  G11C5/12 ,  B82Y10/00 ,  B82B1/00 ,  B82B3/00 ,  B82Y40/00

    CPC分类号： G11C5/06 ,  B82B1/00 ,  B82B3/00 ,  B82Y10/00 ,  B82Y40/00 ,  G11C5/12 ,  G11C2213/81 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L51/0595 ,  Y10S977/762 ,  Y10S977/94

    摘要： Certain embodiments of the present invention are directed to a method of programming nanowire-to-conductive element electrical connections. The method comprises: providing a substrate including a number of conductive elements overlaid with a first layer of nanowires, at least some of the conductive elements electrically coupled to more than one of the nanowires through individual switching junctions, each of the switching junctions configured in either a low-conductance state or a high-conductance state; and switching a portion of the switching junctions from the low-conductance state to the high-conductance state or the high-conductance state to the low-conductance state so that individual nanowires of the first layer of nanowires are electrically coupled to different conductive elements of the number of conductive elements using a different one of the switching junctions configured in the high-conductance state. Other embodiments of the present invention are directed to a nanowire structure including a mixed-scale interface.

    摘要翻译： 本发明的某些实施例涉及一种编程纳米线至导电元件电连接的方法。 该方法包括：提供包括覆盖有第一纳米线层的多个导电元件的衬底，至少一些导电元件通过单独的开关结与多于一个的纳米线电耦合，每个开关结配置在 低电导状态或高电导状态; 以及将所述开关结的一部分从所述低电导状态切换到所述高电导状态或所述高电导状态至所述低电导状态，使得所述第一纳米线层的单个纳米线电耦合到不同的导电元件 使用在高电导状态下配置的不同的一个开关结的导电元件的数量。 本发明的其它实施方案涉及包括混合规模界面的纳米线结构。

    Implantable nanosensor
    8.
    发明授权
    Implantable nanosensor 有权
    可植入纳米传感器

    公开(公告)号：US09592001B2

    公开(公告)日：2017-03-14

    申请号：US14406601

    申请日：2012-07-29

    申请人： Steven Barcelo ,  Zhiyong Li ,  Ansoon Kim ,  Gary Gibson

    发明人： Steven Barcelo ,  Zhiyong Li ,  Ansoon Kim ,  Gary Gibson

    IPC分类号： G01J3/44 ,  A61B5/1459 ,  G01N21/65 ,  A61B5/00

    CPC分类号： A61B5/1459 ,  A61B5/0075 ,  A61B5/6862 ,  G01N21/658

    摘要： An implantable nanosensor includes a stent to be implanted inside a fluid conduit. The stent has a well in a surface of the stent. The implantable nanosensor further includes a nanoscale-patterned sensing substrate disposed in the well. The nanoscale-patterned sensing substrate is to produce an optical scattering response signal indicative of a presence of an analyte in a fluid carried by the fluid conduit when interrogated by an optical stimulus signal.

    摘要翻译： 可植入纳米传感器包括待植入流体导管内的支架。 支架在支架表面有一个井。 可植入纳米传感器还包括设置在井中的纳米级图案感测基片。 纳米级图案化感测衬底将产生光学散射响应信号，该信号指示由光学刺激信号询问时由流体导管携带的流体中分析物的存在。

    Apparatus for use in sensing applications
    9.
    发明授权
    Apparatus for use in sensing applications 有权
    用于感应应用的装置

    公开(公告)号：US09310306B2

    公开(公告)日：2016-04-12

    申请号：US14006436

    申请日：2011-03-24

    申请人： Zhiyong Li ,  Ivan Naumov ,  Farzad Parvaresh

    发明人： Zhiyong Li ,  Ivan Naumov ,  Farzad Parvaresh

    IPC分类号： G01J3/44 ,  G01N21/65 ,  B05D3/00

    CPC分类号： G01N21/65 ,  B05D3/007 ,  G01N21/658

    摘要： An apparatus for use in sensing applications includes a substrate and a plurality of clusters arranged in an aperiodic configuration on the substrate, wherein each of the plurality of clusters is formed of a plurality of Raman-active material nano-particles, and wherein each of the Raman-active material nano-particles is positioned in a substantially ordered configuration with respect to each other in each of the respective plurality of clusters.

    摘要翻译： 用于感测应用的装置包括基板和在基板上以非周期配置布置的多个簇，其中多个簇中的每一个由多个拉曼活性材料纳米颗粒形成，并且其中 拉曼活性材料纳米颗粒在相应的多个簇中的每一个中相对于彼此定位成基本排列的构型。