公开(公告)号：US07772074B2

公开(公告)日：2010-08-10

申请号：US11874336

申请日：2007-10-18

申请人： Zhiyuan Ye ,  Andrew Lam ,  Saurabh Chopra ,  Yihwan Kim

发明人： Zhiyuan Ye ,  Andrew Lam ,  Saurabh Chopra ,  Yihwan Kim

IPC分类号： H01L21/336

CPC分类号： H01L29/7848 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02667 ,  H01L29/165 ,  H01L29/66628 ,  H01L29/66636

摘要： Processes for non-selectively forming one or more conformal silicon-containing epitaxial layers on recess corners are disclosed. Specific embodiments pertain to the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. In specific embodiments, the formation of a non-selective epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source such as silane and a higher order silane, followed by heating the substrate to promote solid phase epitaxial growth.

摘要翻译： 公开了在凹陷角上非选择性地形成一个或多个适形的含硅外延层的工艺。 具体实施例涉及半导体器件中的外延层的形成和处理，例如金属氧化物半导体场效应晶体管（MOSFET）器件。 在具体实施方案中，非选择性外延层的形成包括将处理室中的衬底暴露于包括诸如硅烷和高级硅烷的硅源的沉积气体，然后加热衬底以促进固相外延生长。

公开(公告)号：US20090104739A1

公开(公告)日：2009-04-23

申请号：US11874336

申请日：2007-10-18

申请人： Zhiyuan Ye ,  Andrew Lam ,  Saurabh Chopra ,  Yihwan Kim

发明人： Zhiyuan Ye ,  Andrew Lam ,  Saurabh Chopra ,  Yihwan Kim

IPC分类号： H01L21/00 ,  H01L21/336

CPC分类号： H01L29/7848 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02667 ,  H01L29/165 ,  H01L29/66628 ,  H01L29/66636

摘要： Processes for non-selectively forming one or more conformal silicon-containing epitaxial layers on recess corners are disclosed. Specific embodiments pertain to the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. In specific embodiments, the formation of a non-selective epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source such as silane and a higher order silane, followed by heating the substrate to promote solid phase epitaxial growth.

摘要翻译： 公开了在凹陷角上非选择性地形成一个或多个适形的含硅外延层的工艺。 具体实施例涉及半导体器件中的外延层的形成和处理，例如金属氧化物半导体场效应晶体管（MOSFET）器件。 在具体实施方案中，非选择性外延层的形成包括将处理室中的衬底暴露于包括诸如硅烷和高级硅烷的硅源的沉积气体，然后加热衬底以促进固相外延生长。

公开(公告)号：US07776698B2

公开(公告)日：2010-08-17

申请号：US11867933

申请日：2007-10-05

申请人： Zhiyuan Ye ,  Saurabh Chopra ,  Andrew Lam ,  Yihwan Kim

发明人： Zhiyuan Ye ,  Saurabh Chopra ,  Andrew Lam ,  Yihwan Kim

IPC分类号： H01L21/336 ,  H01L21/8238 ,  H01L21/36 ,  H01L21/311

CPC分类号： H01L21/02529 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/1054 ,  H01L29/7833

摘要： Methods for formation of epitaxial layers containing n-doped silicon are disclosed, including methods for the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. Formation of the n-doped epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source, a carbon source and an n-dopant source at a first temperature and pressure and then exposing the substrate to an etchant at a second higher temperature and a higher pressure than during deposition.

摘要翻译： 公开了用于形成包含n掺杂硅的外延层的方法，包括用于在半导体器件中形成和处理外延层的方法，例如金属氧化物半导体场效应晶体管（MOSFET）器件。 n掺杂外延层的形成包括在第一温度和压力下将工艺室中的衬底暴露于包括硅源，碳源和n-掺杂剂源的沉积气体，然后在第二温度和压力下将衬底暴露于蚀刻剂 更高的温度和更高的压力比沉积期间。

公开(公告)号：US20090093094A1

公开(公告)日：2009-04-09

申请号：US11867933

申请日：2007-10-05

申请人： Zhiyuan Ye ,  Saurabh Chopra ,  Andrew Lam ,  Yihwan Kim

发明人： Zhiyuan Ye ,  Saurabh Chopra ,  Andrew Lam ,  Yihwan Kim

IPC分类号： H01L21/365 ,  H01L21/336

CPC分类号： H01L21/02529 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/1054 ,  H01L29/7833

摘要： Methods for formation of epitaxial layers containing n-doped silicon are disclosed, including methods for the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. Formation of the n-doped epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source, a carbon source and an n-dopant source at a first temperature and pressure and then exposing the substrate to an etchant at a second higher temperature and a higher pressure than during deposition.

摘要翻译： 公开了用于形成包含n掺杂硅的外延层的方法，包括用于在半导体器件中形成和处理外延层的方法，例如金属氧化物半导体场效应晶体管（MOSFET）器件。 n掺杂外延层的形成包括在第一温度和压力下将工艺室中的衬底暴露于包括硅源，碳源和n-掺杂剂源的沉积气体，然后在第二温度和压力下将衬底暴露于蚀刻剂 更高的温度和更高的压力比沉积期间。

公开(公告)号：US09012328B2

公开(公告)日：2015-04-21

申请号：US13193566

申请日：2011-07-28

申请人： Zhiyuan Ye ,  Xuebin Li ,  Saurabh Chopra ,  Yihwan Kim

发明人： Zhiyuan Ye ,  Xuebin Li ,  Saurabh Chopra ,  Yihwan Kim

IPC分类号： H01L21/311 ,  H01L21/02 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8238

CPC分类号： H01L29/36 ,  H01L21/0245 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/02664 ,  H01L21/823814 ,  H01L29/167 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7834

摘要： Embodiments of the present invention generally relate to methods of forming epitaxial layers and devices having epitaxial layers. The methods generally include forming a first epitaxial layer including phosphorus and carbon on a substrate, and then forming a second epitaxial layer including phosphorus and carbon on the first epitaxial layer. The second epitaxial layer has a lower phosphorus concentration than the first epitaxial layer, which allows for selective etching of the second epitaxial layer and undesired amorphous silicon or polysilicon deposited during the depositions. The substrate is then exposed to an etchant to remove the second epitaxial layer and undesired amorphous silicon or polysilicon. The carbon present in the first and second epitaxial layers reduces phosphorus diffusion, which allows for higher phosphorus doping concentrations. The increased phosphorus concentrations reduce the resistivity of the final device. The devices include epitaxial layers having a resistivity of less than about 0.381 milliohm-centimeters.

摘要翻译： 本发明的实施例一般涉及形成外延层的方法和具有外延层的器件。 所述方法通常包括在衬底上形成包括磷和碳的第一外延层，然后在第一外延层上形成包括磷和碳的第二外延层。 第二外延层具有比第一外延层更低的磷浓度，其允许在沉积期间沉积的第二外延层和不期望的非晶硅或多晶硅的选择性蚀刻。 然后将衬底暴露于蚀刻剂以除去第二外延层和不期望的非晶硅或多晶硅。 存在于第一和第二外延层中的碳减少了磷扩散，这允许更高的磷掺杂浓度。 增加的磷浓度降低了最终装置的电阻率。 这些器件包括具有小于约0.381毫欧姆厘米的电阻率的外延层。

公开(公告)号：US08652945B2

公开(公告)日：2014-02-18

申请号：US13193576

申请日：2011-07-28

申请人： Zhiyuan Ye ,  Xuebin Li ,  Saurabh Chopra ,  Yihwan Kim

发明人： Zhiyuan Ye ,  Xuebin Li ,  Saurabh Chopra ,  Yihwan Kim

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L21/02532 ,  H01L21/0257 ,  H01L21/02576 ,  H01L21/0262 ,  H01L29/1054 ,  H01L29/78

摘要： Embodiments of the present invention generally relate to methods for forming silicon epitaxial layers on semiconductor devices. The methods include forming a silicon epitaxial layer on a substrate at increased pressure and reduced temperature. The silicon epitaxial layer has a phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater, and is formed without the addition of carbon. A phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater increases the tensile strain of the deposited layer, and thus, improves channel mobility. Since the epitaxial layer is substantially free of carbon, the epitaxial layer does not suffer from film formation and quality issues commonly associated with carbon-containing epitaxial layers.

摘要翻译： 本发明的实施例一般涉及在半导体器件上形成硅外延层的方法。 所述方法包括在增加的压力和降低的温度下在衬底上形成硅外延层。 硅外延层的磷浓度约为1×1021原子/立方厘米或更大，并且不添加碳形成。 大约1×1021原子/立方厘米或更大的磷浓度增加沉积层的拉伸应变，从而提高通道迁移率。 由于外延层基本上不含碳，外延层不会受到成膜和通常与含碳外延层相关的质量问题的影响。

公开(公告)号：US20080182075A1

公开(公告)日：2008-07-31

申请号：US11957820

申请日：2007-12-17

申请人： Saurabh Chopra ,  Zhiyuan Ye ,  Yihwan Kim

发明人： Saurabh Chopra ,  Zhiyuan Ye ,  Yihwan Kim

IPC分类号： H01L21/8236 ,  H01L21/20 ,  C04B41/50 ,  B32B3/00

CPC分类号： H01L29/7848 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/66628 ,  H01L29/7834 ,  Y10T428/24612

摘要： Methods for formation of epitaxial layers containing n-doped silicon are disclosed. Specific embodiments pertain to the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. In specific embodiments, the formation of the n-doped epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source, a carbon source and an n-dopant source. An epitaxial layer may have considerable tensile stress which may be created in a significant amount by a high concentration of n-dopant. A layer having n-dopant may also have substitutional carbon. Phosphorus as an n-dopant with a high concentration is provided. A substrate having an epitaxial layer with a high level of n-dopant is also disclosed.

摘要翻译： 公开了形成含有n掺杂硅的外延层的方法。 具体实施例涉及半导体器件中的外延层的形成和处理，例如金属氧化物半导体场效应晶体管（MOSFET）器件。 在具体实施方案中，n掺杂外延层的形成包括将处理室中的衬底暴露于包括硅源，碳源和n-掺杂剂源的沉积气体。 外延层可能具有相当大的拉伸应力，这可以通过高浓度的n-掺杂物以显着的量产生。 具有n-掺杂剂的层也可以具有取代的碳。 提供了作为高浓度的n掺杂剂的磷。 还公开了具有高水平的n掺杂剂的外延层的衬底。

公开(公告)号：US20120193623A1

公开(公告)日：2012-08-02

申请号：US13193566

申请日：2011-07-28

申请人： Zhiyuan Ye ,  Xuebin Li ,  Saurabh Chopra ,  Yihwan Kim

发明人： Zhiyuan Ye ,  Xuebin Li ,  Saurabh Chopra ,  Yihwan Kim

IPC分类号： H01L29/04 ,  H01L21/20

CPC分类号： H01L29/36 ,  H01L21/0245 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/02664 ,  H01L21/823814 ,  H01L29/167 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7834

摘要： Embodiments of the present invention generally relate to methods of forming epitaxial layers and devices having epitaxial layers. The methods generally include forming a first epitaxial layer including phosphorus and carbon on a substrate, and then forming a second epitaxial layer including phosphorus and carbon on the first epitaxial layer. The second epitaxial layer has a lower phosphorus concentration than the first epitaxial layer, which allows for selective etching of the second epitaxial layer and undesired amorphous silicon or polysilicon deposited during the depositions. The substrate is then exposed to an etchant to remove the second epitaxial layer and undesired amorphous silicon or polysilicon. The carbon present in the first and second epitaxial layers reduces phosphorus diffusion, which allows for higher phosphorus doping concentrations. The increased phosphorus concentrations reduce the resistivity of the final device. The devices include epitaxial layers having a resistivity of less than about 0.381 milliohm-centimeters.

摘要翻译： 本发明的实施例一般涉及形成外延层的方法和具有外延层的器件。 所述方法通常包括在衬底上形成包括磷和碳的第一外延层，然后在第一外延层上形成包括磷和碳的第二外延层。 第二外延层具有比第一外延层更低的磷浓度，其允许在沉积期间沉积的第二外延层和不期望的非晶硅或多晶硅的选择性蚀刻。 然后将衬底暴露于蚀刻剂以除去第二外延层和不期望的非晶硅或多晶硅。 存在于第一和第二外延层中的碳减少磷扩散，这允许更高的磷掺杂浓度。 增加的磷浓度降低了最终装置的电阻率。 这些器件包括具有小于约0.381毫欧姆厘米的电阻率的外延层。

公开(公告)号：US20120202338A1

公开(公告)日：2012-08-09

申请号：US13193576

申请日：2011-07-28

申请人： Zhiyuan Ye ,  Xuebin Li ,  Saurabh Chopra ,  Yihwan Kim

发明人： Zhiyuan Ye ,  Xuebin Li ,  Saurabh Chopra ,  Yihwan Kim

IPC分类号： H01L21/20

CPC分类号： H01L21/02532 ,  H01L21/0257 ,  H01L21/02576 ,  H01L21/0262 ,  H01L29/1054 ,  H01L29/78

摘要： Embodiments of the present invention generally relate to methods for forming silicon epitaxial layers on semiconductor devices. The methods include forming a silicon epitaxial layer on a substrate at increased pressure and reduced temperature. The silicon epitaxial layer has a phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater, and is formed without the addition of carbon. A phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater increases the tensile strain of the deposited layer, and thus, improves channel mobility. Since the epitaxial layer is substantially free of carbon, the epitaxial layer does not suffer from film formation and quality issues commonly associated with carbon-containing epitaxial layers.

摘要翻译： 本发明的实施例一般涉及在半导体器件上形成硅外延层的方法。 所述方法包括在增加的压力和降低的温度下在衬底上形成硅外延层。 硅外延层的磷浓度约为1×1021原子/立方厘米或更大，并且不添加碳形成。 大约1×1021原子/立方厘米或更大的磷浓度增加沉积层的拉伸应变，从而提高通道迁移率。 由于外延层基本上不含碳，外延层不会受到成膜和通常与含碳外延层相关的质量问题的影响。

公开(公告)号：US20110277934A1

公开(公告)日：2011-11-17

申请号：US13191020

申请日：2011-07-26

申请人： Zhiyuan Ye ,  Saurabh Chopra ,  Yihwan Kim

发明人： Zhiyuan Ye ,  Saurabh Chopra ,  Yihwan Kim

IPC分类号： C23F1/08 ,  C23C16/00

CPC分类号： H01L21/02532 ,  C23C16/325 ,  C23C16/56 ,  C30B25/04 ,  C30B25/14 ,  C30B25/18 ,  C30B33/12 ,  H01L21/02381 ,  H01L21/02538 ,  H01L21/02573 ,  H01L21/0262 ,  H01L21/02642 ,  H01L21/3065 ,  Y10S438/929

摘要： Apparatus for selectively depositing an epitaxial layer are provided herein. In some embodiments, an apparatus for processing a substrate may include a process chamber having a substrate support disposed therein; a deposition gas source coupled to the process chamber; an etching gas source coupled to the process chamber, the etching gas source including a hydrogen and halogen gas source and a germanium gas source; an energy control source to maintain the substrate at a temperature at up to 600 degrees Celsius; and an exhaust system coupled to the process chamber to control the pressure in the process chamber.

摘要翻译： 本文提供了用于选择性沉积外延层的设备。 在一些实施例中，用于处理衬底的设备可以包括其中设置有衬底支撑件的处理室; 耦合到处理室的沉积气体源; 耦合到所述处理室的蚀刻气体源，所述蚀刻气体源包括氢和卤素气体源和锗气体源; 能量控制源，以将基底保持在高达600摄氏度的温度; 以及联接到处理室的排气系统，以控制处理室中的压力。