利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

24 条记录 (耗时 0.017 秒)

    POWER MANAGEMENT INTEGRATED CIRCUIT
    1.
    发明公开
    POWER MANAGEMENT INTEGRATED CIRCUIT 审中-公开

    公开(公告)号：US20230361764A1

    公开(公告)日：2023-11-09

    申请号：US18119995

    申请日：2023-03-10

    申请人： SAMSUNG ELECRONICS CO., LTD.

    发明人： Hyun Seok NAM ,  Jin Gyu KANG ,  Jeong Woon KONG ,  Yong Seong ROH

    IPC分类号： H03K5/133 ,  H03K5/135 ,  H03K5/00

    CPC分类号： H03K5/133 ,  H03K5/135 ,  H03K5/00006 ,  H03K2005/00065

    摘要： A power management integrated circuit including: a clock generator that generates an input clock; a first phase delay controller that delays the input clock by a first phase and outputs a first supply clock to a first switching converter; a second phase delay controller that delays the input clock by a second phase and outputs a second supply clock to a second switching converter; and a third phase delay controller that delays the input clock by a third phase and outputs a third supply clock to a third switching converter, wherein the first phase, the second phase and the third phase have different phases from each other.

    Semiconductor integrated circuit device
    2.
    发明授权
    Semiconductor integrated circuit device 有权
    半导体集成电路器件

    公开(公告)号：US07304387B2

    公开(公告)日：2007-12-04

    申请号：US11429370

    申请日：2006-05-05

    申请人： Dong-ryul Chang ,  Tae-jung Lee ,  Sung-hoan Kim ,  Soo-cheol Lee

    发明人： Dong-ryul Chang ,  Tae-jung Lee ,  Sung-hoan Kim ,  Soo-cheol Lee

    IPC分类号： H01L23/48

    CPC分类号： H01L21/823871 ,  H01L21/823857 ,  H01L21/823878 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Provided are a semiconductor integrated device and a method for fabricating the same. The semiconductor integrated circuit includes a semiconductor substrate including a first dopant, a first conductive layer pattern formed on the semiconductor substrate, an interlayer dielectric layer formed on the first conductive layer pattern, a second conductive layer pattern formed on the interlayer dielectric layer, and a first vacuum ultraviolet (VUV) blocking layer which blocks a VUV ray radiated to the semiconductor substrate.

    摘要翻译： 提供一种半导体集成器件及其制造方法。 半导体集成电路包括：半导体衬底，包括第一掺杂剂，形成在半导体衬底上的第一导电层图案，形成在第一导电层图案上的层间电介质层，形成在层间绝缘层上的第二导电层图案;以及 第一真空紫外线（VUV）阻挡层，其阻挡辐射到半导体衬底的VUV射线。

    Method for forming a metal silicide layer in a semiconductor device
    3.
    发明申请
    Method for forming a metal silicide layer in a semiconductor device 有权

    公开(公告)号：US20060068585A1

    公开(公告)日：2006-03-30

    申请号：US11280425

    申请日：2005-11-16

    申请人： Eung-Joon Lee ,  In-Sun Park ,  Kwan-Jong Roh

    发明人： Eung-Joon Lee ,  In-Sun Park ,  Kwan-Jong Roh

    IPC分类号： H01L21/4763

    CPC分类号： H01L29/6653 ,  H01L21/823418 ,  H01L21/823468 ,  H01L21/823814 ,  H01L21/823835 ,  H01L21/823864 ,  H01L29/665

    摘要： On first and second regions of a substrate are formed a first gate structure including a first gate electrode and a first spacer, and a second gate structure including a second gate electrode and a second spacer, respectively. The first and second spacers are removed to different depths such that side portions of the first and second gate electrodes have different exposed thicknesses. A metal silicide layer is formed on the first and second regions including the first and second gate structures. The metal silicide layer formed on the second gate electrode has a second thickness that is greater than a first thickness of the metal silicide layer formed on the first gate electrode. The spacers in the gate structures of resulting N type and P type MOS transistors are removed to different thicknesses, thereby minimizing deformation in the gate structures and also improving electrical characteristics and thermal stability of the gate electrodes.

    Regulator circuit and power system including the same
    5.
    发明授权
    Regulator circuit and power system including the same 有权

    公开(公告)号：US09904310B2

    公开(公告)日：2018-02-27

    申请号：US15224927

    申请日：2016-08-01

    申请人： Samsung Electronics Co., Ltd.

    发明人： Jeong-Don Ihm ,  Siddharth Katare

    IPC分类号： G05F1/44 ,  G05F3/26

    CPC分类号： G05F3/262

    摘要： A regulator circuit includes a power transistor, a current mirror, a first NMOS transistor, a second NMOS transistor and a current source. The power transistor has a source connected to an external power supply voltage supply, a gate connected to a first node having a first voltage and a drain connected to a second node outputting an internal power supply voltage. A current mirror provides a first current to a third node having a second voltage and provides a first node with a second current. A first NMOS transistor has a drain connected to a first node, a gate receiving a first reference voltage and a source connected to a fourth node. A second NMOS transistor has a drain connected to a third node, a gate connected to a second node and a source connected to the fourth node.

    DIGITAL PHOTOGRAPHING APPARATUS AND METHOD OF CONTROLLING THE SAME
    7.
    发明申请
    DIGITAL PHOTOGRAPHING APPARATUS AND METHOD OF CONTROLLING THE SAME 有权
    数码摄影装置及其控制方法

    公开(公告)号：US20140184888A1

    公开(公告)日：2014-07-03

    申请号：US14105896

    申请日：2013-12-13

    申请人： SAMSUNG ELECRONICS CO., LTD.

    发明人： Jong-hoon Won ,  Yuki Endo ,  Kazuhiko Sugimoto

    IPC分类号： G03B13/36 ,  H04N5/232

    CPC分类号： G03B13/36 ,  H04N5/23212

    摘要： A digital photographing apparatus includes a focus lens, a focus detection unit that detects focus in a contrast auto focusing (AF) method by moving the focus lens, and a controller that calculates a velocity of a subject from a first focus detection result and a second focus detection result in a continuous shooting operation. The controller restricts a U-turn driving for correcting backlash of the focus lens when the calculated velocity of the subject is equal to or greater than a predetermined value. An AF initiating location and a final correction operation are adaptively adjusted based on the velocity of the subject in each process of the continuous shooting, thereby improving an AF performance and the continuous photographing speed.

    摘要翻译： 数字拍摄装置包括：聚焦透镜，通过移动聚焦透镜来检测对比度自动聚焦（AF）方法中的焦点的焦点检测单元;以及从第一焦点检测结果和第二焦点检测结果计算被摄体的速度的控制器 焦点检测结果在连续拍摄操作中。 当计算出的对象的速度等于或大于预定值时，控制器限制用于校正聚焦透镜的间隙的U形转动驱动。 基于连续拍摄的每个处理中的被摄体的速度自适应地调整AF起始位置和最终校正操作，从而改善AF性能和连续拍摄速度。

    Mold structure for light-emitting diode package
    8.
    发明授权
    Mold structure for light-emitting diode package 有权
    发光二极管封装的模具结构

    公开(公告)号：US08692138B2

    公开(公告)日：2014-04-08

    申请号：US13216913

    申请日：2011-08-24

    申请人： Sun Choi ,  Jong-Jin Park

    发明人： Sun Choi ,  Jong-Jin Park

    IPC分类号： H01L23/48

    CPC分类号： H01L33/486 ,  H01L33/62 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2924/00

    摘要： A mold structure for a light-emitting diode (LED) package. The mold structure includes a notch, which is formed at at least an end portion of a package mold, in which a cavity is formed to mount a LED therein. Furthermore, an electrode lead, may be formed at at least an end portion of the package mold and may be closely attached to the package mold, and thus the overall size of a LED package may be reduced.

    摘要翻译： 一种用于发光二极管（LED）封装的模具结构。 模具结构包括形成在封装模具的至少一个端部处的凹口，其中形成腔体以将LED安装在其中。 此外，电极引线可以形成在封装模具的至少一个端部，并且可以紧密地附接到封装模具，因此可以减小LED封装的整体尺寸。

    System and method for channel estimation in a delay diversity wireless communication system
    9.
    发明授权
    System and method for channel estimation in a delay diversity wireless communication system 失效
    用于延迟分集无线通信系统中的信道估计的系统和方法

    公开(公告)号：US07953039B2

    公开(公告)日：2011-05-31

    申请号：US11390125

    申请日：2006-03-27

    申请人： Farooq Khan

    发明人： Farooq Khan

    IPC分类号： H04Q7/00

    CPC分类号： H04L27/2601 ,  H04B7/0671 ,  H04B7/0684 ,  H04B7/12 ,  H04L5/0048 ,  H04L25/022 ,  H04L25/0228 ,  H04L25/03955 ,  H04L27/261 ,  H04L27/2647

    摘要： A method of controlling downlink transmissions to a subscriber station capable of communicating with a base station of an orthogonal frequency division multiplexing (OFDM) network. The method comprises the steps of: receiving a first pilot signal from a first base station antenna; receiving a second pilot signal from a second base station antenna; and estimating the channel between the base station and subscriber station based on the received first and second pilot signals. The method also comprises determining a set of OFDM symbol processing parameters based on the step of estimating the channel and transmitting the OFDM symbol processing parameters to the base station. The base station uses the OFDM symbol processing parameters to control the relative gains and the relative delays of OFDM symbols transmitted from the first and second antennas.

    摘要翻译： 控制能够与正交频分复用（OFDM）网络的基站通信的用户站的下行链路传输的方法。 该方法包括以下步骤：从第一基站天线接收第一导频信号; 从第二基站天线接收第二导频信号; 以及基于所接收的第一和第二导频信号来估计所述基站和所述用户站之间的信道。 该方法还包括基于估计信道并将OFDM符号处理参数发送到基站的步骤来确定一组OFDM符号处理参数。 基站使用OFDM符号处理参数来控制从第一和第二天线发送的OFDM符号的相对增益和相对延迟。