Linearized differential transimpedance amplifier
    2.
    发明授权
    Linearized differential transimpedance amplifier 有权
    线性差分跨阻放大器

    公开(公告)号:US07746172B1

    公开(公告)日:2010-06-29

    申请号:US12396031

    申请日:2009-03-02

    IPC分类号: H03F3/45

    摘要: The present invention relates to a transimpedance amplifier circuit that includes a linearized differential transimpedance amplifier, a detector, and dynamic current source circuitry, which diverts common mode currents from feedback resistors in the linearized differential transimpedance amplifier to keep the linearized differential transimpedance amplifier in a linear operating range. Magnitudes of the diverted common mode currents from the feedback resistors may be based on a detected magnitude associated with differential input signals that feed the linearized differential transimpedance amplifier. The detector provides a detector output signal to the dynamic current source circuitry based on the detected magnitude associated with the differential input signals, such that the diverted common mode currents are based on the detector output signal. The transimpedance amplifier circuit provides differential output signals that are based on amplifying the differential input signals.

    摘要翻译: 本发明涉及一种跨阻抗放大器电路,其包括线性化差分跨阻放大器,检测器和动态电流源电路,其将线性化差分跨阻放大器中的反馈电阻器转移共模电流,以将线性化差分跨阻放大器保持线性 工作范围。 来自反馈电阻器的转向共模电流的幅度可以基于与馈送线性化差分跨阻放大器的差分输入信号相关联的检测到的幅度。 检测器基于与差分输入信号相关联的检测到的幅度向动态电流源电路提供检测器输出信号,使得转向的共模电流基于检测器输出信号。 跨阻放大器电路提供基于放大差分输入信号的差分输出信号。

    Non-feedback implemented control of the output-common mode of a differential amplifier
    3.
    发明授权
    Non-feedback implemented control of the output-common mode of a differential amplifier 有权
    非反馈实现了差分放大器的输出共模控制

    公开(公告)号:US07365600B1

    公开(公告)日:2008-04-29

    申请号:US11142477

    申请日:2005-06-02

    IPC分类号: H03F3/45

    摘要: A differential amplification circuit includes a differential amplifier and common mode control circuitry configured to control output common mode of the differential amplifier. However, this control circuitry does not use feedback. The circuitry controls the output common mode in either, or in a combination of two ways, neither of which employs feedback from the output common mode. One control technique uses a dummy circuit and comparator to cancel out the effect of variations in process, temperature and supply voltage on output common mode. Another control technique measures input common mode voltage, compares the measured common mode to a reference, and based on the difference, applies a current to the output that compensates for the variation in output common mode that a given input common mode would otherwise cause.

    摘要翻译: 差分放大电路包括差分放大器和配置成控制差分放大器的输出共模的共模控制电路。 但是,该控制电路不使用反馈。 电路以两种方式或两种方式的组合来控制输出共模,两者都不使用来自输出共模的反馈。 一种控制技术使用虚拟电路和比较器来消除工艺,温度和电源电压在输出共模上的变化的影响。 另一种控制技术测量输入共模电压,将测量的共模与参考值进行比较,并根据差值,将电流施加到输出,补偿输出共模的变化,给定的输入共模将另外导致。

    Operational amplifier having improved slew rate
    4.
    发明授权
    Operational amplifier having improved slew rate 有权
    运算放大器具有提高的转换速率

    公开(公告)号:US08089314B2

    公开(公告)日:2012-01-03

    申请号:US12764294

    申请日:2010-04-21

    IPC分类号: H03F3/45

    摘要: A slew rate improved operational amplifier circuit is provided to improve the slew rates of an operational amplifier with minimal sacrifices in power dissipation and other operational amplifier parameters. To improve the slew rates of operational amplifiers, additional current sources are activated when a slewing operation is detected. The detection of slewing operations and the activation of current sources upon detection can be implemented using two comparator circuits—one for a positive slewing operation, and one for a negative slewing operation. A sub-45 nm FinFET implementation of this slew rate improvement concept was implemented and compared against slew rate optimized individual two-stage operational amplifiers. Simulations show that slew rates were significantly improved by the implementation of the comparator circuits (5590 V/μs vs. 273 V/μs), with minimal increases in power dissipation (78 μW vs. 46 μW).

    摘要翻译: 提供了一种转换速率改进的运算放大器电路,以便以最小的功耗牺牲和其他运算放大器参数来提高运算放大器的转换速率。 为了提高运算放大器的转换速率,当检测到回转操作时,会激活额外的电流源。 检测到的回转操作和电流源的检测可以使用两个比较器电路实现,一个用于正回转操作,另一个用于负回转操作。 实现了这种转换速率改进概念的45纳米FinFET实现,并将其与转换速率优化的单个两级运算放大器进行比较。 模拟显示,通过实施比较器电路(5590 V /μsvs. 273 V /μs),转换速率得到显着提高,功耗增加最小(78μW至46μW)。

    Operational Amplifier Having Improved Slew Rate
    5.
    发明申请
    Operational Amplifier Having Improved Slew Rate 有权
    具有改善压摆率的运算放大器

    公开(公告)号:US20110215868A1

    公开(公告)日:2011-09-08

    申请号:US12764294

    申请日:2010-04-21

    IPC分类号: H03F3/45

    摘要: A slew rate improved operational amplifier circuit is provided to improve the slew rates of an operational amplifier with minimal sacrifices in power dissipation and other operational amplifier parameters. To improve the slew rates of operational amplifiers, additional current sources are activated when a slewing operation is detected. The detection of slewing operations and the activation of current sources upon detection can be implemented using two comparator circuits—one for a positive slewing operation, and one for a negative slewing operation. A sub-45 nm FinFET implementation of this slew rate improvement concept was implemented and compared against slew rate optimized individual two-stage operational amplifiers. Simulations show that slew rates were significantly improved by the implementation of the comparator circuits (5590 V/μs vs. 273 V/μs), with minimal increases in power dissipation (78 μW vs. 46 μW).

    摘要翻译: 提供了一种转换速率改进的运算放大器电路,以便以最小的功耗牺牲和其他运算放大器参数来提高运算放大器的转换速率。 为了提高运算放大器的转换速率,当检测到回转操作时,会激活额外的电流源。 检测到的回转操作和电流源的检测可以使用两个比较器电路实现,一个用于正回转操作,另一个用于负回转操作。 实现了这种转换速率改进概念的45纳米FinFET实现,并将其与转换速率优化的单个两级运算放大器进行比较。 模拟显示,通过实施比较器电路(5590 V /μsvs. 273 V /μs),转换速率得到显着提高,功耗增加最小(78μW至46μW)。

    Power transistor feedback circuit with noise and offset compensation
    6.
    发明授权
    Power transistor feedback circuit with noise and offset compensation 有权
    功率晶体管反馈电路具有噪声和偏移补偿

    公开(公告)号:US07982542B1

    公开(公告)日:2011-07-19

    申请号:US12714112

    申请日:2010-02-26

    申请人: Thierry Sicard

    发明人: Thierry Sicard

    IPC分类号: H03F1/30

    摘要: A circuit comprises a first amplifier portion and a second amplifier portion. The first amplifier portion includes first and second transistors coupled together in a common-base configuration. A current mirror is coupled to the first and second transistors. A first filter is coupled between a first input and the first and second transistors. The second amplifier portion includes third and fourth transistors coupled together in a common-base configuration. First and second current sources are coupled to the third and fourth transistors. A second filter is coupled between a second input and the control electrodes of the third and fourth transistors, wherein the first and second filters are coupled together.

    摘要翻译: 电路包括第一放大器部分和第二放大器部分。 第一放大器部分包括以公共基础配置耦合在一起的第一和第二晶体管。 电流镜耦合到第一和第二晶体管。 第一滤波器耦合在第一输入和第一和第二晶体管之间。 第二放大器部分包括以公共基础配置耦合在一起的第三和第四晶体管。 第一和第二电流源耦合到第三和第四晶体管。 第二滤波器耦合在第二输入和第三和第四晶体管的控制电极之间,其中第一和第二滤波器耦合在一起。

    High gain transistor amplifier
    7.
    发明授权
    High gain transistor amplifier 失效
    高增益晶体管放大器

    公开(公告)号:US5406222A

    公开(公告)日:1995-04-11

    申请号:US172089

    申请日:1993-12-22

    申请人: A. Paul Brokaw

    发明人: A. Paul Brokaw

    IPC分类号: H03F3/45

    CPC分类号: H03F3/45569 H03F3/4517

    摘要: A high gain transistor amplifier with internal balancing bias having a common mode input range which includes a supply rail includes a differential to single-ended converting input stage including at least one pair of transistors, each transistor having first and second current terminals and a control terminal; input means for providing an input signal to the first current terminals of the transistors; a voltage amplifier stage for providing an amplified output of the input signal, the voltage amplifier stage including at least one transistor having a control terminal; and a biasing circuit responsive to the voltage amplifier stage for maintaining balanced currents between the control terminal of the voltage amplifier stage and the control terminals of the differential to single-ended converting input stage, the biasing circuit being connected to the second current terminals of each transistor pair and the voltage amplifier stage being connected to one of the second current terminals so that the first terminal may be driven in a common mode potential range which includes a supply rail.

    摘要翻译: 具有包括电源轨的共模输入范围的具有内部平衡偏置的高增益晶体管放大器包括至少包括一对晶体管的差分至单端转换输入级,每个晶体管具有第一和第二电流端子以及控制端子 ; 输入装置,用于向晶体管的第一电流端提供输入信号; 用于提供输入信号的放大输出的电压放大器级,所述电压放大器级包括至少一个具有控制端的晶体管; 以及响应于所述电压放大器级的偏置电路,用于维持所述电压放大器级的控制端与所述差分至单端转换输入级的所述控制端之间的平衡电流,所述偏置电路连接到每个的所述第二电流端 晶体管对和电压放大器级连接到第二电流端子之一,使得第一端子可以在包括电源轨的共模电位范围内被驱动。

    Differential amplifier with dynamic biasing
    8.
    发明授权
    Differential amplifier with dynamic biasing 失效
    具有动态偏置的差分放大器

    公开(公告)号:US3848195A

    公开(公告)日:1974-11-12

    申请号:US34058773

    申请日:1973-03-12

    发明人: KIKO F

    摘要: The differential amplifier current folder circuit of the present invention employs dynamic biasing to provide supplemental bias currents to the collector-emitter paths of the differential amplifier transistors in proportion to the magnitude of the input signal. Since the bias current through the main coding path comprising the coding and weighting network is thus determined only by the magnitude of the input signal and not by the magnitude of a bias current predetermined in accordance with expected peak magnitude input signals, the I Delta R voltage drop and leakage currents in the folder circuit are proportional to the magnitude of the input signal. Lower magnitude input signals can thus be coded with a minimum of error using either thin film techniques or components readily available from commercial sources.

    摘要翻译: 本发明的差分放大器电流夹电路采用动态偏置,以与输入信号的幅度成比例地向差分放大器晶体管的集电极 - 发射极路径提供补偿偏置电流。 因为通过包括编码和加权网络的主编码路径的偏置电流因此仅由输入信号的大小确定,而不是根据预期的峰值幅度输入信号预定的偏置电流的大小来确定,所以I DELTA R电压 文件夹电路中的漏电流和输入信号的幅度成正比。 因此,可以使用薄膜技术或从商业来源可以获得的组件,以最小的误差来编码较低幅度的输入信号。