High-voltage stacked transistor circuit
    4.
    发明授权
    High-voltage stacked transistor circuit 有权
    高电压堆叠晶体管电路

    公开(公告)号:US09595950B1

    公开(公告)日:2017-03-14

    申请号:US15169526

    申请日:2016-05-31

    申请人: IXYS Corporation

    发明人: Kyoung Wook Seok

    摘要: A High-Voltage Stacked Transistor Circuit (HVSTC) includes a stack of power transistors coupled in series between a first terminal and a second terminal. The HVSTC also has a control terminal for turning on an off the power transistors of the stack. All of the power transistors of the stack turn on together, and turn off together, so that the overall stack operates like a single transistor having a higher breakdown voltage. Each power transistor, other than the one most directly coupled to the first terminal, has an associated bipolar transistor. In a static on state of the HVSTC, the bipolar transistors are off. The associated power transistors can therefore be turned on. In a static off state of the HVSTC, the bipolar transistors are conductive (in one example, in the reverse active mode) in such a way that they keep their associated power transistors off.

    摘要翻译: 高压堆叠晶体管电路(HVSTC)包括串联耦合在第一端子和第二端子之间的功率晶体管堆叠。 HVSTC还具有用于打开堆叠的功率晶体管的控制端子。 堆叠的所有功率晶体管一起导通,并一起关闭,使得整个堆叠工作像具有较高击穿电压的单个晶体管。 除了最直接耦合到第一端子的功率晶体管之外,每个功率晶体管具有相关联的双极晶体管。 在HVSTC的静态导通状态下,双极晶体管截止。 因此,相关联的功率晶体管可以被接通。 在HVSTC的静态关断状态下,双极晶体管是导通的(在一个示例中,处于反向有效模式),使得它们保持关联的功率晶体管。

    Semiconductor device
    5.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号:US09577627B2

    公开(公告)日:2017-02-21

    申请号:US14844861

    申请日:2015-09-03

    发明人: Akiko Goto

    摘要: First and second external terminals are connected to high-voltage and low-voltage terminals, respectively, of a direct-current voltage source circuit in which first and second direct-current voltage sources are connected in series. A third external terminal is connected to a connecting point between the first and second direct-current voltage sources. A first switching element is connected between the first and fourth external terminals. A second switching element is connected between the fourth and second external terminals. A first AC switch unit includes third and fourth switching elements connected in inverse series between the third and fourth external terminals. A second AC switch unit includes fifth and sixth switching elements connected in inverse series between the third and fourth external terminals. The first and second AC switch units are connected in parallel. The first and second switching elements and the first and second AC switch units are incorporated in one module.

    摘要翻译: 第一和第二外部端子分别连接到其中第一和第二直流电压源串联连接的直流电压源电路的高压和低压端子。 第三外部端子连接到第一和第二直流电压源之间的连接点。 第一开关元件连接在第一和第四外部端子之间。 第二开关元件连接在第四和第二外部端子之间。 第一交流开关单元包括在第三和第四外部端子之间反向串联连接的第三和第四开关元件。 第二交流开关单元包括在第三和第四外部端子之间反向串联连接的第五和第六开关元件。 第一和第二交流开关单元并联连接。 第一和第二开关元件以及第一和第二AC开关单元被结合在一个模块中。

    SEMICONDUCTOR SWITCH CIRCUIT
    7.
    发明申请
    SEMICONDUCTOR SWITCH CIRCUIT 有权
    半导体开关电路

    公开(公告)号:US20160197604A1

    公开(公告)日:2016-07-07

    申请号:US14785783

    申请日:2014-03-26

    IPC分类号: H03K17/567 H03K17/687

    摘要: A semiconductor switch circuit includes a plurality of switching units connected in series between a high-voltage node and a low-voltage node, and a plurality of diodes provided in association with the plurality of switching units, respectively. Respective cathodes of the plurality of diodes are connected to the plurality of switching units, respectively, and the anode of the diode associated with the switching unit connected to the low-voltage node receives a predetermined power supply voltage. Each switching unit includes a semiconductor switching device, a gate drive circuit driving the semiconductor switching device, and a DC-DC converter receiving a DC voltage from a cathode of the associated diode and supplying drive power to the gate drive circuit.

    摘要翻译: 半导体开关电路包括串联连接在高压节点和低压节点之间的多个开关单元,以及分别与多个开关单元相关联地设置的多个二极管。 多个二极管的各个阴极分别连接到多个开关单元,并且与连接到低压节点的开关单元相关联的二极管的阳极接收预定的电源电压。 每个开关单元包括半导体开关器件,驱动半导体开关器件的栅极驱动电路和从相关联的二极管的阴极接收DC电压并向栅极驱动电路提供驱动电力的DC-DC转换器。

    System and Method for a Switch Having a Normally-on Transistor and a Normally-off Transistor
    8.
    发明申请
    System and Method for a Switch Having a Normally-on Transistor and a Normally-off Transistor 有权
    具有常开晶体管和常关断晶体管的开关的系统和方法

    公开(公告)号:US20160065064A1

    公开(公告)日:2016-03-03

    申请号:US14473207

    申请日:2014-08-29

    发明人: Bernhard Zojer

    IPC分类号: H02M3/158

    摘要: In accordance with an embodiment, a circuit includes a first driver having a first output configured to be coupled to a control node of a normally-off transistor. The first driver is configured to drive a first switching signal at the first output in a cascode mode and configured to drive a first constant voltage at the first output in a direct drive mode. The circuit further includes a second driver having a second output configured to be coupled to a control node of a normally-on transistor that has a second load path terminal coupled to a first load path terminal of the normally-off transistor. The second driver is configured to drive a second switching signal at the second output in the direct drive mode.

    摘要翻译: 根据实施例,电路包括具有被配置为耦合到常关晶体管的控制节点的第一输出的第一驱动器。 第一驱动器被配置为以串联模式驱动第一输出处的第一开关信号,并且被配置为以直接驱动模式在第一输出处驱动第一恒定电压。 电路还包括具有第二输出的第二驱动器,第二输出被配置为耦合到常开晶体管的控制节点,该正常晶体管具有耦合到常关晶体管的第一负载路径端子的第二负载路径端子。 第二驱动器被配置为在直接驱动模式下在第二输出处驱动第二切换信号。

    Cascode switching circuit
    9.
    发明授权
    Cascode switching circuit 有权
    串联开关电路

    公开(公告)号:US09083343B1

    公开(公告)日:2015-07-14

    申请号:US14525863

    申请日:2014-10-28

    IPC分类号: H03K17/56 H03K17/687

    摘要: Disclosed herein are cascode switching circuits that include a normally-on semiconductor device, a normally-off semiconductor device, and a gate driver. The normally-on semiconductor device and said normally-off semiconductor device each has a gate terminal, a drain terminal and a source terminal. The gate driver has a first output and a second output, the first output of said gate driver is coupled to said gate terminal of said normally-on semiconductor device, the second output of said gate driver is coupled to said gate terminal of said normally-off semiconductor device, and the drain terminal of said normally-off semiconductor device is coupled to said source terminal of said normally-on semiconductor device so that a current path is formed through said normally-on semiconductor device and said normally-off semiconductor device. Methods of making and using such circuits, and other various aspects of such circuits are also disclosed.

    摘要翻译: 这里公开了包括常闭半导体器件,常关半导体器件和栅极驱动器的共源共栅开关电路。 常闭半导体器件和所述常关半导体器件均具有栅极端子,漏极端子和源极端子。 栅极驱动器具有第一输出和第二输出,所述栅极驱动器的第一输出耦合到所述常开半导体器件的所述栅极端子,所述栅极驱动器的第二输出端耦合到所述正常导通的所述栅极端子, 并且所述常关半导体器件的漏极端子耦合到所述常开半导体器件的所述源极端子,使得通过所述常开半导体器件和所述常闭半导体器件形成电流路径。 还公开了制造和使用这种电路的方法以及这些电路的其它各个方面。

    Variable speed drive
    10.
    发明授权
    Variable speed drive 有权
    变速驱动

    公开(公告)号:US09024559B2

    公开(公告)日:2015-05-05

    申请号:US13640322

    申请日:2010-05-04

    摘要: A converter module for a variable speed drive having a semiconductor device for precharge is described. The precharge circuit includes switching modules, one switching module with a first semiconductor switch connected in parallel or series with a second semiconductor switch. The second semiconductor switch is switched on and off during the precharge operation in order to limit the inrush current into the DC Link. After the precharge operation, the second semiconductor switch is turned on all the time and acts like a diode. The second semiconductor device may have a lower maximum current rating than the main semi-conductor devices. The lower current rated semiconductor device experience the same short circuit current as the higher current rated semiconductor device. The lower current rated semiconductor device can be supplied with a larger gate to emitter voltage than the higher current rated semiconductor device to equalize current between semiconductor devices.

    摘要翻译: 描述了一种用于具有用于预充电的半导体器件的变速驱动器的转换器模块。 预充电电路包括开关模块,一个开关模块,其具有与第二半导体开关并联或串联连接的第一半导体开关。 在预充电操作期间,第二半导体开关被接通和关断,以限制进入DC Link的浪涌电流。 在预充电操作之后,第二半导体开关始终导通,并且起二极管的作用。 第二半导体器件可以具有比主半导体器件更低的最大电流额定值。 较低电流额定值的半导体器件具有与较高电流额定值的半导体器件相同的短路电流。 较低额定电流的半导体器件可以提供比较高电流额定半导体器件更大的栅极至发射极电压,以均衡半导体器件之间的电流。