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1.
公开(公告)号:US20180309396A1
公开(公告)日:2018-10-25
申请号:US15495879
申请日:2017-04-24
申请人: IXYS Corporation
IPC分类号: H02P6/15 , H02K11/215
CPC分类号: H02P6/153 , H02K1/2786 , H02K11/215 , H02K11/33 , H02K29/08 , H02K2211/03
摘要: A microcontroller controls a BLDC motor with Hall sensors. In a calibration mode, the microcontroller operates the motor at substantially constant load and speed. A first current value across the motor is detected. A reference phase angle value is adjusted and a second current value is detected. If the second current value is less than the first current value, then the reference phase angle value is adjusted and a next current value is detected. The adjusting and detecting is repeated until the next current value is greater than the previous current value indicating that the adjustment increased current across the motor. The adjusted reference phase angle value before increased motor current is stored. In a normal operating mode, using the adjusted reference phase angle value results in desired motor operation where minimal current is consumed for a given load and speed despite asymmetries in motor windings and Hall sensor placement.
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公开(公告)号:US10069485B2
公开(公告)日:2018-09-04
申请号:US15423421
申请日:2017-02-02
申请人: IXYS Corporation
IPC分类号: H03K3/012 , H03K19/0185
CPC分类号: H03K19/018507 , H03K17/687 , H03K2217/0063
摘要: A gate driver integrated circuit drives an output signal onto its output terminal and onto the gate of a power transistor. In a turn-on episode, a digital input signal transitions to a digital logic high level. In response, the gate driver integrated circuit couples the output terminal to a positive supply voltage terminal, thereby driving a positive voltage onto the gate of the power transistor. In response to a high-to-low transition of the digital input signal, the driver drives a negative voltage onto the output terminal and power transistor gate for a short self-timed period of time, and then couples the output terminal to a ground terminal, thereby driving the output terminal and power transistor gate up to ground potential. The output terminal and power transistor gate are then held at ground potential in anticipation of the next turn-on episode of the power transistor.
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3.
公开(公告)号:US20180160489A1
公开(公告)日:2018-06-07
申请号:US15890059
申请日:2018-02-06
申请人: IXYS Corporation
IPC分类号: H05B33/08
CPC分类号: H05B33/0809 , H05B33/0824
摘要: A system for driving a multi-stage LED with low distortion and with current proportional to rectified input voltage is disclosed. In an exemplary embodiment, an apparatus includes LED groups connected in series to form an LED string having a first node, a last node, and intermediate nodes. The apparatus also includes current cells having inputs coupled to the nodes and outputs coupled to an output resistor. Each current cell selectively regulates current to flow between its respective input and the output resistor. The apparatus also includes a feedback circuit that generates a plurality of feedback voltages from a voltage level at the output resistor. When a selected current cell is enabled by a selected feedback voltage to regulate a selected current level from its respective input to the output resistor, upstream current cells are disabled by their respective feedback voltages.
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公开(公告)号:US09923324B2
公开(公告)日:2018-03-20
申请号:US14611193
申请日:2015-01-31
申请人: IXYS Corporation
发明人: Kyoung Wook Seok
IPC分类号: H02M7/00 , H02M7/217 , H02M7/04 , H02M1/00 , H01R31/06 , H02M1/12 , H02M1/44 , H02M7/219 , H01R13/66
CPC分类号: H01R31/065 , H01R13/6675 , H02M1/126 , H02M1/44 , H02M7/219 , H02M2007/2195 , Y02B70/1408
摘要: An AC Line Filter/Rectifier Module (ACLF/RM) has a metal housing and an outward appearance of a conventional AC line filter, but the ACLF/RM includes circuitry that performs both EMI filtering and line filtering as well as very efficient AC-to-DC rectification. Rectification circuitry within the ACLF/RM rectifies an AC voltage signal received onto AC input module terminals and outputs a rectified version of the AC voltage signal onto DC output module terminals. The rectification circuitry includes at least one low forward voltage rectifier, where the low forward voltage rectifier includes a bipolar transistor and a diode. Inductive components perform both EMI filtering and line filtering as well as current splitting required to drive the bipolar transistors of the low forward voltage rectifiers. Due to the use of the low forward voltage rectifiers, the AC-to-DC conversion is more efficient than would be case were a conventional diode bridge rectifier employed.
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公开(公告)号:US20170316992A1
公开(公告)日:2017-11-02
申请号:US15143575
申请日:2016-04-30
申请人: IXYS Corporation
发明人: Thomas Spann
IPC分类号: H01L23/049 , H01L23/367 , H01L23/32 , H01L23/492 , H01L23/08
CPC分类号: H01L23/049 , H01L23/04 , H01L23/08 , H01L23/32 , H01L23/3672 , H01L23/492 , H01L24/29 , H01L24/32 , H01L2224/291 , H01L2224/32245 , H01L2924/1301 , H01L2924/13055 , H01L2924/13091 , H01L2924/014 , H01L2924/00014
摘要: A power semiconductor device module includes a metal baseplate and a plastic housing that together form a tray. Power electronics are disposed in the tray. A plastic cap covers the tray. Electrical press-fit terminals are disposed along the periphery of the tray. Each electrical terminal has a press-fit pin portion that sticks up through a hole in the cap. In addition, the module includes four mechanical corner press-fit anchors disposed outside the tray. One end of each anchor is embedded into the housing. The other end is an upwardly extending press-fit pin portion. The module is manufactured and sold with the press-fit pin portions of the electrical terminals and the mechanical corner anchors unattached to any printed circuit board (PCB). The mechanical anchors help to secure the module to a printed circuit board. Due to the anchors, screws or bolts are not needed to hold the module to the PCB.
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公开(公告)号:US09780648B2
公开(公告)日:2017-10-03
申请号:US14474132
申请日:2014-08-30
申请人: IXYS Corporation
CPC分类号: H02M3/156 , H02M2001/0009
摘要: A sense resistor is placed in series with an output capacitor of a buck converter. The buck converter operates in a discontinuous mode such that there is a dead time in each switching cycle. A control circuit senses a voltage across the sense resistor and thereby generates a first signal ICS. The control circuit detects an offset voltage in ICS, where the offset voltage is the voltage of ICS during the dead time in a first switching cycle. The control circuit level shifts the entire ICS by the offset voltage, thereby generating a second signal ICLS. ICLS has the same waveform as the waveform of the inductor current. In a second cycle, ICLS is used to determine when to turn off the main switch and when the start of the dead time occurs. ICLS and the offset voltage are used together to determine when to turn the main switch on.
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公开(公告)号:US20170207720A1
公开(公告)日:2017-07-20
申请号:US15475083
申请日:2017-03-30
申请人: IXYS Corporation
发明人: Kyoung Wook Seok
CPC分类号: H02M7/219 , H01L21/02381 , H01L21/02532 , H01L21/2254 , H01L29/66242 , H02M1/126 , H02M1/44 , H02M2007/2195 , H03H7/0115
摘要: An AC line filter module includes AC-to-DC rectification circuitry. The rectification circuitry includes four low forward voltage rectifiers coupled together as two high-side rectifiers and two low-side rectifiers, where each low forward voltage rectifier includes an NPN bipolar transistor and a parallel-connected diode. A current splitting pair of inductors splits a return current so that a portion of the current is supplied to the collector of an NPN bipolar transistor that is on, and so that the remainder of the current is supplied to the base of the transistor that is on. Both low-side rectifiers are driven by these current splitting inductors. A pair of base current return diodes provides base current return paths. Due to the use of NPN bipolar transistors and no PNP bipolar transistors, manufacturing cost is reduced and efficiency is improved as compared to an implementation that uses low forward voltage rectifiers having PNP transistors.
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公开(公告)号:US09705417B2
公开(公告)日:2017-07-11
申请号:US14955037
申请日:2015-11-30
申请人: IXYS Corporation
CPC分类号: H02M7/219 , H02M2007/2195 , Y02B70/1408
摘要: A rectifier includes a larger Field Effect Transistor (FET1) and a smaller FET (FET2). A sense resistor is in series with FET2's body diode between a cathode terminal and an anode terminal. If the cathode terminal voltage is greater than the voltage on the anode terminal, then body diodes of FETs are reverse biased, the FETs are controlled to be off, and there is no current flow through the rectifier. If, however, the voltage on the anode terminal becomes positive with respect to the cathode terminal, then the body diode of FET2 starts to conduct and there is a voltage drop across the sense resistor. A comparator detects this condition and turns both FETs on. The rectifier is then conductive, so current can flow from the anode terminal, through the larger FET1, and to the cathode terminal, with a small forward voltage drop and without passing across the sense resistor.
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公开(公告)号:US20170194301A1
公开(公告)日:2017-07-06
申请号:US15465561
申请日:2017-03-21
申请人: IXYS Corporation
IPC分类号: H01L25/11 , H01L23/12 , H01L23/367 , H01L29/739 , H01L23/492 , H01L23/50 , H01L23/00 , H01L25/07 , H01L23/043 , H01L23/373
CPC分类号: H01L25/115 , H01L23/043 , H01L23/12 , H01L23/367 , H01L23/3675 , H01L23/3736 , H01L23/492 , H01L23/50 , H01L24/72 , H01L25/072 , H01L29/7393 , H01L2224/06181 , H01L2224/18 , H01L2224/73267 , H01L2924/0002 , H01L2924/13055 , H01L2924/00
摘要: A press pack module includes a collector module terminal, an emitter module terminal, a gate module terminal, and an auxiliary module terminal. Each IGBT cassette within the module includes a set of shims, two contact pins, and an IGBT die. The first contact pin provides part of a first electrical connection between the gate module terminal and the IGBT gate pad. The second contact pin provides part of a second electrical connection between the auxiliary module terminal and a shim that in turn contacts the IGBT emitter pad. The electrical connection between the auxiliary emitter terminal and each emitter pad of the many IGBTs is a balanced impedance network. The balanced network is not part of the high current path through the module. By supplying a gate drive signal between the gate and auxiliary emitter terminals, simultaneous IGBT turn off in high speed and high current switching conditions is facilitated.
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公开(公告)号:US20170178947A1
公开(公告)日:2017-06-22
申请号:US15452592
申请日:2017-03-07
申请人: IXYS Corporation
发明人: Elmar Wisotzki , Christoph Koerber
IPC分类号: H01L21/761 , H01L21/762 , H01L21/78 , H01L29/08 , H01L29/745 , H01L29/06 , H01L21/763 , H01L21/223
CPC分类号: H01L21/761 , H01L21/223 , H01L21/76 , H01L21/762 , H01L21/76224 , H01L21/76229 , H01L21/76237 , H01L21/763 , H01L21/768 , H01L21/78 , H01L24/05 , H01L29/0619 , H01L29/0638 , H01L29/0646 , H01L29/0834 , H01L29/407 , H01L29/7395 , H01L29/74 , H01L29/745 , H01L2224/056 , H01L2924/1301 , H01L2924/00014
摘要: A manufacturable and economically viable edge termination structure allows a semiconductor device to withstand a very high reverse blocking voltage (for example, 8500 volts) without suffering breakdown. A P type peripheral aluminum diffusion region extends around the bottom periphery of a thick die. The peripheral aluminum diffusion region extends upward from the bottom surface of the die, extending into N− type bulk silicon. A deep peripheral trench extends around the upper periphery of the die. The deep trench extends from the topside of the die down toward the peripheral aluminum diffusion region. A P type sidewall doped region extends laterally inward from the inner sidewall of the trench, and extends laterally outward from the outer sidewall of the trench. The P type sidewall doped region joins with the P type peripheral aluminum diffusion region, thereby forming a separation edge diffusion structure that surrounds the active area of the die.
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