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1.发明授权公开(公告)号：US09077369B1
公开(公告)日：2015-07-07
申请号：US14159635
申请日：2014-01-21
申请人： MIXSEMI LIMITED
发明人： Robin M. Tsang
摘要： A data converter is disclosed. The data converter includes a loop-filter, a quantizer, an analog dynamic element matching (DEM) shuffler, a digital DEM shuffler and a feedback digital-to-analog converter. The loop-filter receives analog signals from an analog input. The quantizer then converts the filtered analog signals from the loop-filter to digital signals at a digital output. The analog DEM shuffler shuffles a set of analog threshold levels of the quantizer to yield a set of partially shuffled digital data at an output of the quantizer. The digital DEM shuffler shuffles the set of partially shuffled digital data from the output of the quantizer to yield a set of shuffled digital data. The feedback digital-to-analog converter converts the set of shuffled digital data to a set of analog data to be fed back to the loop-filter.
摘要翻译： 公开了一种数据转换器。 数据转换器包括环路滤波器，量化器，模拟动态元件匹配（DEM）洗牌器，数字DEM洗牌器和反馈数模转换器。 环路滤波器从模拟输入接收模拟信号。 量化器然后将滤波的模拟信号从环路滤波器转换为数字输出的数字信号。 模拟DEM洗牌机洗牌一组量化器的模拟阈值电平，以在量化器的输出端产生一组部分混洗的数字数据。 数字DEM洗牌机将来自量化器的输出的一组部分洗牌的数字数据洗牌，以产生一组洗牌的数字数据。 反馈数模转换器将该混洗数字数据转换为一组模拟数据，以反馈到环路滤波器。
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2.发明申请Computer program product for mismatched shaping of an oversampled converter 失效用于过采样转换器不匹配整形的计算机程序产品公开(公告)号：US20040252042A1
公开(公告)日：2004-12-16
申请号：US10893994
申请日：2004-07-20
发明人： Todd L. Brooks , David S.P. Ho , Kevin L. Miller , Eric Fogleman
IPC分类号： H03M001/66
摘要： Methods and apparatuses for spectrally shaping mismatch errors in a multi-bit digital to analog converter (DAC). In an embodiment, the multi-bit DAC is constructed from K separate multi-element sub-DACs, where K and the number of elements in each sub-DAC are each preferably greater than two. A received digital input code is split into a set of K sub-codes corresponding to the digital input code. The set of K sub-codes can have one of at least N different sub-code orders that specify an order of each of the K sub-codes with respect to one another, where N>2. A sum of the K sub-codes equals the digital input code. One of the at least N different sub-code orders is selected using a shuffling algorithm. Then, each sub-code in the set of K sub-codes is output in accordance with the selected sub-code order.
摘要翻译： 用于在多位数模转换器（DAC）中频谱整形失配误差的方法和装置。 在一个实施例中，多位DAC由K个分离的多元件子DAC构成，其中K和每个子DAC中的元件数量优选大于2。 接收的数字输入码被分割成与数字输入码相对应的一组K个子码。 所述K个子代码集合可以具有至少N个不同的子代码顺序中的一个，其指定相对于彼此的K个子代码中的每一个的顺序，其中N≥2。 K个子码的总和等于数字输入码。 使用混洗算法来选择至少N个不同的子代码顺序之一。 然后，根据所选择的子代码顺序输出K个子代码集合中的每个子代码。
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公开(公告)号：US09413385B2
公开(公告)日：2016-08-09
申请号：US14565172
申请日：2014-12-09
申请人： Broadcom Corporation
发明人： Jan Mulder
摘要： A decoder for a current-steering digital-to-analog converter (DAC) is described herein. In an embodiment, the decoder is a dynamic element matching (DEM) row/column decoder that randomizes pairs of row control signals and column control signals that are provided to a matrix of current cells. The randomization is performed in a manner that ensures that the pairs of row control signals are randomized as pairs. In another embodiment, the decoder is an N-dimensional decoder, where N is any integer greater than two. The N-dimensional decoder comprises an N number of decoders that are each configured to provide respective control signals that are provided to current source(s) in current cell(s) in a respective dimension of an N-dimensional matrix of current cells for enabling current source(s) included therein. Such decoders advantageously allow for a simpler, more efficient design compared to a non-segmented, unary DAC due to the smaller area and lower power consumed.
摘要翻译： 本文描述了用于电流转向数模转换器（DAC）的解码器。 在一个实施例中，解码器是动态元素匹配（DEM）行/列解码器，其将提供给当前单元的矩阵的行控制信号和列控制信号的对随机化。 随机化以确保行对控制信号对成对地随机化的方式执行。 在另一个实施例中，解码器是N维解码器，其中N是大于2的任何整数。 N维解码器包括N个解码器，每个解码器被配置为提供在当前小区的N维矩阵的相应维度中提供给当前小区中的当前小区的各个控制信号，以使能 其中包括电流源。 与非分段一元DAC相比，这样的解码器有利地允许更简单，更有效的设计，因为较小的面积和更低的功耗。
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4.发明授权Multiple output dynamic element matching algorithm with mismatch noise shaping for digital to analog converters 有权多输出动态元件匹配算法，用于数模转换器的失配噪声整形公开(公告)号：US08643525B1
公开(公告)日：2014-02-04
申请号：US13733301
申请日：2013-01-03
申请人： Avnera Corporation
发明人： Jianping Wen , Amit Kumar , Garry N. Link , Wai Laing Lee
IPC分类号： H03M1/66
摘要： A system and method dynamically selects digital-to-analog (DAC) circuit elements to provide a True differential-output delta-sigma (ΔΣ) DAC. The sign and magnitude of a received N-bit input code is determined. If the input code comprises a positive value, m+r circuit elements are selected from a plurality of circuit elements by a positive element selector, in which comprises a number of rotational elements, and r circuit elements are selected by a negative element selector. Each selected circuit element comprises a circuit element that was not selected for an immediately preceding received input code and has a corresponding minimum usage count value. If the input digital code comprises a negative value, m+r circuit elements are selected by the negative element selector, and r circuit elements are selected by the positive element selector. The circuit elements are capable of being configured as positive or negative circuit elements.
摘要翻译： 一种系统和方法动态地选择数模（DAC）电路元件，以提供真差分输出Δ-Σ（DeltaSigma）DAC。 确定接收到的N位输入代码的符号和大小。 如果输入代码包括正值，则通过正元件选择器从多个电路元件中选择m + r个电路元件，其中包括多个旋转元件，并且r个电路元件由负元件选择器选择。 每个所选择的电路元件包括未被选择用于紧接在前的接收输入代码并且具有对应的最小使用计数值的电路元件。 如果输入数字代码包含负值，则由负选择器选择m + r个电路元件，并且通过正元件选择器选择r个电路元件。 电路元件能够被配置为正或负电路元件。
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5.发明授权System and method for tri-level logic data shuffling for oversampling data conversion 有权用于过采样数据转换的三级逻辑数据混洗的系统和方法公开(公告)号：US07079063B1
公开(公告)日：2006-07-18
申请号：US11108443
申请日：2005-04-18
IPC分类号： H03M1/66
CPC分类号： H03M1/067 , H03M1/0682 , H03M1/747 , H03M3/502
摘要： A system is disclosed for processing digital signals in a data converter. The system includes a thermometer encoder for receiving signed binary data and for providing signed thermometer data. The signed thermometer data includes positive thermometer data and negative thermometer data. The system also includes a shuffler that receives positive input data responsive to the positive thermometer data and receives negative input data responsive to the negative thermometer data. The system also includes a decoder for receiving output data from the shuffler and providing decoded data to an analog output stage.
摘要翻译： 公开了一种用于处理数据转换器中的数字信号的系统。 该系统包括温度计编码器，用于接收带符号的二进制数据并提供带符号的温度计数据。 签名的温度计数据包括正温度计数据和负温度计数据。 该系统还包括一个洗牌机，其响应于正温度计数据接收正输入数据，并响应于负温度计数据接收负输入数据。 该系统还包括一个解码器，用于从洗牌器接收输出数据并将解码数据提供给模拟输出级。
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6.发明授权Oversampled digital-to-analog converter based on nonlinear separation and linear recombination 失效基于非线性分离和线性重组的过采样数模转换器
公开(公告)号：US5982317A
公开(公告)日：1999-11-09
申请号：US61671
申请日：1998-04-16
摘要： A error-shaping digital-to-analog (D/A) converter system [100], consisting of a separator [102], a set of D/A converters [104] [108], a set of optional analog filters [106] [108], a summation device [112], and an optional analog filter [114]. The separator [102] separates the digital input signal into a set of low-resolution signals of which only one has significant power in the system's signal band. These signals are D/A converted by mismatch-shaping D/A converters [104] [108], in some embodiments filtered by analog filters [106] [108], and then added by the summing device [112]. Imperfections of the employed D/A converters [104] [108] will only cause very small errors in the signal band, such errors being essentially uncorrelated to the digital input signal. The D/A converter system is comparable to a scaled-element D/A converter in which the distortion is transformed into a noise component having very little power in the signal band.
摘要翻译： 由分离器[102]，一组D / A转换器[104] [108]，一组可选的模拟滤波器[106]组成的数模转换器（D / A）转换器系统[100] [108]，求和装置[112]和可选的模拟滤波器[114]。 分离器[102]将数字输入信号分离成一组低分辨率信号，其中仅一个信号在系统的信号频带中具有有效功率。 这些信号是由失配整形D / A转换器[104] [108]转换的D / A，在一些实施例中，由模拟滤波器[106] [108]滤波，然后由求和装置[112]相加。 使用的D / A转换器[104] [108]的缺陷将仅在信号频带中引起非常小的误差，这种误差基本上与数字输入信号不相关。 D / A转换器系统与其中将失真转换成在信号频带中具有非常小的功率的噪声分量的缩放元件D / A转换器相当。
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公开(公告)号：US3028590A
公开(公告)日：1962-04-03
申请号：US81136459
申请日：1959-05-06
申请人： GEN DYNAMICS CORP
发明人： SHALLOWAY ARTHUR M
IPC分类号： H03M1/00
CPC分类号： H03M1/067
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公开(公告)号：US09407281B1
公开(公告)日：2016-08-02
申请号：US14717763
申请日：2015-05-20
申请人： MIXSEMI LIMITED
发明人： Robin M. Tsang
摘要： A data converter is disclosed. The data converter includes a loop-filter, a quantizer, an analog dynamic element matching (DEM) shuffler, a digital DEM shuffler and a feedback digital-to-analog converter. The loop-filter receives analog signals from an analog input. The quantizer then converts the filtered analog signals from the loop-filter to digital signals at a digital output. The analog DEM shuffler shuffles a set of analog threshold levels of the quantizer to yield a set of partially shuffled digital data at an output of the quantizer. The digital DEM shuffler shuffles the set of partially shuffled digital data from the output of the quantizer to yield a set of shuffled digital data. The feedback digital-to-analog converter converts the set of shuffled digital data to a set of analog data to be fed back to the loop-filter.
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9.发明授权Method and apparatus for encoding digital data into an oversampling digital to analog converter 有权将数字数据编码为过采样数模转换器的方法和装置公开(公告)号：US09331710B1
公开(公告)日：2016-05-03
申请号：US14751131
申请日：2015-06-26
发明人： Peter Holzmann , Yao-Ching Liu
CPC分类号： H03M1/661 , H03M1/00 , H03M1/0631 , H03M1/067 , H03M1/0673 , H03M1/12 , H03M1/687 , H03M1/747
摘要： A method for an oversampling digital-to-analog converter (DAC) includes oversampling M-bit binary data to provide N-bit oversampled binary data, wherein M and N are integers and N is greater than M, encoding the N-bit oversampled binary data to provide 2(N-1)-bit thermometer code data and a sign bit, shuffling the 2(N-1)-bit thermometer code data to provide 2(N-1)-bit shuffled data, converting the 2(N-1)-bit shuffled data and the sign bit to an analog output signal, and smoothing the analog signal to provide a smoothed analog output signal.
摘要翻译： 用于过采样数模转换器（DAC）的方法包括过采样M位二进制数据以提供N位过采样二进制数据，其中M和N是整数，N大于M，对N位过采样二进制 数据提供2（N-1）位温度计代码数据和符号位，混合2（N-1）位温度计代码数据，提供2（N-1）位混洗数据，转换2 -1）位混洗数据和符号位到模拟输出信号，并平滑模拟信号以提供平滑的模拟输出信号。
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公开(公告)号：US08587462B1
公开(公告)日：2013-11-19
申请号：US13663485
申请日：2012-10-30
发明人： Hsueh-Chen Cheng , Wen-Hong Hsu , Po-Hua Chen , Yu-Yee Liow
IPC分类号： H03M1/66
摘要： A digital-to-analog converter includes a clock driver, a first decoder, a second decoder, a current source matrix, a pseudo random mode generator and at least one multiplexer. The first decoder and the second decoder are coupled to the clock driver. The current source matrix is coupled to the first decoder, and the pseudo random mode generator is used to randomly output a set of selecting signals. Each multiplexer of the at least one multiplexer includes a plurality of input ends coupled to a plurality of output ends of the second decoder, an output end coupled to the current source matrix, and a select end coupled to the pseudo random mode generator for controlling the output end to output a bit signal inputted from the input ends of the multiplexer according to one selecting signal of the set of selecting signals.
摘要翻译： 数模转换器包括时钟驱动器，第一解码器，第二解码器，电流源矩阵，伪随机模式发生器和至少一个复用器。 第一解码器和第二解码器耦合到时钟驱动器。 电流源矩阵耦合到第一解码器，并且伪随机模式发生器用于随机输出一组选择信号。 所述至少一个多路复用器的每个多路复用器包括耦合到第二解码器的多个输出端的多个输入端，耦合到电流源矩阵的输出端，以及耦合到伪随机模式发生器的选择端，用于控制 输出端，根据该组选择信号的一个选择信号，输出从复用器的输入端输入的位信号。
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