公开(公告)号：US20240132700A1

公开(公告)日：2024-04-25

申请号：US18516329

申请日：2023-11-21

申请人： UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)

发明人： Bong Soo KIM ,  Myeong Jae LEE

IPC分类号： C08K5/28 ,  H10K10/46 ,  H10K71/00

CPC分类号： C08K5/28 ,  H10K10/464 ,  H10K71/00

摘要： The inventive concept relates to a three-dimensional crosslinker composition and a method of manufacturing an electronic device using the same. According to the inventive concept, the three-dimensional crosslinker composition may be represented by Formula 1 below.

公开(公告)号：US11778893B2

公开(公告)日：2023-10-03

申请号：US17285445

申请日：2019-10-10

申请人： Clap Co., Ltd. ,  King Abdullah University of Science & Technology

发明人： Daniel Kaelblein ,  Pascal Hayoz ,  Hu Chen ,  Iain McCulloch

IPC分类号： H10K85/10 ,  C07D495/22 ,  C08G61/12 ,  H10K10/46

CPC分类号： H10K85/113 ,  C07D495/22 ,  C08G61/126 ,  H10K85/151 ,  C08G2261/124 ,  C08G2261/1412 ,  C08G2261/18 ,  C08G2261/228 ,  C08G2261/3243 ,  C08G2261/3246 ,  C08G2261/92 ,  H10K10/464

摘要： The present invention provides compounds comprising at least one unit of formula (1) or (1′) as well as a process for the preparation of the compounds, intermediates of this process, electronic devices comprising the compounds, and the use of the compounds as semiconducting materials.

公开(公告)号：US11765951B2

公开(公告)日：2023-09-19

申请号：US17496158

申请日：2021-10-07

申请人： Japan Display Inc.

发明人： Naoki Tokuda

IPC分类号： G02F1/13 ,  G06F1/16 ,  G09F9/30 ,  G09G3/32 ,  H10K59/131 ,  G09G3/3225 ,  H10K50/87 ,  H10K77/10 ,  H10K10/46 ,  H10K50/844 ,  H10K59/121 ,  H10K102/00 ,  G02F1/1333

CPC分类号： H10K59/131 ,  G09G3/3225 ,  H10K50/87 ,  H10K77/111 ,  G02F1/133305 ,  G06F1/1641 ,  G06F1/1652 ,  G09F9/301 ,  G09G2300/0408 ,  G09G2300/0804 ,  H10K10/464 ,  H10K50/844 ,  H10K59/1216 ,  H10K2102/00 ,  H10K2102/311 ,  H10K2102/351 ,  Y02E10/549

摘要： A display device according to an embodiment of the present invention includes: a base material including a display region and a curved region; a wiring line disposed on the base material and disposed from the display region over the curved region; and a heat dissipating layer formed corresponding to a position at which the wiring line is disposed in the curved region.

公开(公告)号：US12016203B2

公开(公告)日：2024-06-18

申请号：US17140660

申请日：2021-01-04

申请人： SAMSUNG DISPLAY CO., LTD.

发明人： Junehwan Kim ,  Taeyoung Kim ,  Jongwoo Park ,  Kiju Im ,  Hyuncheol Hwang

IPC分类号： H10K59/12 ,  G09G3/3233 ,  H01L29/10 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786 ,  H10K10/46 ,  H10K59/121 ,  H10K59/35 ,  H10K77/10 ,  H10K102/00

CPC分类号： H10K59/12 ,  G09G3/3233 ,  G09G2320/0233 ,  H01L29/1054 ,  H01L29/66757 ,  H01L29/7842 ,  H01L29/78666 ,  H01L29/78675 ,  H01L2924/13069 ,  H10K10/464 ,  H10K59/1213 ,  H10K59/35 ,  H10K77/111 ,  H10K2102/311

摘要： A display device having a thin-film transistor with increased mobility of electrons or holes includes a first semiconductor layer arranged on a substrate and including a first channel region, a first source region, and a first drain region; a first stressor arranged between the substrate and the first semiconductor layer and which overlaps the first source region in a plan view; a second stressor arranged between the substrate and the first semiconductor layer and which overlaps the first drain region in the plan view, where the second stressor is spaced apart from the first stressor; a gate insulating layer arranged on the first semiconductor layer; and a first gate electrode arranged on the gate insulating layer and which overlaps the first semiconductor layer in the plan view.

公开(公告)号：US11996414B2

公开(公告)日：2024-05-28

申请号：US17123782

申请日：2020-12-16

申请人： Flexenable Technology Limited

发明人： Jan Jongman ,  Joffrey Dury ,  Shane Norval

IPC分类号： H01L27/12 ,  H10K10/46 ,  H10K10/82 ,  H10K19/10 ,  H10K71/00 ,  H10K71/20

CPC分类号： H01L27/1237 ,  H10K10/464 ,  H10K10/82 ,  H10K19/10 ,  H10K71/20 ,  H10K71/621

摘要： A device comprising a stack of layers defining one or more electronic elements, wherein the stack comprises at least: one or more semiconductor channels; a dielectric; a first conductor pattern defining one or more coupling conductors, wherein the one or more coupling conductors are capacitively coupled to the one or one or more semiconductor channels via the dielectric; a planarisation layer; a second conductor pattern defining one or more routing conductors, wherein the second conductor pattern is in contact with the first conductor pattern via through holes in at least the planarisation layer, and wherein the semiconductor channel regions are at least partly outside the through hole regions.

公开(公告)号：US20230180591A1

公开(公告)日：2023-06-08

申请号：US17916050

申请日：2021-03-30

申请人： PEKING UNIVERSITY

发明人： Wei SUN ,  Mengyu ZHAO

IPC分类号： H10K71/12 ,  H10K85/20 ,  H10K10/46

CPC分类号： H10K71/12 ,  H10K85/221 ,  H10K10/464 ,  H10K10/484

摘要： A method for forming a nanostructure array and a field effect transistor device on a substrate are provided. The method for forming the nanostructure array includes: providing a template solution comprising template nanostructures; depositing at least one template nanostructure onto the substrate by contacting the template solution with the substrate; and forming on the substrate at least one fixation structure each intersecting with all or a portion of the at least one template nanostructure to fix all or a portion of the at least one template nanostructure on the substrate.

公开(公告)号：US12010856B2

公开(公告)日：2024-06-11

申请号：US17874284

申请日：2022-07-27

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Timothy Vasen ,  Mark Van Dal ,  Gerben Doornbos ,  Matthias Passlack

IPC分类号： H10K10/46 ,  H10K19/10 ,  H10K85/20

CPC分类号： H10K10/484 ,  H10K10/464 ,  H10K10/472 ,  H10K10/481 ,  H10K19/10 ,  H10K85/221

摘要： In a method of forming a gate-all-around field effect transistor (GAA FET), a bottom support layer is formed over a substrate and a first group of carbon nanotubes (CNTs) are disposed over the bottom support layer. A first support layer is formed over the first group of CNTs and the bottom support layer such that the first group of CNTs are embedded in the first support layer. A second group of carbon nanotubes (CNTs) are disposed over the first support layer. A second support layer is formed over the second group of CNTs and the first support layer such that the second group of CNTs are embedded in the second support layer. A fin structure is formed by patterning at least the first support layer and the second support layer.

公开(公告)号：US11882762B2

公开(公告)日：2024-01-23

申请号：US14947410

申请日：2015-11-20

申请人： FlexEnable Technology Ltd.

发明人： Philip Edward May ,  Mark James ,  Piotr Wierzchowiec ,  Stephen Bain ,  Paul Craig Brookes ,  Edgar Kluge ,  Li Wei Tan ,  David Sparrowe ,  Magda Goncalves-Miskiewicz

IPC分类号： H10K85/40 ,  C09K11/06 ,  H05B33/10 ,  C09B69/10 ,  H10K10/46 ,  H10K71/15 ,  H10K85/10 ,  H10K30/00 ,  H10K50/11 ,  H10K71/13 ,  H10K85/60 ,  H10K101/10

CPC分类号： H10K85/40 ,  C09B69/101 ,  C09B69/109 ,  C09K11/06 ,  H05B33/10 ,  H10K10/484 ,  H10K71/15 ,  H10K85/115 ,  C09K2211/1037 ,  C09K2211/1416 ,  C09K2211/1425 ,  C09K2211/1441 ,  C09K2211/185 ,  H10K10/464 ,  H10K10/466 ,  H10K30/00 ,  H10K50/11 ,  H10K71/13 ,  H10K85/626 ,  H10K85/6576 ,  H10K2101/10 ,  Y02E10/549

摘要： The present invention relates to novel formulations comprising an organic semiconductor (OSC) and one or more organic solvents. The formulation comprises a viscosity at 25° C. of less than 15 mPas and the boiling point of the solvent is at most 400° C. Furthermore, the present invention describes the use of these formulations as inks for the preparation of organic electronic (OE) devices, especially organic photovoltaic (OPV) cells and OLED devices, to methods for preparing OE devices using the novel formulations, and to OE devices, OLED devices and OPV cells prepared from such methods and formulations.

公开(公告)号：US11854895B2

公开(公告)日：2023-12-26

申请号：US17813777

申请日：2022-07-20

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chao-Ching Cheng ,  Tzu-Ang Chao ,  Chun-Chieh Lu ,  Hung-Li Chiang ,  Tzu-Chiang Chen ,  Lain-Jong Li

IPC分类号： H01L21/8234 ,  H01L21/02 ,  H01L29/06 ,  H01L29/24 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786 ,  H10K10/46 ,  H10K71/12 ,  H10K85/20

CPC分类号： H01L21/823412 ,  H01L21/0262 ,  H01L21/02568 ,  H01L21/02603 ,  H01L21/02606 ,  H01L21/823431 ,  H01L29/0665 ,  H01L29/0669 ,  H01L29/0673 ,  H01L29/24 ,  H01L29/42392 ,  H01L29/66969 ,  H01L29/78696 ,  H10K10/464 ,  H10K10/474 ,  H10K10/484 ,  H10K10/486 ,  H10K71/12 ,  H10K85/221

摘要： A method includes forming a first low-dimensional layer over an isolation layer, forming a first insulator over the first low-dimensional layer, forming a second low-dimensional layer over the first insulator, forming a second insulator over the second low-dimensional layer, and patterning the first low-dimensional layer, the first insulator, the second low-dimensional layer, and the second insulator into a protruding fin. Remaining portions of the first low-dimensional layer, the first insulator, the second low-dimensional layer, and the second insulator form a first low-dimensional strip, a first insulator strip, a second low-dimensional strip, and a second insulator strip, respectively. A transistor is then formed based on the protruding fin.

公开(公告)号：US11690236B2

公开(公告)日：2023-06-27

申请号：US17672621

申请日：2022-02-15

申请人： Clap Co., Ltd.

发明人： Wei Hsiang Lin ,  Mi Zhou ,  JunMin Lee ,  Giseok Lee ,  Stefan Becker

IPC分类号： H01L51/00 ,  H10K10/46 ,  H10K71/20

CPC分类号： H10K10/474 ,  H10K10/464 ,  H10K10/478 ,  H10K10/484 ,  H10K71/231

摘要： The present invention relates to a process for the preparation of a top-gate, bottom-contact organic field effect transistor on a substrate, which organic field effect transistor comprises source and drain electrodes, a semiconducting layer, a cured first dielectric layer and a gate electrode, and which process comprises the steps of: i) applying a composition comprising an organic semiconducting material to form the semiconducting layer, ii) applying a composition comprising a first dielectric material and a crosslinking agent carrying at least two azide groups to form a first dielectric layer, iii) curing portions of the first dielectric layer by light treatment, iv) removing the uncured portions of the first dielectric layer, and v) removing the portions of the semiconducting layer that are not covered by the cured first dielectric layer, wherein the first dielectric material comprises a star-shaped polymer consisting of at least one polymer block A and at least two polymer blocks B, wherein each polymer block B is attached to the polymer block A, and wherein at least 60 mol % of the repeat units of polymer block B are selected from the group consisting of Formulas (1A), (1B), (1C), (1D), (1E) and (1F), wherein R1, R2, R3, R4, R5, R6, R7 and R8 are independently and at each occurrence H or C1-C10-alkyl.