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    Systems, methods, and apparatuses for implementing bi-layer semiconducting oxides in source and drain for low access and contact resistance of thin film transistors
    2.
    发明授权
    Systems, methods, and apparatuses for implementing bi-layer semiconducting oxides in source and drain for low access and contact resistance of thin film transistors 有权

    公开(公告)号：US10930791B2

    公开(公告)日：2021-02-23

    申请号：US16325164

    申请日：2016-09-30

    申请人： Intel Corporation

    发明人： Gilbert Dewey ,  Van H. Le ,  Rafael Rios ,  Shriram Shivaraman ,  Jack T. Kavalieros ,  Marko Radosavljevic

    IPC分类号： H01L29/78 ,  H01L29/786 ,  H01L29/221 ,  H01L29/66

    摘要： In accordance with disclosed embodiments, there are provided systems, methods, and apparatuses for implementing bi-layer semiconducting oxides in a source/drain for low access and contact resistance of thin film transistors. For instance, there is disclosed in accordance with one embodiment a semiconductor device having therein a substrate; a bi-layer oxides layer formed from a first oxide material and a second oxide material, the first oxide material comprising a semiconducting oxide material and having different material properties from the second oxide material comprising a high mobility oxide material; a channel layer formed atop the substrate, the channel layer formed from the semiconducting oxide material of the bi-layer oxides layer; a high mobility oxide layer formed atop the channel layer, the high conductivity oxide layer formed from the high mobility oxide material of the bi-layer oxides layer; metallic contacts formed atop the high mobility oxide layer; a gate and a gate oxide material formed atop the high mobility oxide layer, the gate oxide material being in direct contact with the high mobility oxide layer; and spacers separating the metallic contacts from the gate and gate oxide material. Other related embodiments are disclosed.

    Semiconductor device
    3.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10608118B2

    公开(公告)日：2020-03-31

    申请号：US16272287

    申请日：2019-02-11

    申请人： Semiconductor Energy Laboratory Co., Ltd.

    发明人： Shunpei Yamazaki

    IPC分类号： H01L29/10 ,  H01L29/786 ,  H01L21/02 ,  H01L29/66 ,  H01L29/04 ,  H01L29/22 ,  H01L29/221 ,  H01L29/24 ,  H01L29/26 ,  H01L29/423 ,  H01L29/45 ,  H01L29/49

    摘要： An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.

    SYSTEMS, METHODS, AND APPARATUSES FOR IMPLEMENTING BI-LAYER SEMICONDUCTING OXIDES IN SOURCE AND DRAIN FOR LOW ACCESS AND CONTACT RESISTANCE OF THIN FILM TRANSISTORS
    4.
    发明申请
    SYSTEMS, METHODS, AND APPARATUSES FOR IMPLEMENTING BI-LAYER SEMICONDUCTING OXIDES IN SOURCE AND DRAIN FOR LOW ACCESS AND CONTACT RESISTANCE OF THIN FILM TRANSISTORS 审中-公开

    公开(公告)号：US20200066912A1

    公开(公告)日：2020-02-27

    申请号：US16325164

    申请日：2016-09-30

    申请人： Intel Corporation

    发明人： Gilbert DEWEY ,  Van H. LE ,  Rafael RIOS ,  Shriram SHIVARAMAN ,  Jack T. KAVALIEROS ,  Marko RADOSAVLJEVIC

    IPC分类号： H01L29/786 ,  H01L29/221 ,  H01L29/66

    摘要： In accordance with disclosed embodiments, there are provided systems, methods, and apparatuses for implementing bi-layer semiconducting oxides in a source/drain for low access and contact resistance of thin film transistors. For instance, there is disclosed in accordance with one embodiment a semiconductor device having therein a substrate; a bi-layer oxides layer formed from a first oxide material and a second oxide material, the first oxide material comprising a semiconducting oxide material and having different material properties from the second oxide material comprising a high mobility oxide material; a channel layer formed atop the substrate, the channel layer formed from the semiconducting oxide material of the bi-layer oxides layer; a high mobility oxide layer formed atop the channel layer, the high conductivity oxide layer formed from the high mobility oxide material of the bi-layer oxides layer; metallic contacts formed atop the high mobility oxide layer; a gate and a gate oxide material formed atop the high mobility oxide layer, the gate oxide material being in direct contact with the high mobility oxide layer; and spacers separating the metallic contacts from the gate and gate oxide material. Other related embodiments are disclosed.

    Metal oxide film, semiconductor device, and manufacturing method of semiconductor device
    5.
    发明授权
    Metal oxide film, semiconductor device, and manufacturing method of semiconductor device 有权

    公开(公告)号：US10546960B2

    公开(公告)日：2020-01-28

    申请号：US16072019

    申请日：2016-05-19

    申请人： Semiconductor Energy Laboratory Co., Ltd.

    发明人： Shunpei Yamazaki

    IPC分类号： H01L29/786 ,  H01L21/02 ,  H01L29/04 ,  H01L29/22 ,  H01L29/221

    摘要： A semiconductor device which includes a metal oxide film including a crystal part is provided. A semiconductor device which has a metal oxide film and high field-effect mobility is provided. A highly reliable semiconductor device including a metal oxide film is provided. The semiconductor device includes a first insulator, a first conductor formed over the first insulator, a second insulator formed over the first conductor, an oxide formed over the second insulator, a third insulator formed over the oxide, a second conductor formed over the third insulator, a fourth insulator formed over the third insulator and the second conductor, and a fifth insulator formed over the fourth insulator. The oxide contains In, M (M is Al, Ga, Y, or Sn), and Zn. The oxide includes a first crystal part and a second crystal part. The first crystal part has c-axis alignment. The second crystal part does not have c-axis alignment.

    Low cost semiconducting alloy nanoparticles ink and manufacturing process thereof
    8.
    发明授权
    Low cost semiconducting alloy nanoparticles ink and manufacturing process thereof 有权
    低成本半导体合金纳米颗粒油墨及其制造方法

    公开(公告)号：US09290671B1

    公开(公告)日：2016-03-22

    申请号：US13733428

    申请日：2013-01-03

    申请人： Oceanit Laboratories, Inc.

    发明人： Ashavani Kumar ,  Vinod P. Veedu

    IPC分类号： C09D11/30 ,  C09D11/00 ,  C09D11/52 ,  C09D11/02 ,  H01L29/201 ,  H01L29/221 ,  C30B29/52

    CPC分类号： C09D11/30 ,  C09D11/00 ,  C09D11/02 ,  C09D11/322 ,  C09D11/52 ,  C30B29/52 ,  H01L29/201 ,  H01L29/221

    摘要： Electronic printing devices ink has nanoparticles of semiconducting materials with desired composition, size and band gap and modified with a volatile capping agent. Mercury cadmium telluride is synthesized by refluxing a mixture of metal salt and telluride precursor. Mercury (II) acetate and cadmium (II) acetate are reacted with a tellurium precursor (e.g. tri-n-octylphosphine telluride or telluric acid) in presence of a ligand (e.g. 1-dodecanethiol or oleylamine). This protocol yields nanoparticles of diameter ˜2-1000 nm range. The desired composition of nanoparticles is obtained by varying the relative concentration of the metal precursor. The ink is formulated by modifying the nanoparticles with volatile capping agent and dispersing the modified nanoparticles in a solvent.

    摘要翻译： 电子印刷装置油墨具有具有所需组成，尺寸和带隙的半导体材料的纳米颗粒，并用挥发性封端剂改性。 通过回流金属盐和碲化物前体的混合物合成汞碲化镉。 在配体（例如1-十二烷硫醇或油胺）的存在下，乙酸汞（II）和乙酸镉（II）与碲前体（例如三正辛基膦碲化物或碲酸）反应。 该方案产生直径〜2-1000nm范围的纳米颗粒。 通过改变金属前体的相对浓度来获得所需的纳米颗粒组成。 通过用挥发性封端剂改性纳米颗粒并将改性的纳米颗粒分散在溶剂中来配制墨水。