摘要:
A circuit arrangement and an electrical system that includes a semiconductor switch (10), a gate driver (20), a power supply (30), a control unit (40), a monitoring unit (50) and a shutdown device (60). The semiconductor switch (10) is configured to be arranged in a circuit including a power source (70) and a load (80), and to close and interrupt the circuit as a function of a control of a gate connection (12) of the semiconductor switch (10). The power supply (30) powers the gate driver (20). The control unit (40) controls the gate driver (20) to open and close the semiconductor switch (10). The monitoring unit (50) determines a request for the redundant interruption of the circuit based on predefined criteria. The shutdown device (60) shuts down a gate voltage applied to the gate connection (12) in response to a request for the redundant interruption of the circuit.
摘要:
The present disclosure relates to a solid insulated switch using a semiconductor comprising a main circuit unit connected between systems on both sides thereof, and which has a first semiconductor and a second semiconductor arranged in a series; a snubber circuit having a capacitor and a resistor arranged in a series, one end connected in parallel to the front end of the first semiconductor switch, and the other end connected in parallel to the rear end of the second semiconductor switch; a freewheeling circuit, having a diode and a resistor arranged in a series, one end connected to a common contact between the first semiconductor switch and the second semiconductor switch, and the other end connected to the ground; and a mechanical switch for ensuring physical insulation after fault current interruption.
摘要:
A circuit including a source, a load, and an isolation circuit for controllably isolating the load from the source. The isolation circuit is disposed between the source and the load. The isolation circuit includes at least one insulated-gate bipolar transistor (IGBT) and at least one gate turn-off thyristor (GTO) in parallel with the insulated-gate bipolar transistor. When no fault condition exists, the GTO is configured to be ON to couple the load to the source. When a fault condition exists, the at least one IGBT is configured to turn ON. After the at least one IGBT turns ON, the at least one GTO is configured to turn OFF. After a predetermined amount of time, reflecting the post fabrication alteration to the GTO's minority carrier lifetime (e.g. electron irradiation), after the at least one GTO turns OFF, the at least one IGBT is configured to turn OFF. Alternatively, the circuit is used as an inverter switch, where at the command to turn ON is supplied, the at least one IGBT is turned ON, followed by the at least one SGTO. When commanded to turn OFF the at least one SGTO is turned OFF followed by the at least one IGBT. This alternative configuration allows the robust, controllable switching speeds of IGBTs and the superior conduction efficiency of SGTOs. The two configurations mentioned above utilize a wide range of SGTO performance, thus the ability to control the SGTOs turn-off speed by reducing its minority carrier lifetime after the device is processed is of large importance. The efficiency of all uses of the circuit can be optimized with the judicious selection of SGTO minority carrier lifetime and the ratio of active area between the SGTO and IGBT devices. In all cases there is a balance between the time the circuit can achieve hard turn-off without current commutation, the conduction efficiency of the circuit and the maximum amount of controllable current. In all cases both the conduction efficiency of the circuit is higher than an IGBT-only based circuit, and the switching performance is higher than a GTO-only based circuit.
摘要:
A feedback signal stabilized by a capacitor and related to an output voltage of a power converter is used to acquire the output power information of the power converter, and a control circuit uses a second clock not related to the switching frequency of the power converter to count a duration time of the feedback signal being higher than a threshold. When the duration time is higher than a preset time, an abnormal output power of the power converter is distinguished and the power converter will be turned off. The feedback signal will not vary severely even if the output terminal of the power converter is interfered, and the counted duration time will not be influenced when the switching frequency is changing caused by a load changing.
摘要:
A feedback signal stabilized by a capacitor and related to an output voltage of a power converter is used to acquire the output power information of the power converter, and a control circuit uses a second clock not related to the switching frequency of the power converter to count a duration time of the feedback signal being higher than a threshold. When the duration time is higher than a preset time, an abnormal output power of the power converter is distinguished and the power converter will be turned off. The feedback signal will not vary severely even if the output terminal of the power converter is interfered, and the counted duration time will not be influenced when the switching frequency is changing caused by a load changing.
摘要:
A low current protection circuit is configured to detect a lowering of a load current flowing a load to perform a low current protection operation and includes: a load current detection configured to detect a load current; a low current detection configured to detect a lowering of the load current by comparing the load current detected by the load current detection unit and a preset reference value; a protection unit configured to perform the low current protection operation when the lowering of the load current is detected by the low current detection unit; and a masking unit configured to mask the low current protection operation of the protection unit from when the lowering of the load current is detected by the low current detection unit to when a masking time period depending on a duty ratio of the external pulse signal elapses.
摘要:
Apparatus and methods for time-delayed thermal overload protection are provided. In one aspect, an integrated circuit includes a primary circuit disposed in a primary circuit region on a substrate, and a thermal protection circuit disposed in a thermal protection circuit region on the substrate and in thermal communication with the primary circuit. The thermal protection circuit includes a temperature sensing circuit configured to sense a temperature of the thermal protection circuit region and to activate a temperature warning signal when the temperature exceeds a temperature threshold level. The thermal protection circuit additionally includes a time delay circuit configured to activate a shut off signal to disable at least a portion of the primary circuit when the temperature warning signal is active for a duration exceeding a time delay.
摘要:
A circuit breaker capable of microcontroller-based fault detection having a backup circuit for causing the circuit to trip in response to a microcontroller fault or a failure of a regulated power supply powering the microcontroller. The circuit breaker includes an RC circuit connected to an SCR. The resistor of the RC circuit is connected between the anode and gate of the SCR, and the capacitor is connected between the gate and cathode of the SCR. The microcontroller has a first pin coupled to the RC circuit, which is initially in a high input impedance state. In the event of a microcontroller fault or power supply failure, the capacitor will charge to a voltage sufficient to activate the SCR and trip the breaker. If the microcontroller startup routine is successful, the pin is configured as an output and is pulled low, shorting out the capacitor.
摘要:
A circuit breaker capable of microcontroller-based fault detection having a backup circuit for causing the circuit breaker to trip in response to a microcontroller fault, including a timing circuit powered by a power supply and a microcontroller. The timing circuit is electrically coupled to an SCR that causes the circuit breaker to trip. The timing circuit includes a BJT coupled to the gate of the SCR. The microcontroller has a first output coupled to the timing circuit and a second output coupled to the SCR. The first output is coupled to a node between a resistor and a grounded capacitor in the timing circuit, and the node is coupled to a gate of the SCR and to a base of the transistor. A voltage develops at the node sufficient to cause the gate of the SCR to turn on unless the microcontroller pulls the first high-impedance output to a logic low state.
摘要:
A solid state power controller (SSPC) often contains electronic circuitry which could be damaged or upset by the excessive transient voltages induced by the lightning and SSPC could result in undesirable (or nuisance) trips due to lightning strikes. The present invention is intended to address the “nuisance trip” issue, by relying on the lightning indicative signals to distinguish between the transient current surge due to the lightning strike and that due to the circuit fault in the power distribution channel. The present invention utilizes either the break-down current in a transient voltage suppression (TVS) device, or a voltage signal at the output of the SSPC as the indication of lightning strike, to avoid nuisance trips.