公开(公告)号：US10768290B2

公开(公告)日：2020-09-08

申请号：US15835186

申请日：2017-12-07

申请人： NXP B.V.

发明人： Yu Lin ,  Erwin Janssen ,  Konstantinos Doris ,  Vladislav Dyachenko ,  Athon Zanikopoulos

IPC分类号： G01S13/34 ,  G06F1/02 ,  H03D7/14 ,  H03J3/04 ,  G01R23/04

摘要： A frequency estimation signal generator component arranged to receive an input frequency signal and to generate therefrom a frequency estimation signal. The frequency estimation signal generator component comprises a counter component arranged to sequentially output a sequence of control signal patterns over a plurality of digital control signals under the control of an oscillating signal derived from the received input frequency signal terns. The frequency estimation signal generator further comprises a continuous waveform generator component arranged to receive the plurality of digital control signals and a weighted analogue signal for each of the received digital control signals, and to output a continuous waveform signal comprising a sum of the weighted analogue signals for which the corresponding digital control signals comprise an asserted logical state. The frequency conversion component is arranged to derive the frequency estimation signal from the continuous waveform signal output by the continuous waveform generator component.

公开(公告)号：US20190246367A1

公开(公告)日：2019-08-08

申请号：US16318111

申请日：2016-07-22

申请人： FUNDACIÓ PER A LA UNIVERSITAT OBERTA DE CATALUNYA

发明人： Xavier VILAJOSANA GUILLÉN ,  Borja MARTÍNEZ HUERTA ,  Ferran ADELANTADO FREIXER ,  Pere TUSET PEIRÓ

IPC分类号： H04W56/00 ,  H03J3/04 ,  H03L1/02 ,  G06F1/12

CPC分类号： H04W56/0015 ,  G06F1/12 ,  H03J3/04 ,  H03L1/02

摘要： Methods and devices for synchronizing a device clock in a wireless network (e.g. a LPWAN) are disclosed. Example methods comprise identifying a device temperature, identifying a clock drift associated with the identified device temperature and applying a correction to the device clock based on the identified drift. For the identified device temperature, the drift is identified by comparing the confidence of the drift value in a pre-calibration curve generated from fixed drift values in a pre-calibration table with the confidence of the drift value in a learning curve generated from variable drift values in a learning table and selecting the drift value from the curve having the higher drift confidence.

公开(公告)号：US10348273B1

公开(公告)日：2019-07-09

申请号：US15862671

申请日：2018-01-05

申请人： Christos Tsironis

发明人： Christos Tsironis

IPC分类号： H03H7/38 ,  H03J3/08 ,  H03D7/14 ,  G10H1/44 ,  H03J5/02 ,  H03J3/04 ,  H03H7/40

摘要： A hybrid digital electronic tuner (HDET) uses a modified forward signal power injection technique, a variance of a prior art Gamma Boosting Unit (GBU) technique, cascaded with a digital, PIN diode based, electronic tuner, all integrated in the same low loss parallel plate airline (slabline) to create a compact hybrid tuner unit able of generating thousands of high reflection factors (|Gamma|≥1) at millisecond tuning speed.

公开(公告)号：US20050236673A1

公开(公告)日：2005-10-27

申请号：US11171325

申请日：2005-07-01

申请人： Agnes Woo ,  Kenneth Kindsfater ,  Fang Lu

发明人： Agnes Woo ,  Kenneth Kindsfater ,  Fang Lu

IPC分类号： H01F17/00 ,  H01L23/50 ,  H01L23/522 ,  H01L23/60 ,  H01L23/62 ,  H01L27/02 ,  H01L27/08 ,  H03B5/12 ,  H03B5/36 ,  H03D7/16 ,  H03D7/18 ,  H03G1/00 ,  H03H11/12 ,  H03J1/00 ,  H03J3/04 ,  H03J3/08 ,  H03J3/18 ,  H03L7/10 ,  H03L7/23 ,  H04B1/28

CPC分类号： H01L23/50 ,  H01F17/0006 ,  H01F17/0013 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L23/60 ,  H01L27/0248 ,  H01L27/0251 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03B5/1212 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/364 ,  H03D7/161 ,  H03D7/18 ,  H03G1/0029 ,  H03H11/1291 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L7/10 ,  H03L7/23 ,  H04B1/28 ,  H01L2924/00

摘要： An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.

摘要翻译： 描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合，以提供足够的图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 滤波器采用多轨螺旋电感。 使用本地振荡器调整滤波器以调整替代滤波器，以及滤波器组件值期间的频率缩放与被调谐的滤波器的频率缩放。 结合滤波，频率规划提供了额外的镜像抑制。 片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中，使调谐电容范围居中。 差分晶体振荡器有利地用作频率参考。 差分信号传输有利地用于整个接收机。 ESD保护由保护信号完整性的焊盘环和ESD钳位结构提供。 还提供每个引脚上的分流器，以放电ESD积聚。 分流器利用栅极升压结构来提供足够的小信号RF性能和最小的寄生负载。

公开(公告)号：US06885275B1

公开(公告)日：2005-04-26

申请号：US09493942

申请日：2000-01-28

申请人： James Y. C. Chang

发明人： James Y. C. Chang

IPC分类号： H01F17/00 ,  H01L23/522 ,  H01L27/02 ,  H01L27/08 ,  H03B5/12 ,  H03B5/36 ,  H03D7/16 ,  H03D7/18 ,  H03G1/00 ,  H03H11/12 ,  H03J1/00 ,  H03J3/04 ,  H03J3/08 ,  H03J3/18 ,  H03L7/10 ,  H03L7/23 ,  H01F5/00

CPC分类号： H03L7/23 ,  H01F17/0006 ,  H01F17/0013 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03B5/364 ,  H03D7/161 ,  H03D7/18 ,  H03G1/0029 ,  H03H11/1291 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L7/10 ,  H01L2924/00

摘要： An integrated circuit inductor includes a spiral pattern disposed upon a substrate. The track of the spiral is divided into multiple tracks to form a multi-track inductor. The individual tracks are disposed side by side and in different layers. Tracks that are aligned vertically are coupled by feed throughs, or vias. Multiple vias are used along the length of each of the multiple tracks. Tracks disposed in the same layer are joined together at their beginning, and at their termination. A patterned shield is fabricated from conductive fingers of n+ salicided material that is separated by non conducting polysilicon that fills the gaps between the fingers. The conductive fingers are coupled together in groups, which are in turn tied to a single point ground. In tying the groups together, a gap in the conducting path is provided to prevent ground loop currents. The shield is disposed between the multi-track inductor and the substrate.

摘要翻译： 集成电路电感器包括设置在基板上的螺旋图案。 螺旋的轨迹被分成多个轨道以形成多轨电感器。 各个轨道并排设置在不同的层中。 垂直对齐的轨道通过馈通或通孔耦合。 沿着多个轨道的每一个的长度使用多个通孔。 设置在同一层中的轨道在其开始并在其终止时连接在一起。 图案化屏蔽由n +盐水化材料的导电指状物制成，其由填充指状物之间的间隙的非导电多晶硅分离。 导电指状物被组合在一起，它们又被连接到单点接地。 在将组合在一起时，提供导通路径中的间隙以防止接地回路电流。 屏蔽设置在多轨电感器和衬底之间。

公开(公告)号：US06847811B2

公开(公告)日：2005-01-25

申请号：US09815203

申请日：2001-03-22

申请人： Andreas Hofmann

发明人： Andreas Hofmann

IPC分类号： H03D7/00 ,  H03D7/16 ,  H03J3/04 ,  H03J7/04 ,  H04B1/04 ,  H04B1/26

CPC分类号： H03J7/04 ,  H03J3/04

摘要： A circuit configuration having a filter, for example a bandpass filter, and a method for its operation are specified, which the circuit configuration allows for compensation of a frequency error, for example between an actual mid-frequency and a nominal frequency. A first mixer, upstream of the filter and a second mixer downstream from the filter are provided. A signal and a respective oscillation frequency are each supplied to respective inputs of the first and second mixers. The oscillation frequencies are mixed as a function of the frequency error in frequency generators such that the signal at the intermediate frequency is matched to the filter characteristics of the filter which is subject to tolerances. In consequence, filters that satisfy the stringent requirements for WCDMA mobile radio applications, but by virtue of the manufacturing technique, have an excessive mid-frequency error, can be used, for example, in heterodyne receivers.

摘要翻译： 规定具有滤波器（例如带通滤波器）及其操作方法的电路配置，其电路配置允许例如在实际的中频和标称频率之间的频率误差的补偿。 提供在过滤器上游的第一混合器和从过滤器下游的第二混合器。 信号和各自的振荡频率分别提供给第一和第二混频器的相应输入端。 作为频率发生器中的频率误差的函数，振荡频率被混合，使得中频处的信号与经过公差的滤波器的滤波器特性相匹配。 因此，可以使用例如在外差接收机中使用满足WCDMA移动无线电应用的严格要求但是由于制造技术而具有过高的中频误差的滤波器。

公开(公告)号：US6018702A

公开(公告)日：2000-01-25

申请号：US102294

申请日：1998-06-22

申请人： David A. Luiz

发明人： David A. Luiz

IPC分类号： G01R35/00 ,  G01R23/163 ,  G01R23/165 ,  G01R27/00 ,  G01R27/28 ,  H03J1/00 ,  H03J3/04

CPC分类号： G01R35/005 ,  G01R23/165 ,  H03H2210/012 ,  H03H2210/04

摘要： A filter calibration system uses the reflection characteristics of a tuned filter, such as a YIG-tuned filter (YTF), to establish a correspondence between a control signal applied to the filter and the passband center frequency of the filter. This correspondence enables tuning characteristic of a YTF stored during a baseline characterization of a spectrum analyzer to be corrected to compensate for temperature changes and changes in operating parameters of the spectrum analyzer. The filter calibration system uses components within the spectrum analyzer to perform the calibration so that the manufacturing cost of the spectrum analyzer is not increased. The spectrum analyzer's local oscillator provides a stimulus signal that is applied to the YTF. A mixer within the spectrum analyzer detects reflections of the stimulus signal by the YTF while control signals applied to the YTF are varied to correspondingly adjust the passband center frequency of the YTF. The detected reflections from the YTF at the various control signal levels are recorded and characteristics of this reflection response are used to map the control signal levels to the center frequencies of the YTF to compensate for changes in the tuning characteristic of the YTF.

摘要翻译： 滤波器校准系统使用诸如YIG调谐滤波器（YTF）的调谐滤波器的反射特性来建立施加到滤波器的控制信号与滤波器的通带中心频率之间的对应关系。 该对应关系使得在频谱分析仪的基线表征期间存储的YTF的调谐特性能够被校正，以补偿频谱分析仪的温度变化和操作参数的变化。 过滤器校准系统使用频谱分析仪中的组件执行校准，从而不会增加频谱分析仪的制造成本。 频谱分析仪的本地振荡器提供施加到YTF的刺激信号。 频谱分析仪内的混频器通过YTF检测刺激信号的反射，同时施加到YTF的控制信号也会相应地调整YTF的通带中心频率。 记录来自各个控制信号电平的来自YTF的检测到的反射，并且使用该反射响应的特性将控制信号电平映射到YTF的中心频率，以补偿YTF的调谐特性的变化。

公开(公告)号：US5451915A

公开(公告)日：1995-09-19

申请号：US69298

申请日：1993-05-26

申请人： Peter J. Katzin ,  Yalcin Ayasli ,  Brian E. Bedard

发明人： Peter J. Katzin ,  Yalcin Ayasli ,  Brian E. Bedard

IPC分类号： H03B1/00 ,  H03B5/12 ,  H03B7/06 ,  H03H5/12 ,  H03H11/52 ,  H03J3/04 ,  H03H11/04

CPC分类号： H03L7/0805 ,  H03B5/1203 ,  H03B5/1228 ,  H03B5/1243 ,  H03H11/52 ,  H03H5/12 ,  H03J3/04 ,  H03B2200/004 ,  H03B2200/0086 ,  H03B2201/0208 ,  H03B2201/036 ,  H03B7/06

摘要： A negative resistance generator includes first and second terminals; first and second inductors connected in series between the terminals; and a semiconductor amplifying device having a first control electrode connected to the first terminal and a first active electrode connected to the second terminal and a second active electrode connected to the junction of the inductors. When employed in an active filter resonator a first variable capacitor is interconnected with the inductors for setting the resonant frequency of the resonator. The resonators may be combined in an active filter with a transmission line where each of the resonators is interconnected to the line by decreasing resistance from the input to the output in order to balance the rf currents to which the resonators are subjected. An improved dual loop active filter control system is achieved by using a master oscillator that employs a resonator that is matched to the active filter resonator in the filter and servoing the frequency and Q-factor controls so that the drive signals are compensated for temperature drifts, manufacturing tolerances, and other problems while a buffer amplifier is used between the master oscillator and the frequency and gain control loops for isolating the master oscillator reference circuit from the loading of the loops and from the perturbation introduced by the frequency reference signal; a frequency shifting circuit in the frequency control loop permits the reference signal to be shifted to a lower or higher frequency than that of the master oscillator.

摘要翻译： 负电阻发生器包括第一和第二端子; 在端子之间串联连接的第一和第二电感器; 以及半导体放大装置，其具有连接到第一端子的第一控制电极和连接到第二端子的第一有源电极和连接到电感器的结的第二有源电极。 当用于有源滤波器谐振器时，第一可变电容器与电感器互连，用于设定谐振器的谐振频率。 谐振器可以组合在有源滤波器与传输线之间，其中每个谐振器通过从输入到输出的电阻减小而互连到线路上，以平衡谐振器所经受的rf电流。 通过使用主振荡器实现改进的双环有源滤波器控制系统，该主振荡器采用与滤波器中的有源滤波器谐振器匹配的谐振器，并且对频率和Q因子控制进行伺服，以便驱动信号被补偿温度漂移， 制造公差和其他问题，而在主振荡器和频率和增益控制回路之间使用缓冲放大器，用于将主振荡器参考电路与负载环路以及由频率参考信号引入的扰动隔离; 频率控制环路中的频移电路允许参考信号被转换到比主振荡器更低或更高的频率。

公开(公告)号：US3845429A

公开(公告)日：1974-10-29

申请号：US36550573

申请日：1973-05-31

申请人： GRAY F

发明人： GRAY F

IPC分类号： H01H47/12 ,  H03J7/04 ,  H03J3/04

CPC分类号： H03J7/04 ,  H01H47/12

摘要： An automatic tuning arrangement is provided in which a tuned circuit contains a variable reactance element for varying the resonance of the tuned circuit. The value of the element is controlled by the mark/space ratio of a pulse train applied to it by a control circuit, the mark/space ratio varying with the frequency of an input signal to the tuned circuit. The arrangement is particularly useful in the protective relaying field.

摘要翻译： 提供了一种自动调谐装置，其中调谐电路包含用于改变调谐电路的谐振的可变电抗元件。 元件的值由控制电路施加到其的脉冲序列的标记/空间比来控制，标记/空间比随输入信号的频率变化到调谐电路。 该装置在保护继电器领域特别有用。

公开(公告)号：US3613008A

公开(公告)日：1971-10-12

申请号：US3613008D

申请日：1969-05-15

申请人： MOTOROLA INC

发明人： JABBAR KAMIL Y

IPC分类号： H04B1/18 ,  H03G3/20 ,  H03G3/30 ,  H03J3/04 ,  H03J3/18

CPC分类号： H03G3/3052 ,  H03J3/185

摘要： A radio receiver is supplied with signals from a high impedance capacitive antenna coupled in series with a low impedance resistive load in the form of the emitter-base circuit of a common-base RF transistor amplifier through a series-tuned circuit, including a varactor diode connected in series with an inductor. A source of DC biasing potential is provided to vary the biasing voltage on the diode in order to change its capacitance to tune the circuit over a predetermined band of frequencies. Overload compensation for the varactor diode is provided by utilizing the automatic gain control (AGC) voltage of the receiver, with the AGC voltage being applied to the base of the RF amplifier transistor to vary the biasing potential thereon. This in turn causes a corresponding variation in the impedance of the emitter-base path of the transistor with an increasing impedance being caused by increased signal levels. As a result, increasing amounts of the signal supplied by the antenna are dropped across the emitter-base path of the transistor at high signal levels, thereby limiting the RF signal level across the varactor diode to prevent rectification of high level signals thereby.