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1.发明申请公开(公告)号：US20210132185A1
公开(公告)日：2021-05-06
申请号：US17083743
申请日：2020-10-29
Applicant: NXP B.V.
Inventor： Yu Lin , Francesco Laghezza
Abstract: Disclosed is a digital signal processing unit, for a frequency modulated continuous wave, FMCW, radar receiver module and configured to receive a digital in-phase signal and a digital quadrature signal and to provide an interference-suppressed signal, wherein the digital signal processing unit comprises: a processing subunit, configured to provide an an-band intermediate frequency, IF, signal and an image-band IF signal; an image-band processing unit configured to identify an interference window, estimate an interference crossing moment, and mirror the image band IF signal across the interference window about the interference crossing moment; and combinatorial logic configured to subtract the mirrored signal from the in-band IF signal. Related FMCW radar receiver modules and methods for interference suppression also disclosed
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公开(公告)号：US09350375B1
公开(公告)日：2016-05-24
申请号：US14685501
申请日：2015-04-13
Applicant: NXP B.V.
Inventor： Yu Lin , Frank Leong , Konstantinos Doris
CPC classification number: H03M1/12 , H03M1/1215 , H03M1/1265
Abstract: Methods and systems for performing analog-to-digital conversion are described. In one embodiment, a method for performing analog-to-digital conversion involves processing an analog impulse signal to obtain an impulse pattern of the analog impulse signal in a first signal processing path and converting the analog impulse signal into a digital signal based on the impulse pattern in a second signal processing path that is in parallel with the first signal processing path. The impulse pattern of the analog impulse signal includes duty cycle information of the analog impulse signal. Other embodiments are also described.
Abstract translation: 描述用于执行模数转换的方法和系统。 在一个实施例中，用于执行模数转换的方法涉及处理模拟脉冲信号以在第一信号处理路径中获得模拟脉冲信号的脉冲模式，并且基于脉冲将模拟脉冲信号转换为数字信号 在与第一信号处理路径并联的第二信号处理路径中的图案。 模拟脉冲信号的脉冲模式包括模拟脉冲信号的占空比信息。 还描述了其它实施例。
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3.发明授权公开(公告)号：US11385321B2
公开(公告)日：2022-07-12
申请号：US16176430
申请日：2018-10-31
Applicant: NXP B.V.
Abstract: A radar unit (400) for detecting an existence of interference is described that includes: a millimetre wave (mmW) transceiver (Tx/Rx) circuit configured to radiate a transmit radar signal and receive an echo signal thereof; a mixed analog and baseband circuit operably coupled to the mmW Tx/Rx circuit; and a signal processor circuit (452) operably coupled to the mixed analog and baseband circuit. An interference detection unit (448) is operably coupled to the mmW Tx/Rx circuit and configured to: monitor a whole or a portion of a radar frequency band supported by the radar unit and identify, from a received interference signal, an arrival direction of the identified interference and a level of interference and output an interference detected signal; and wherein the signal processor circuit (452) is configured to analyse the interference detected signal and quantify a response to the detection of an arrival direction and a level of received interference.
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公开(公告)号：US10788569B2
公开(公告)日：2020-09-29
申请号：US15907501
申请日：2018-02-28
Applicant: NXP B.V.
Inventor： Yu Lin , Maarten Lont
IPC: G01S7/40 , G01S13/931 , G01S13/32 , G01S13/10 , G01S13/34 , G01S7/02 , G01S13/87 , G01S7/42 , G01S7/03 , G01S7/285 , G01S7/35 , G01S13/86 , G01S13/02
Abstract: A reconfigurable radar unit is described that includes: a millimetre wave (mmW) transceiver (Tx/Rx) circuit; a mixed analog and baseband integrated circuit; and a signal processor circuit. The mmW Tx/Rx circuit and mixed analog and baseband integrated circuit and signal processor circuit are configured to support a plurality of radar operational modes. a radar sensitivity monitor and architecture reconfiguration control unit (260) is coupled to the signal processor circuit and is configured to monitor a radar performance and, in response thereto, initiate a change in the radar operational mode. In this manner, a large number of radar operational modes is supported and can be dynamically adopted by the reconfigurable radar unit dependent upon any prevailing radar performance condition.
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公开(公告)号：US20190173479A1
公开(公告)日：2019-06-06
申请号：US16145741
申请日：2018-09-28
Applicant: NXP B.V.
Inventor： Vladislav Dyachenko , Erwin Janssen , Yu Lin , Athon Zanikopoulos
Abstract: A successive approximation register, SAR, analog-to-digital converter, ADC, (400) is described. The SAR ADC (400) includes: a track and hold circuit (414) configured to sample an analog input signal (410); a comparator (416) coupled to the track and hold circuit and configured to compare the sampled analog input signal (410) with a DAC (444) output voltage; and a feedback path (422) that comprises a digital-to-analog converter, DAC, (444) configured to generate the reference voltage that approximates the input analog signal (410). The SAR ADC (400) further includes a dither circuit (468) coupled to or located in the feedback path (422) and arranged to add a dither signal at an input of the DAC (444) in a first time period and subtract the dither signal from the output digital signal routed via the feedback path (422) and input of the DAC (444) in a second time period during a conversion phase of the SAR ADC (400).
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Patent Agency Ranking
6.发明申请公开(公告)号：US20190149162A1
公开(公告)日：2019-05-16
申请号：US16119117
申请日：2018-08-31
Applicant: NXP B.V.
Inventor： Yu Lin , Erwin Janssen , Vladislav Dyachenko
CPC classification number: H03M1/38 , G01S13/06 , H03M1/1004 , H03M1/1028 , H03M1/181 , H03M1/187 , H03M1/462
Abstract: A successive approximation register, SAR, analog-to-digital converter, ADC, (400) is described. The SAR ADC (400) includes: an analog input signal (410); an ADC core (414) configured to receive the analog input signal (410) and comprising: a digital to analog converter, DAC (430) located in a feedback path; and a SAR controller (418) configured to control an operation of the DAC (430), wherein the DAC (430) comprises a number of DAC cells, arranged to convert a digital code from the SAR controller (418) to an analog form; a digital signal reconstruction circuit (450) configured to convert the digital codes from the SAR controller (418) to a binary form; and an output coupled to the digital signal reconstruction circuit (450) and configured to provide a digital data output (460). The DAC (430) is configurable to support at least two mapping modes, including a small signal mapping mode of operation; and the SAR controller (418) is configured to identify when the received analog signal is a small signal level, and in response thereto re-configure the DAC (430) and the digital signal reconstruction circuit (450) to implement a small signal mapping mode of operation.
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7.发明授权公开(公告)号：US10830867B2
公开(公告)日：2020-11-10
申请号：US16012225
申请日：2018-06-19
Applicant: NXP B.V.
Inventor： Yu Lin
Abstract: A radar unit (400) for detecting an existence of interference is described that includes: a millimetre wave (mmW) transceiver (Tx/Rx) circuit configured support a normal data acquisition mode of operation that comprises transmitting a radar signal waveform and receiving an echo signal thereof; a mixed analog and baseband circuit operably coupled to the mmW Tx/Rx circuit; and a signal processor circuit (452) operably coupled to the mixed analog and baseband circuit. An interference detection unit (448) is operably coupled to the mmW Tx/Rx circuit. The radar unit is configured to operate a time-discontinuous mode of operation that includes a first time portion used as an interference monitoring period and a second time portion used by the radar unit in the normal data acquisition mode of operation, whereby the mixed analog and baseband circuit, signal processor circuit (452) and interference detection unit (448) are configured to detect interference signals during the monitoring period.
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公开(公告)号：US10768290B2
公开(公告)日：2020-09-08
申请号：US15835186
申请日：2017-12-07
Applicant: NXP B.V.
Inventor： Yu Lin , Erwin Janssen , Konstantinos Doris , Vladislav Dyachenko , Athon Zanikopoulos
Abstract: A frequency estimation signal generator component arranged to receive an input frequency signal and to generate therefrom a frequency estimation signal. The frequency estimation signal generator component comprises a counter component arranged to sequentially output a sequence of control signal patterns over a plurality of digital control signals under the control of an oscillating signal derived from the received input frequency signal terns. The frequency estimation signal generator further comprises a continuous waveform generator component arranged to receive the plurality of digital control signals and a weighted analogue signal for each of the received digital control signals, and to output a continuous waveform signal comprising a sum of the weighted analogue signals for which the corresponding digital control signals comprise an asserted logical state. The frequency conversion component is arranged to derive the frequency estimation signal from the continuous waveform signal output by the continuous waveform generator component.
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公开(公告)号：US10742246B2
公开(公告)日：2020-08-11
申请号：US15847964
申请日：2017-12-20
Applicant: NXP B.V.
Inventor： Yu Lin
IPC: H04B1/10 , G01S7/35 , G01S13/931 , G01S7/292 , G01S13/28 , G01S13/24 , H03M1/18 , G01S7/03 , G01S13/44 , G01S13/34
Abstract: A receive path arrangement of a radar sensor of FMCW type comprising a first and second receive path configured to receive reflected radar signals for detection and ranging of objects in a space around the radar sensor; the first receive path configured to provide reflected radar signals between a first and second beat frequency to a first analogue to digital converter for subsequent digital signal processing and wherein; the second receive path includes a second-receive-path filter configured to provide filtered signals by attenuation of the reflected radar signals having frequencies below an intermediate beat frequency, the intermediate beat frequency between the first and second beat frequencies, the second receive path further including a second-receive-path amplifier arrangement configured to provide amplified signals by amplification of the filtered signals and provide the amplified signals to a second analogue to digital converter for subsequent digital signal processing.
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公开(公告)号：US10983193B2
公开(公告)日：2021-04-20
申请号：US16174997
申请日：2018-10-30
Applicant: NXP B.V.
Inventor： Yu Lin , Marcello Ganzerli , Mingda Huang
IPC: G01S7/03 , G01S13/931 , H01Q1/32 , H01Q3/26 , G01S13/34 , G01S13/87 , G01S13/86 , G01S7/40 , G01S13/00 , G01S13/02 , G01S13/46
Abstract: A communication unit, such as a radar unit (500) includes a plurality of cascaded millimetre wave, mmW, transceiver, TRx, circuit, each comprising at least one phase shift circuit (616) and each coupled to respective antennas; and a signal processor circuit (552) operably coupled to the plurality of cascaded mmW TRx circuits and configured to process transmit and receive signals of the plurality of cascaded mmW TRx circuits. The radar unit (500) further comprises: a first TRx circuit (320) of the plurality of cascaded mmW TRx circuits being configured to wirelessly transmit (360) a signal to a second TRx circuit (322) via a respective antenna; a localization processing circuit (580) operably coupled to at least one of the first TRx circuit (320) and second TRx circuit (322) and configured to wirelessly determine a distance relationship (350) between at least one antenna coupled to the first TRx circuit (320) and at least one antenna coupled to the second TRx circuit (322); and a phase control unit (602), operably coupled to the localization processing circuit (570) and configured to adjust at least one phase shifter (616) in response to the wirelessly determined distance relationship.
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