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公开(公告)号:US20230049926A1
公开(公告)日:2023-02-16
申请号:US17804460
申请日:2022-05-27
发明人: Naveen GANAGONA , George CHANG
IPC分类号: H01L29/739 , H01L29/10 , H01L21/223 , H01L21/265
摘要: A semiconductor device includes a backside contact and a substrate. An epitaxial field stop region may be formed on the substrate with a graded doping profile that decreases with distance away from the substrate, and an epitaxial drift region may be formed adjacent to the epitaxial field stop region. A frontside device may be formed on the epitaxial drift region.
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公开(公告)号:US20230005794A1
公开(公告)日:2023-01-05
申请号:US17781585
申请日:2020-12-09
发明人: Christian Beyer , Francisco Javier Santos Rodriguez , Hans-Joachim Schulze , Marko David Swoboda
IPC分类号: H01L21/82 , H01L21/02 , H01L21/04 , H01L21/223 , H01L21/265 , H01L21/268 , H01L21/3105 , H01L21/683 , H01L29/16
摘要: A method of splitting off a semiconductor wafer from a semiconductor bottle includes: forming a separation region within the semiconductor boule, the separation region having at least one altered physical property which increases thermo-mechanical stress within the separation region relative to the remainder of the semiconductor boule; and applying an external force to the semiconductor boule such that at least one crack propagates along the separation region and a wafer splits from the semiconductor boule.
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公开(公告)号:US20220208986A1
公开(公告)日:2022-06-30
申请号:US17654807
申请日:2022-03-14
发明人: Chun Hsiung TSAI , Cheng-Yi PENG , Yin-Pin WANG , Kuo-Feng YU , Da-Wen LIN , Jian-Hao CHEN , Shahaji B. MORE
IPC分类号: H01L29/66 , H01L21/265 , H01L21/324 , H01L21/768 , H01L21/223 , H01L21/8234
摘要: A method and structure for doping source and drain (S/D) regions of a PMOS and/or NMOS FinFET device are provided. In some embodiments, a method includes providing a substrate including a fin extending therefrom. In some examples, the fin includes a channel region, source/drain regions disposed adjacent to and on either side of the channel region, a gate structure disposed over the channel region, and a main spacer disposed on sidewalls of the gate structure. In some embodiments, contact openings are formed to provide access to the source/drain regions, where the forming the contact openings may etch a portion of the main spacer. After forming the contact openings, a spacer deposition and etch process may be performed. In some cases, after performing the spacer deposition and etch process, a silicide layer is formed over, and in contact with, the source/drain regions.
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4.
公开(公告)号:US11342431B2
公开(公告)日:2022-05-24
申请号:US16767247
申请日:2019-12-18
发明人: Tongshang Su , Dongfang Wang , Qinghe Wang , Ning Liu , Yongchao Huang , Yu Ji , Zheng Wang , Liangchen Yan
IPC分类号: H01L29/423 , H01L29/786 , H01L29/49 , H01L29/66 , H01L29/40 , H01L21/223 , H01L21/3213 , H01L21/383 , H01L21/4763 , H01L27/12
摘要: A thin film transistor and a manufacturing method thereof, an array substrate and a display device are provided. The thin film transistor is formed on a substrate and includes: an active layer on the substrate, the active layer including a source region, a drain region, and a channel region between the source region and the drain region; a first gate electrode on a side of the active layer away from the substrate; and a second gate electrode on a side of the first gate electrode away from the substrate, wherein a thickness of the first gate electrode is smaller than a thickness of the second gate electrode.
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公开(公告)号:US20220139955A1
公开(公告)日:2022-05-05
申请号:US17576164
申请日:2022-01-14
申请人: Kioxia Corporation
发明人: Yoshiaki FUKUZUMI , Ryota KATSUMATA , Masaru KITO , Masaru KIDOH , Hiroyasu TANAKA , Yosuke KOMORI , Megumi ISHIDUKI , Junya MATSUNAMI , Tomoko FUJIWARA , Hideaki AOCHI , Ryouhei KIRISAWA , Yoshimasa MIKAJIRI , Shigeto OOTA
IPC分类号: H01L27/11582 , H01L29/66 , H01L29/792 , H01L27/11578 , H01L21/223 , H01L21/265 , H01L29/78 , H01L29/04 , H01L29/16 , H01L29/423 , H01L29/49 , H01L29/10
摘要: A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction; a selection gate electrode stacked on the stacked structural unit in the first direction; an insulating layer stacked on the selection gate electrode in the first direction; a first semiconductor pillar piercing the stacked structural unit, the selection gate electrode, and the insulating layer in the first direction, a first cross section of the first semiconductor pillar having an annular configuration, the first cross section being cut in a plane orthogonal to the first direction; a first core unit buried in an inner side of the first semiconductor pillar, the first core unit being recessed from an upper face of the insulating layer; and a first conducting layer of the first semiconductor pillar provided on the first core unit to contact the first core unit.
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公开(公告)号:US11227942B2
公开(公告)日:2022-01-18
申请号:US16111952
申请日:2018-08-24
IPC分类号: H01L29/00 , H01L29/778 , H01L29/423 , H01L29/66 , H01L29/205 , H01L21/3065 , H01L29/20 , H01L21/223 , H01L29/207 , H01L29/51
摘要: A semiconductor device according to an embodiment includes a nitride semiconductor layer; an insulating layer; a first region disposed between the nitride semiconductor layer and the insulating layer and containing at least one element of hydrogen and deuterium; and a second region disposed in the nitride semiconductor layer, adjacent to the first region, and containing fluorine.
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公开(公告)号:US11211249B2
公开(公告)日:2021-12-28
申请号:US13490206
申请日:2012-06-06
IPC分类号: A61K31/35 , H01L21/265 , H01L21/223 , H01L29/66 , H01L29/78
摘要: The invention provides a method for preparing an herbal extract and a flavor system comprising an herbal extract produced by the process. The invention also provides a flavor system comprising an herbal extract comprising thymol, eugenol, carvacrol and eucalyptol. The invention further provides a flavor system comprising a thyme extract having a minimum inhibitory concentration of less than about 3%. Additionally, the invention provides an oral product comprising a flavor system.
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公开(公告)号:US20210265488A1
公开(公告)日:2021-08-26
申请号:US16797097
申请日:2020-02-21
IPC分类号: H01L29/66 , H01L29/78 , H01L29/06 , H01L21/223
摘要: A semiconductor device includes a first source/drain region on an upper surface of a semiconductor substrate that extends along a first direction to define a length and a second direction opposite the first direction to define a width. A channel region extends vertically in a direction perpendicular to the first and second directions from a first end contacting the first source/drain region to an opposing second end contacting a second source/drain region. A gate surrounds a channel portion of the channel region, and a first doped source/drain extension region is located between the first source/drain region and the channel portion. The first doped source/drain extension region has a thickness extending along the vertical direction. A second doped source/drain extension region is located between the second source/drain region and the channel portion. The second doped source/drain extension region has a thickness extending along the vertical direction that matches the first thickness.
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公开(公告)号:US20210242022A1
公开(公告)日:2021-08-05
申请号:US17051739
申请日:2019-05-02
发明人: Michelle SIMMONS , Joris KEIZER
IPC分类号: H01L21/223
摘要: The present disclosure is directed to a methodology for embedding a deterministic number of dopant atoms in a surface portion of a group IV semiconductor lattice. The methodology comprises the steps of: forming one or more lithographic sites on the surface portion; dosing, at a temperature below 100 K, the surface portion using a gas with molecules comprising the dopant atom and hydrogen atoms in a manner such that, a portion of the molecules bonds to the surface portion; and incorporating one or more dopant atoms in a respective lithographic site by transferring an amount of energy to the dopant atoms. The number of dopant atoms incorporated in a lithographic site is deterministic and related to the size of the lithographic site.
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公开(公告)号:US11018259B2
公开(公告)日:2021-05-25
申请号:US15161139
申请日:2016-05-20
发明人: Wei-Yang Lo , Tung-Wen Cheng , Chia-Ling Chan , Mu-Tsang Lin
IPC分类号: H01L29/78 , H01L29/66 , H01L21/223
摘要: A semiconductor device includes a substrate, at least one source drain feature, a gate structure, and at least one gate spacer. The source/drain feature is present at least partially in the substrate. The gate structure is present on the substrate. The gate spacer is present on at least one sidewall of the gate structure. At least a bottom portion of the gate spacer has a plurality of dopants therein.
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