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公开(公告)号：US20240333214A1
公开(公告)日：2024-10-03
申请号：US18615496
申请日：2024-03-25
申请人： ROHM Co., LTD.
发明人： Nozomu Koja , Kenichi Motoki
CPC分类号： H03B5/364 , H03B5/1228 , H03B2200/0082
摘要： Provided is an oscillation circuit including a first terminal to which a first end of a crystal resonator is to be connected, a second terminal to which a second end of the crystal resonator is to be connected, a first resistor connected between the first terminal and the second terminal, a first transistor that is an N-channel transistor whose source is grounded, whose gate is connected to the first terminal, and whose drain is connected to the second terminal, a second transistor that is a P-channel transistor whose drain is connected to the drain of the first transistor, a third transistor that is a P-channel transistor biased by a constant current. A first state in which the first transistor and the second transistor operate as an inverter circuit, and a second state in which the second transistor and the third transistor operate as a current mirror circuit are switchable.
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公开(公告)号：US12101061B1
公开(公告)日：2024-09-24
申请号：US18644202
申请日：2024-04-24
发明人： Liang Wu , Zehui Kang , Chen Yu
IPC分类号： H03B5/12
CPC分类号： H03B5/1212
摘要： A harmonic oscillator realizing harmonic tuning based on harmonic current selection is provided. The harmonic oscillator includes a first MOS transistor M1, a second MOS transistor M2, a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a fifth inductor L5, a first variable capacitor C1, a second capacitor C2, a first fixed capacitor C3, a second fixed capacitor C4 and a switched capacitor array SCA. By suppressing a second harmonic current and promoting a third harmonic current, the invention avoids the design complexity caused by synchronous tuning of two types of harmonic impedances. By suppressing a second harmonic current and promoting a third harmonic current, the design complexity caused by synchronous tuning of two types of harmonic impedances is avoided.
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公开(公告)号：US12101060B2
公开(公告)日：2024-09-24
申请号：US18175509
申请日：2023-02-27
发明人： Bo Xin Yang
CPC分类号： H03B5/06 , H03B5/1228 , H03B5/24 , H03B5/32 , H03B2200/0038
摘要： An oscillator acceleration circuit, configured to accelerate the start-up of an oscillator, wherein the oscillator has an input terminal and an output terminal. The oscillator acceleration circuit includes an inverting amplifier, a feedback resistor and an acceleration circuit; the inverting amplifier has an input terminal and an output terminal correspondingly coupled to the input terminal and the output terminal of the oscillator. The feedback resistor is coupled between the input terminal and the output terminal of the oscillator, and the acceleration circuit is coupled between the input terminal and the output terminal of the oscillator. The acceleration circuit is configured to provide a transfer function, wherein the transfer function is the same as the transfer function provided by a resistor and a capacitor connected in parallel; wherein the resistance of the resistor is less than zero.
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公开(公告)号：US12095420B2
公开(公告)日：2024-09-17
申请号：US18322077
申请日：2023-05-23
CPC分类号： H03B5/1237 , H03B5/1271 , H03B5/129 , H03B5/1293 , H03F3/45475 , H03K5/00006 , H03L7/00
摘要： Circuits and processes for locking a voltage-controlled oscillator (VCO) at a high frequency signal are described. A circuit may include a voltage-controlled oscillator configured to generate a high frequency signal based on a control signal, a dummy load parallel to the voltage-controlled oscillator and configured to receive the control signal via a switch, and a digital-to-analog converter coupled to the voltage-controlled oscillator where the control signal is generated based on an output of the digital-to-analog converter.
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公开(公告)号：US20240291432A1
公开(公告)日：2024-08-29
申请号：US18571089
申请日：2022-06-13
发明人： Jun Seok PARK , Nam Pyo HONG , Kyu Hyun NAM
CPC分类号： H03B5/1284 , H03B5/04 , H03L7/099
摘要： A frequency multiplier is provided. A harmonic generator of the frequency multiplier comprises: a harmonic generating core unit; a first resonant tank which is connected to a first output terminal and a second output terminal of the harmonic generating core unit; and a first feedback circuit which is connected to the first output terminal and the second output terminal of the harmonic generating core unit to change the effective resistance of the first resonant tank.
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公开(公告)号：US12074568B2
公开(公告)日：2024-08-27
申请号：US17941767
申请日：2022-09-09
申请人： Apple Inc.
发明人： Hongrui Wang , Abbas Komijani
CPC分类号： H03B5/1228 , H03B5/1243 , H03L7/0891 , H03L7/093
摘要： Voltage-controlled oscillation circuitry includes multiple cores and multiple mode or gain boosters coupled between the multiple cores. To prevent an undesired operating mode of the voltage-controlled oscillation circuitry from dominating a desired operating mode (e.g., an in-phase operating mode or an out-of-phase operating mode), the mode boosters may increase a desired gain of the desired operating mode and decrease an undesired gain of the undesired operating modes. In particular, mode boosters coupled to terminals of the cores that are associated with the desired operating mode may be enabled, while mode boosters coupled to terminals of the cores that are associated with the undesired operating mode may be disabled.
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公开(公告)号：US20240258971A1
公开(公告)日：2024-08-01
申请号：US18427294
申请日：2024-01-30
发明人： Ryuta Nishizawa , Junichi Takeuchi
CPC分类号： H03B5/04 , H03B5/1206 , H03B5/32 , H03H9/0547 , H03H9/19
摘要： A vibrator device includes: a base having an integrated circuit disposed at a second surface; a vibration element; and a lid having an end surface of a side wall bonded to a first surface of the base at a bonding portion. The integrated circuit includes a first circuit and a second circuit, the first circuit includes a plurality of first circuit elements disposed in a first region ARA, and the second circuit includes a second circuit element disposed in a second region ARB. At this time, the following relations are established.
{
1
-
L
1
A
/
WX
}
≤
0.95
{
1
-
L
2
A
/
WX
}
≤
0.95
{
1
-
L
3
A
/
WY
}
≤
0.95
{
1
-
L
4
A
/
WY
}
≤
0.95
{
1
-
L
1
B
/
WX
}
≤
0.8
{
1
-
L
2
B
/
WX
}
≤
0.8
{
1
-
L
3
B
/
WY
}
≤
0.8
{
1
-
L
4
B
/
WY
}
≤
0.8-
公开(公告)号：US20240213991A1
公开(公告)日：2024-06-27
申请号：US18604116
申请日：2024-03-13
CPC分类号： H03L7/0992 , H03B5/1212 , H03L7/093 , H03B2201/0208
摘要： A phase-locked loop comprises a voltage controlled oscillator. The voltage controlled oscillator comprises an inductor and a capacitor, connected in parallel, and also connected in parallel therewith, a negative resistance structure. A first terminal of the negative resistance structure is connected to respective first terminals of the inductor and the capacitor. A second terminal of the negative resistance structure is connected to respective second terminals of the inductor and the capacitor. The negative resistance structure exhibits a tunable capacitance, such that a frequency of an output of the voltage controlled oscillator can be tuned by a control input signal, and the control input signal is generated in the phase-locked loop. The negative resistance structure comprises first and second transistors.
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公开(公告)号：US11948945B2
公开(公告)日：2024-04-02
申请号：US17611689
申请日：2020-05-18
发明人： Yuto Yakubo , Hitoshi Kunitake , Takayuki Ikeda
CPC分类号： H01L27/1207 , H01L27/1225 , H03B5/12 , H01L27/124 , H04B1/40
摘要： A semiconductor device with a novel structure is provided. The semiconductor device includes an oscillation circuit including a first coil, a second coil, a first capacitor, a second capacitor, a first transistor, and a second transistor and a frequency correction circuit including a third capacitor, a fourth capacitor, a third transistor, a fourth transistor, and a switching circuit. The switching circuit has a function of controlling a conduction state or a non-conduction state of the third transistor and the fourth transistor. The frequency correction circuit is provided above the oscillation circuit and has a function of adjusting an oscillation frequency of the oscillation circuit. The first transistor and the second transistor each include a semiconductor layer containing silicon in a channel formation region. The third transistor and the fourth transistor each include a semiconductor layer containing an oxide semiconductor in a channel formation region.
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公开(公告)号：US20240106442A1
公开(公告)日：2024-03-28
申请号：US17934654
申请日：2022-09-23
发明人： Jianjun YU , Yue CHAO , Tomas O'SULLIVAN , Lai Kan LEUNG
IPC分类号： H03L7/099 , H03B5/12 , H03K3/0231 , H03M1/46
CPC分类号： H03L7/099 , H03B5/1293 , H03K3/0231 , H03M1/46
摘要： Methods and apparatus for storing a control voltage of a phased-locked loop (PLL) when switching from mission mode to standby mode for the PLL, and for restoring the control voltage of the PLL when switching back to mission mode. An example PLL circuit includes a charge pump, a voltage-controlled oscillator (VCO) having a control input coupled to an output of the charge pump via a node, and a tracking circuit coupled to the node. The tracking circuit is generally configured to sample a voltage of the node during a mission mode, save a representation of the sampled voltage before entering a standby mode, and restore the sampled voltage to the node for reentering the mission mode using the saved representation of the sampled voltage.
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