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    3D SEMICIRCULAR VERTICAL NAND STRING WITH SELF ALIGNED FLOATING GATE OR CHARGE TRAP CELL MEMORY CELLS AND METHODS OF FABRICATING AND OPERATING THE SAME
    1.
    发明申请
    3D SEMICIRCULAR VERTICAL NAND STRING WITH SELF ALIGNED FLOATING GATE OR CHARGE TRAP CELL MEMORY CELLS AND METHODS OF FABRICATING AND OPERATING THE SAME 审中-公开
    具有自对准浮动门或充电陷阱细胞存储器电池的3D半圆形垂直NAND晶体及其制造和操作方法

    公开(公告)号：WO2016053453A1

    公开(公告)日：2016-04-07

    申请号：PCT/US2015/042220

    申请日：2015-07-27

    Applicant: SANDISK TECHNOLOGIES INC.

    Inventor： KAI, James K. ,  ZHANG, Yanli ,  CHIEN, Henry ,  ALSMEIER, Johann ,  SEROV, Andrey

    IPC: H01L27/115

    CPC classification number: H01L27/11556 ,  G11C16/0408 ,  G11C16/0483 ,  G11C16/14 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/66666 ,  H01L29/66825 ,  H01L29/7827

    Abstract: A memory device includes a plurality of memory cells arranged in a string substantially perpendicular to the major surface of the substrate (10) in a plurality of device levels, at least one first select gate electrode located between the major surface of the substrate and the plurality of memory cells, at least one second select gate electrode located above the plurality of memory cells, a semiconductor channel (601) having a portion that extends vertically along a direction perpendicular to the major surface, a first memory film (54) contacting a first side of the semiconductor channel, and a second memory film (54) contacting a second side of the semiconductor channel. The second memory film is electrically isolated from the first memory film, and is located at a same level as the first memory film.

    Abstract translation: 存储器件包括多个存储单元，多个存储单元以多个器件级别布置成基本上垂直于衬底（10）的主表面的串，至少一个第一选择栅极位于衬底的主表面和多个器件级之间 存储单元的至少一个第二选择栅极，位于所述多个存储单元上方的至少一个第二选择栅电极，具有沿垂直于所述主表面的方向垂直延伸的部分的半导体沟道（601），与第一存储单元接触的第一存储膜 半导体通道的第二侧和与半导体通道的第二侧接触的第二存储膜（54）。 第二存储膜与第一存储膜电隔离，并且位于与第一存储膜相同的水平。

    THREE DIMENSIONAL NAND DEVICE WITH BIRD'S BEAK CONTAINING FLOATING GATES AND METHOD OF MAKING THEREOF
    3.
    发明申请
    THREE DIMENSIONAL NAND DEVICE WITH BIRD'S BEAK CONTAINING FLOATING GATES AND METHOD OF MAKING THEREOF 审中-公开
    具有BIRD'S BEAK包含浮动门的三维NAND器件及其制造方法

    公开(公告)号：WO2015006152A1

    公开(公告)日：2015-01-15

    申请号：PCT/US2014/045347

    申请日：2014-07-03

    Applicant: SANDISK TECHNOLOGIES, INC.

    Inventor： CHIEN, Henry ,  LEE, Donovan ,  PURAYATH, Vinod R. ,  ZHANG, Yuan ,  KAI, James K. ,  MATAMIS, George

    IPC: H01L27/06 ,  H01L29/788 ,  H01L29/792 ,  H01L27/115

    CPC classification number: H01L27/11556 ,  H01L27/0688 ,  H01L27/11551 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/66825 ,  H01L29/7889 ,  H01L29/7926

    Abstract: A method of making a monolithic three dimensional NAND string including forming a stack of alternating layers of a first material and a second material over a substrate. The first material comprises an electrically insulating material and the second material comprises a semiconductor or conductor material. The method also includes etching the stack to form a front side opening in the stack, forming a blocking dielectric layer over the stack of alternating layers of a first material and a second material exposed in the front side opening, forming a semiconductor or metal charge storage layer over the blocking dielectric, forming a tunnel dielectric layer over the charge storage layer, forming a semiconductor channel layer over the tunnel dielectric layer, etching the stack to form a back side opening in the stack, removing at least a portion of the first material layers and portions of the blocking dielectric layer.

    Abstract translation: 一种制造单片三维NAND串的方法，包括在衬底上形成第一材料和第二材料的交替层的叠层。 第一材料包括电绝缘材料，第二材料包括半导体或导体材料。 该方法还包括蚀刻堆叠以在堆叠中形成前侧开口，在暴露在前侧开口中的第一材料和第二材料的交替层的叠层上形成阻挡电介质层，形成半导体或金属电荷存储 在所述阻挡电介质上方形成在所述电荷存储层上方的隧道介电层，在所述隧道介电层上形成半导体沟道层，蚀刻所述堆叠以在所述堆叠中形成背侧开口，去除所述第一材料的至少一部分 层和介电层的部分。

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