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    METHODS AND DEVICES FOR ELECTROPHOTOGRAPHIC PRINTING
    13.
    发明申请
    METHODS AND DEVICES FOR ELECTROPHOTOGRAPHIC PRINTING 审中-公开
    电子印刷的方法和装置

    公开(公告)号：WO2008055115A1

    公开(公告)日：2008-05-08

    申请号：PCT/US2007/082874

    申请日：2007-10-29

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. ,  RANNOW, Randy K. ,  CAMIS, Tom ,  STASIAK, James W. ,  LAWTON, Robert J.

    Inventor： RANNOW, Randy K. ,  CAMIS, Tom ,  STASIAK, James W. ,  LAWTON, Robert J.

    IPC: G03G15/34

    CPC classification number: G03G15/348

    Abstract: A printing device includes a developer (101, 201) for developing a latent image with toner particles (102); an imaging plate (100, 200, 300, 400, 500) comprising a plurality of pixel plates (105); and a plurality of voltage generators (109, 209, 211) connected respectively to the pixel plates (105). The voltage generators (109, 209, 211) positively bias selected pixel plates (105) to form a latent image that is developed with toner (102) from the developer (101, 201). Another printing device includes a developer (101, 201) for developing a latent image with toner particles (102); an imaging plate (100, 200, 300, 400, 500) comprising a plurality of pixel plates (105) for selectively receiving toner particles (102) from the developer (101, 201); a plurality of voltage generators (109, 209, 211) for biasing respective to pixel plates (105); and a background grid (106, 206, 306, 406) in the imaging plate (100, 200, 300, 400, 500) for preventing toner particles (102) from being deposited in areas between the pixel plates (105), wherein the background grid (106, 206, 306, 406) is connected to a voltage generator (109, 209, 211) for applying a range of biases, positive and negative to the background grid (106, 206, 306, 406). A method of electrophotographic printing in which toner particles (102) are moved electrostatically from a developer (101, 201) to develop a latent image includes positively biasing selected pixel plates (105) of a plurality of pixel plates (105) of an imaging plate (100, 200, 300, 400, 500) to form the latent image; and developing the latent image with the toner particles (102) from the developer (101, 201).

    Abstract translation: 印刷装置包括用于利用调色剂颗粒（102）显影潜像的显影剂（101,201）; 包括多个像素板（105）的成像板（100,200,300,400,500）; 以及分别连接到像素板（105）的多个电压发生器（109,209,211）。 电压发生器（109,209,211）对所选择的像素板（105）进行正偏置以形成由显影剂（101,201）与调色剂（102）显影的潜像。 另一种印刷装置包括用于用调色剂颗粒（102）显影潜像的显影剂（101,201）。 包括用于从显影剂（101,201）选择性地接收调色剂颗粒（102）的多个像素板（105）的成像板（100,200,300,400,500）; 多个电压发生器（109,209,211），用于偏压各像素板（105）; 以及用于防止调色剂颗粒（102）沉积在像素板（105）之间的区域中的成像板（100,200,300,400,500）中的背景格栅（106,206,306,406），其中 背景网格（106,206,306,406）连接到电压发生器（109,209,211），用于向背景网格（106,206,306,406）施加正和负的一系列偏移。 一种电子摄影方法，其中调色剂颗粒（102）从显影剂（101,201）静电移动以显影潜像，包括：主动偏置成像板的多个像素板（105）的所选像素板（105） （100,200,300,400,500）以形成潜像; 以及用显影剂（101,201）用调色剂颗粒（102）显影潜像。

    NANOSTRUCTURE BASED LIGHT EMITTING DEVICES AND ASSOCIATED METHODS
    14.
    发明申请
    NANOSTRUCTURE BASED LIGHT EMITTING DEVICES AND ASSOCIATED METHODS 审中-公开
    基于纳米结构的发光装置及相关方法

    公开(公告)号：WO2007005240A1

    公开(公告)日：2007-01-11

    申请号：PCT/US2006/023547

    申请日：2006-06-15

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. ,  STASIAK, James ,  HERMAN, Gregory S. ,  BENNING, Paul

    Inventor： STASIAK, James ,  HERMAN, Gregory S. ,  BENNING, Paul

    IPC: H01L33/00

    CPC classification number: H01L33/08 ,  B82Y20/00 ,  H01L33/06 ,  H01L33/18

    Abstract: A light emitting device (10) can incorporate a plurality of nanostructures in a light emission layer (12). The device (10) can include a donor electrode (18) and an acceptor electrode (20) which are light transmissive. At least one of the donor electrode (18) and acceptor electrode (20) can include an inorganic material. The light emission layer (12) can be disposed between each of the donor material (18) and the acceptor material (20).

    Abstract translation: 发光器件（10）可以在发光层（12）中并入多个纳米结构。 器件（10）可以包括透光的施主电极（18）和受主电极（20）。 供体电极（18）和受体电极（20）中的至少一个可以包括无机材料。 发光层（12）可以设置在每个施主材料（18）和受主材料（20）之间。

    ARRAY OF NANOSCOPIC MOSFET TRANSISTORS AND FABRICATION
    16.
    发明申请
    ARRAY OF NANOSCOPIC MOSFET TRANSISTORS AND FABRICATION 审中-公开
    纳米MOSFET晶体管和制造阵列

    公开(公告)号：WO2005010981A3

    公开(公告)日：2005-04-14

    申请号：PCT/US2004020675

    申请日：2004-06-25

    Applicant: HEWLETT PACKARD DEVELOPMENT CO ,  GHOZEIL ADAM L ,  STASIAK JAMES ,  PETERS KEVIN F ,  KAWAMOTO GALEN H

    Inventor： GHOZEIL ADAM L ,  STASIAK JAMES ,  PETERS KEVIN F ,  KAWAMOTO GALEN H

    IPC: H01L21/28 ,  H01L21/336 ,  H01L21/8234 ,  H01L29/10 ,  H01L21/8247 ,  H01L27/105 ,  H01L27/115 ,  H01L29/78

    CPC classification number: H01L29/66825 ,  H01L21/28273 ,  H01L21/823437 ,  H01L29/1033 ,  H01L29/66575

    Abstract: A nanoscopic transistor (20) is made by forming an oxide layer on a semiconductor substrate (S10, S20), applying resist (S30), patterning the resist using imprint lithography to form a pattern aligned along a first direction (S40), applying a first ion-masking material over the pattern (S50), selectively lifting it off to leave a first ion mask to form a gate (S60), forming doped regions by implanting a suitable dopant (S70), applying another layer of resist (S90) and patterning the second resist layer using imprint lithography to form a second pattern aligned along a second direction (S100), applying a second ion-masking material over the second pattern, selectively lifting it off to leave a second ion mask defined by the second pattern (S120), and forming second doped regions in the substrate by implanting a suitable second dopant selectively in accordance with the second ion mask (S130). The method may be used to make an array (10 or 15) of nanoscopic transistors (20).

    Abstract translation: 通过在半导体衬底上形成氧化层（S10，S20），涂敷抗蚀剂（S30），使用压印光刻对抗蚀剂进行构图以形成沿着第一方向排列的图案（S40），制成纳米级晶体管（20） （S50），选择性地将其离开离开第一离子掩模以形成栅极（S60），通过注入合适的掺杂剂形成掺杂区域（S70），施加另一层抗蚀剂（S90） 以及使用压印光刻对所述第二抗蚀剂层进行构图以形成沿着第二方向对准的第二图案（S100），在所述第二图案上施加第二离子掩模材料，选择性地将其提起以离开由所述第二图案限定的第二离子掩模 （S120），并且通过根据第二离子掩模选择性地注入合适的第二掺杂剂而在衬底中形成第二掺杂区域（S130）。 该方法可用于制造纳米级晶体管（20）的阵列（10或15）。

    IMPRINT LITHOGRAPHY PROCESS AND SENSOR
    17.
    发明申请
    IMPRINT LITHOGRAPHY PROCESS AND SENSOR 审中-公开
    IMPRINT LITHOGRAPHY PROCESS和SENSOR

    公开(公告)号：WO2005004210A3

    公开(公告)日：2005-03-31

    申请号：PCT/US2004012357

    申请日：2004-04-23

    Applicant: HEWLETT PACKARD DEVELOPMENT CO ,  STASIAK JAMES ,  PETERS KEVIN

    Inventor： STASIAK JAMES ,  PETERS KEVIN

    IPC: B81C1/00 ,  G01N27/414 ,  G03F7/00

    CPC classification number: B81C1/0046 ,  G01N27/4146

    Abstract: This disclosure relates to a process (700) including depositing (704) an imprintable layer (502) on a substrate (306). The imprintable layer (502) is imprinted into the pattern of an imprint-fabricated ribbon (101). The pattern from the imprintable layer (502) is transferred to the substrate (306) to be used to fabricate the imprint-fabricated ribbon (101).

    Abstract translation: 本公开涉及包括在衬底（306）上沉积（704）可压印层（502）的工艺（700）。 可压印层（502）被印刷到压印制带（101）的图案中。 来自可压印层（502）的图案被转移到用于制造压印制带（101）的基板（306）。

    METHODS OF FORMING THIN FILM TRANSISTORS AND RELATED SYSTEMS
    18.
    发明申请
    METHODS OF FORMING THIN FILM TRANSISTORS AND RELATED SYSTEMS 审中-公开
    形成薄膜晶体管的方法及相关系统

    公开(公告)号：WO2004086532A1

    公开(公告)日：2004-10-07

    申请号：PCT/US2004/004576

    申请日：2004-02-13

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY L.P. ,  PETERSON, Paul ,  STASIAK, James

    Inventor： PETERSON, Paul ,  STASIAK, James

    IPC: H01L51/20

    CPC classification number: H01L51/0541 ,  H01L29/41733 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78603 ,  H01L29/78675 ,  H01L29/78678 ,  H01L29/78696 ,  H01L51/0037 ,  H01L51/0052 ,  H01L51/0545

    Abstract: Methods of forming thin film transistors and related systems are described. In one embodiment, a method forms source/drain material (16, 18) over a substrate (10) using a low temperature formation process. A channel layer (24) is formed over the substrate using a low temperature formation process. A gate insulating layer (28) is formed over the substrate using a low temperature formation process. A gate (30) is formed over the substrate using a low temperature formation process. The low temperature formation processes that are utilized are conducted at temperatures that are no greater than about 200-degrees C.

    Abstract translation: 描述形成薄膜晶体管和相关系统的方法。 在一个实施例中，一种方法使用低温形成工艺在衬底（10）上形成源极/漏极材料（16,18）。 使用低温形成工艺在衬底上形成沟道层（24）。 使用低温形成工艺在衬底上形成栅极绝缘层（28）。 使用低温形成工艺在衬底上形成栅极（30）。 使用的低温形成方法在不大于约200℃的温度下进行。

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