公开(公告)号：WO2011099934A1

公开(公告)日：2011-08-18

申请号：PCT/SG2010/000048

申请日：2010-02-10

Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH ,  CHOI, Won Kyoung ,  PREMACHANDRAN, Chiraharikathu Veedu Sankarapillai ,  XIE, Ling ,  LIAO, Ebin ,  ONG, Siong Chiew Joe ,  BAI, Kewu

Inventor： CHOI, Won Kyoung ,  PREMACHANDRAN, Chiraharikathu Veedu Sankarapillai ,  XIE, Ling ,  LIAO, Ebin ,  ONG, Siong Chiew Joe ,  BAI, Kewu

IPC: H01L23/488 ,  H05K1/09

CPC classification number: H01L23/49816 ,  H01L23/49866 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/32145 ,  H01L2224/83193 ,  H01L2224/83801 ,  H01L2224/8381 ,  H01L2224/83825 ,  H01L2224/83894 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/1461 ,  H01L2924/351 ,  H05K3/3463 ,  H05K2201/0338 ,  H01L2924/00 ,  H01L2924/3512

Abstract: In an embodiment, a method of forming a bonded structure is provided. The method may include forming at least one first under bump metallurgy (UBM) structure on a first substrate, forming a first gold layer on the at least one first under bump metallurgy structure; forming a tin layer on the first gold layer, forming an indium layer on the tin layer, forming an inhibition layer configured to inhibit oxygen penetration on the indium layer, and forming at least one second under bump metallurgy structure on a second substrate, forming s second gold layer on the at least one second under bump metallurgy structure; and bringing the inhibition layer into contact with the second gold layer at a predetermined temperature to form a resultant intermetallic structure between the first substrate and the second substrate thereby bonding the first substrate to the second substrate and forming the bonded structure.

Abstract translation: 在一个实施例中，提供了形成接合结构的方法。 该方法可以包括在第一衬底上形成至少一个第一凸点下金属（UBM）结构，在该至少一个第一凸点下金属结构上形成第一金层; 在所述第一金层上形成锡层，在所述锡层上形成铟层，形成抑制氧层在所述铟层上的渗透的抑制层，以及在第二基板上形成至少一个第二凸块下金属结构，形成s 在所述至少一个第二凸块下金属结构上的第二金层; 并且使所述抑制层与所述第二金层在预定温度下接触以在所述第一基板和所述第二基板之间形成所得的金属间结构，从而将所述第一基板接合到所述第二基板并形成所述接合结构。

公开(公告)号：WO2011037534A1

公开(公告)日：2011-03-31

申请号：PCT/SG2009/000355

申请日：2009-09-25

Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH ,  SEIKO INSTRUMENTS INC. ,  PREMACHANDRAN, Chirayarikathu Veedu Sankarapillai ,  KUMAR, Rakesh ,  RANGANATHAN, Nagarajan ,  CHOI, Won Kyoung ,  LIAO, Ebin ,  MITSUOKA, Yasuyuki ,  TAKAHASHI, Hiroshi ,  MITSUSUE, Ryuta

Inventor： PREMACHANDRAN, Chirayarikathu Veedu Sankarapillai ,  KUMAR, Rakesh ,  RANGANATHAN, Nagarajan ,  CHOI, Won Kyoung ,  LIAO, Ebin ,  MITSUOKA, Yasuyuki ,  TAKAHASHI, Hiroshi ,  MITSUSUE, Ryuta

IPC: B81B7/02 ,  H01L21/44 ,  H01L23/48

CPC classification number: H01L21/6836 ,  B81B2207/092 ,  B81B2207/093 ,  B81B2207/097 ,  B81C2203/019 ,  H01L24/48 ,  H01L24/94 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/16195 ,  H01L2924/16235 ,  H01L2924/16315 ,  H01L2924/19041 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: In an embodiment, a wafer level package may be provided. The wafer level package may include a device wafer including a MEMS device, a cap wafer disposed over the device wafer, at least one first interconnect disposed between the device wafer and the cap wafer and configured to provide an electrical connection between the device wafer and the cap wafer, and a conformal sealing ring disposed between the device wafer and the cap wafer and configured to surround the at least one first interconnect and the MEMS device so as to provide a conformally sealed environment for the at least one first interconnect and the MEMS device, wherein the conformal sealing ring may be configured to conform to a respective suitable surface of the device wafer and the cap wafer when the device wafer may be bonded to the cap wafer. A method of forming a wafer level package may also be provided.

Abstract translation: 在一个实施例中，可以提供晶片级封装。 晶片级封装可以包括包括MEMS器件的器件晶片，设置在器件晶片上的帽晶片，设置在器件晶片和帽晶片之间的至少一个第一互连，并且被配置为在器件晶片和晶片级封装之间提供电连接 帽状晶片和保形密封环，其设置在器件晶片和盖晶片之间并且被配置为围绕至少一个第一互连和MEMS器件，以便为至少一个第一互连和MEMS器件提供保形密封的环境 ，其中所述保形密封环可以被配置为当所述器件晶片可以结合到所述盖晶片时，使其符合所述器件晶片和所述盖晶片的相应合适的表面。 还可以提供一种形成晶片级封装的方法。