公开(公告)号：WO2010059724A3

公开(公告)日：2010-09-10

申请号：PCT/US2009064987

申请日：2009-11-18

Applicant: QUALCOMM INC ,  PAN YUANCHENG CHRISTOPHER ,  SWEENEY FIFIN ,  PAYNTER CHARLIE ,  BOWLES KEVIN R ,  GONZALEZ JASON R

Inventor： PAN YUANCHENG CHRISTOPHER ,  SWEENEY FIFIN ,  PAYNTER CHARLIE ,  BOWLES KEVIN R ,  GONZALEZ JASON R

IPC: H01L23/498 ,  H01L23/50 ,  H01L23/522 ,  H01L23/528

CPC classification number: H01L23/49816 ,  H01L23/50 ,  H01L23/5222 ,  H01L23/5286 ,  H01L23/642 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/32145 ,  H01L2224/48145 ,  H01L2924/00011 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package has a capacitor die and a packaging substrate. The capacitor die is coupled to circuitry on a front or back side of a die coupled to the packaging substrate for providing decoupling capacitance. In one example, the capacitor die is coupled to a land side of the packaging substrate in an area depopulated of a packaging array and adjacent to the packaging array. In another example, the capacitor die may be stacked on the die and coupled through wire bonds to circuitry on the die. The capacitor die reduces impedance of the integrated circuit allowing operation at higher frequencies.

Abstract translation: 半导体封装具有电容器芯片和封装衬底。 电容器裸片耦合到耦合到封装衬底的裸片的正面或背面上的电路以提供去耦电容。 在一个示例中，电容器管芯在封装阵列的不填充区域中并且与封装阵列相邻地耦合到封装衬底的焊盘侧。 在另一个示例中，电容器管芯可以堆叠在管芯上并且通过引线键合耦合到管芯上的电路。 电容器管芯降低了集成电路的阻抗，允许在更高的频率下工作。

公开(公告)号：WO2011028806A1

公开(公告)日：2011-03-10

申请号：PCT/US2010/047538

申请日：2010-09-01

Applicant: QUALCOMM INCORPORATED ,  PAN, Yuancheng Christopher ,  CHUA-EOAN, Lew G. ,  ZHU, Zhi ,  ZHANG, Junmou

Inventor： PAN, Yuancheng Christopher ,  CHUA-EOAN, Lew G. ,  ZHU, Zhi ,  ZHANG, Junmou

IPC: H01L23/64 ,  H01L25/10 ,  H01L25/16

CPC classification number: H01L25/16 ,  H01L23/642 ,  H01L23/645 ,  H01L25/0652 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H02M3/00 ,  H05K1/0262 ,  H05K1/141 ,  H05K1/185

Abstract: A semiconductor packaging system has a packaging substrate into which inductors and/or capacitors are partially or completely embedded. An active portion of a voltage regulator is mounted on the packaging substrate and supplies regulated voltage to a die also mounted on the packaging substrate. Alternatively, the active portion of the voltage regulator is integrated into the die the voltage regulator supplies voltage to. The voltage regulator cooperates with the inductors and/or capacitors to supply voltage to the die. The inductors may be through vias in the packaging substrate. For additional inductance, through vias in a printed circuit board on which the packaging substrate is mounted may couple to the through vias in the packaging substrate.

Abstract translation: 半导体封装系统具有其中部分或完全嵌入电感器和/或电容器的封装衬底。 电压调节器的有源部分安装在封装基板上，并将调节的电压提供给也安装在封装基板上的管芯。 或者，电压调节器的有源部分集成到管芯中，电压调节器将电压提供给。 电压调节器与电感器和/或电容器配合以向模具提供电压。 电感器可以穿过封装衬底中的通孔。 对于额外的电感，通过安装封装衬底的印刷电路板中的通孔可以耦合到封装衬底中的通孔。

公开(公告)号：WO2010059724A2

公开(公告)日：2010-05-27

申请号：PCT/US2009/064987

申请日：2009-11-18

Applicant: QUALCOMM INCORPORATED ,  PAN, Yuancheng, Christopher ,  SWEENEY, Fifin ,  PAYNTER, Charlie ,  BOWLES, Kevin, R. ,  GONZALEZ, Jason, R.

Inventor： PAN, Yuancheng, Christopher ,  SWEENEY, Fifin ,  PAYNTER, Charlie ,  BOWLES, Kevin, R. ,  GONZALEZ, Jason, R.

IPC: H01L23/498 ,  H01L23/50

CPC classification number: H01L23/49816 ,  H01L23/50 ,  H01L23/5222 ,  H01L23/5286 ,  H01L23/642 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/32145 ,  H01L2224/48145 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package has a capacitor die and a packaging substrate. The capacitor die is coupled to circuitry on a front or back side of a die coupled to the packaging substrate for providing decoupling capacitance. In one example, the capacitor die is coupled to a land side of the packaging substrate in an area depopulated of a packaging array and adjacent to the packaging array. In another example, the capacitor die may be stacked on the die and coupled through wire bonds to circuitry on the die. The capacitor die reduces impedance of the integrated circuit allowing operation at higher frequencies.

Abstract translation: 半导体封装具有电容器裸片和封装衬底。 电容器管芯耦合到耦合到封装衬底的管芯的前侧或后侧上的电路，用于提供去耦电容。 在一个示例中，电容器裸片在包装阵列的填充区域中并且与封装阵列相邻的区域耦合到封装衬底的接地侧。 在另一示例中，电容器管芯可以堆叠在管芯上并且通过引线接合耦合到管芯上的电路。 电容器管芯降低了集成电路的阻抗，允许在较高频率下工作。

公开(公告)号：WO2012138924A1

公开(公告)日：2012-10-11

申请号：PCT/US2012/032422

申请日：2012-04-05

Applicant: HUAWEI TECHNOLOGIES CO., LTD. ,  PAN, Yuancheng Christopher ,  YU, Tian ,  WANG, Chongyang ,  HUANG, Chunxing ,  XU, Zhenhua

Inventor： PAN, Yuancheng Christopher ,  YU, Tian ,  WANG, Chongyang ,  HUANG, Chunxing ,  XU, Zhenhua

IPC: H04B7/204

CPC classification number: H04L49/40 ,  H04L49/45

Abstract: A system and method for expanding a chassis network using soft interconnects, including a hybrid chassis 500 comprising a first fabric card 560 comprising a first switching fabric 565, a second fabric card 570 comprising a second switching fabric 575, a first set of line cards 510-520 coupled to the first switching fabric 560 via a first set of hard connections (solid arrowheads), and coupled to an interface 576 associated with the second switching fabric 575 via a soft connection 580, and a second set of line cards 530-540 coupled to the second fabric card 570.

Abstract translation: 一种用于使用软互连来扩展机箱网络的系统和方法，包括混合机箱500，其包括包括第一交换结构565的第一结构卡560，包括第二交换结构575的第二组织卡570，第一组线卡510 -520经由第一组硬连接（实心箭头）耦合到第一交换结构560，并且经由软连接580耦合到与第二交换结构575相关联的接口576，以及第二组线卡530-540 耦合到第二织物卡570。

公开(公告)号：WO2012003169A1

公开(公告)日：2012-01-05

申请号：PCT/US2011/042102

申请日：2011-06-28

Applicant: QUALCOMM INCORPORATED ,  PAN, Yuancheng Christopher ,  SWEENEY, Fifin ,  CHUA-EOAN, Lew G. ,  ZHU, Zhi ,  ZHANG, Junmou

Inventor： PAN, Yuancheng Christopher ,  SWEENEY, Fifin ,  CHUA-EOAN, Lew G. ,  ZHU, Zhi ,  ZHANG, Junmou

IPC: H01L23/64 ,  H01L25/065 ,  H01L25/18

CPC classification number: H01L23/5384 ,  H01L23/49822 ,  H01L23/642 ,  H01L23/645 ,  H01L24/02 ,  H01L24/16 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/02371 ,  H01L2224/05624 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/48227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2924/00014 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/30107 ,  H05K1/11 ,  H05K1/165 ,  H05K1/181 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A stacked integrated circuit includes a first tier IC and a second tier IC. Active faces of the first tier IC and the second tier IC face each other. An interconnect structure, such as microbumps, couples the first tier IC to the second tier IC. An active portion of a voltage regulator is integrated in the first semiconductor IC and coupled to passive components (for example a capacitor or an inductor) embedded in a packaging substrate on which the stacked IC is mounted. The passive components may be multiple through vias in the packaging substrate providing inductance to the active portion of the voltage regulator. The inductance provided to the active portion of the voltage regulator is increased by coupling the through via in the packaging substrate to through vias in a printed circuit board that the packaging substrate is mounted on.

Abstract translation: 堆叠式集成电路包括第一层IC和第二层IC。 第一层IC和第二层IC的主动面相互面对。 互连结构，例如microbumps，将第一层IC耦合到第二层IC。 电压调节器的有源部分集成在第一半导体IC中并耦合到嵌入在其上安装有堆叠IC的封装衬底中的无源组件（例如，电容器或电感器）。 无源部件可以是在封装衬底中的多个通孔，为电压调节器的有源部分提供电感。 通过将封装衬底中的通孔耦合到安装有封装衬底的印刷电路板中的通孔，增加了提供给电压调节器的有源部分的电感。

公开(公告)号：WO2010151814A1

公开(公告)日：2010-12-29

申请号：PCT/US2010/040061

申请日：2010-06-25

Applicant: QUALCOMM Incorporated ,  SWEENEY, Fifin ,  VELEZ, Mario, Francisco ,  PAN, Yuancheng, Christopher ,  GU, Shiqun

Inventor： SWEENEY, Fifin ,  VELEZ, Mario, Francisco ,  PAN, Yuancheng, Christopher ,  GU, Shiqun

IPC: H01L23/64 ,  H01L23/498 ,  H01L23/50 ,  H01G4/33 ,  H01G4/40

CPC classification number: H01L23/642 ,  H01G4/33 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L25/0657 ,  H01L2224/0554 ,  H01L2224/05548 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: An integrated circuit package includes a decoupling capacitor. The integrated circuit package also includes a packaging substrate. The decoupling capacitor is at least partially embedded in the packaging substrate. The integrated circuit package further includes a die mounted to the packaging substrate. The die is coupled to the decoupling capacitor. The die receiving substantially instantaneous current from the decoupling capacitor.

Abstract translation: 集成电路封装包括去耦电容器。 集成电路封装还包括封装基板。 去耦电容器至少部分地嵌入在封装衬底中。 集成电路封装还包括安装到封装衬底的管芯。 管芯耦合到去耦电容器。 芯片从去耦电容器接收基本上瞬时的电流。