公开(公告)号：WO2020113858A1

公开(公告)日：2020-06-11

申请号：PCT/CN2019/079284

申请日：2019-03-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： SONG, Wei ,  YAN, Liangchen ,  ZHAO, Ce ,  KIM, Heekyu ,  DING, Yuankui ,  CHENG, Leilei ,  HU, Yingbin ,  LI, Wei ,  ZHANG, Yang

IPC: H01L27/32

Abstract: A pixel structure may include a base substrate (10); a first insulating island (12) on a side of the base substrate (10); a first electrode (13) on a side of the first insulating island (12) opposite from the base substrate (10); a second electrode (11) on the base substrate (10) and at a peripheral area of the first insulating island (12); an active layer (14) electrically connected to the first electrode (13) and the second electrode (11); a second insulating layer (15) on a side of the active layer (14) opposite from the base substrate (10); a gate electrode (16) on a side of the second insulating layer (15) opposite from the base substrate (10); and a third insulating layer (17) on a side of the gate electrode (16) opposite from the base substrate (10).

公开(公告)号：WO2020119249A1

公开(公告)日：2020-06-18

申请号：PCT/CN2019/112218

申请日：2019-10-21

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： WANG, Qinghe ,  WANG, Dongfang ,  SU, Tongshang ,  LIU, Ning ,  LI, Guangyao ,  HUANG, Yongchao ,  ZHANG, Yang ,  SONG, Jiawen ,  LUO, Zhiwen ,  YAN, Liangchen

IPC: H01L29/786 ,  H01L29/49 ,  H01L29/423 ,  H01L27/32 ,  H01L21/336

Abstract: A thin-film transistor includes: an active layer having a first side and a second side opposing to the first side; a main gate electrode spaced from the active layer on the first side, and including a conductive material; an auxiliary gate electrode spaced from the active layer on the second side, wherein the auxiliary gate electrode includes a phase change material having a phase change temperature; the auxiliary gate electrode is configured to have a transition between insulating and conductive based on a temperature of the auxiliary gate electrode; and the main gate electrode and the auxiliary gate electrode are electrically coupled to each other when the auxiliary gate electrode is conductive.

公开(公告)号：WO2017121243A1

公开(公告)日：2017-07-20

申请号：PCT/CN2016/112952

申请日：2016-12-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  SOUTH CHINA UNIVERSITY OF TECHNOLOGY

Inventor： YAN, Liangchen ,  YUAN, Guangcai ,  XU, Xiaoguang ,  WANG, Lei ,  PENG, Junbiao ,  LAN, Linfeng

IPC: H01L29/24 ,  H01L29/786

CPC classification number: H01L29/78603 ,  H01L21/34 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/7869

Abstract: An active layer, a thin film transistor, an array substrate, and a display apparatus, and fabrication methods thereof are provided. A method for fabricating an active layer (4) in a thin film transistor is provided by forming a thin film by a direct current (DC) sputtering process; and etching the thin film to form the active layer (4). The thin film is made of a material selected to provide the active layer (4) with a carrier concentration of at least approximately 1x10 17 cm -3 and a carrier mobility of at least approximately 20 cm 2 /Vs.

Abstract translation: 提供有源层，薄膜晶体管，阵列基板和显示装置及其制造方法。 通过直流（DC）溅射工艺形成薄膜来提供用于在薄膜晶体管中制造有源层（4）的方法; 和蚀刻该薄膜以形成有源层（4）。 该薄膜由选择用于提供载流子浓度至少约为1×10 17 cm -3和载流子迁移率为的有源层（4）的材料制成， 至少约20cm 2 / Vs。

公开(公告)号：WO2018076960A1

公开(公告)日：2018-05-03

申请号：PCT/CN2017/102106

申请日：2017-09-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  SOUTH CHINA UNIVERSITY OF TECHNOLOGY

Inventor： YAN, Liangchen ,  XU, Xiaoguang ,  WANG, Lei ,  PENG, Junbiao ,  LAN, Linfeng

IPC: H01L51/05 ,  H01L51/30 ,  H01L51/40

Abstract: A method for manufacturing a semiconductor thin film includes sequentially forming a first semiconductor layer, an intermediate layer, and a second semiconductor layer over a substrate. The first semiconductor layer and the second semiconductor layer can be one and another of an n-type semiconductor layer and a p-type semiconductor layer. At least one of the first semiconductor layer, the intermediate layer, or the second semiconductor layer is formed via a solution process. The n-type semiconductor layer can include indium oxide. The intermediate layer can include a self-assembly material. The p-type semiconductor layer can include a p-type organic semiconductor material, and can be pentacene. On the basis, a semiconductor thin film manufactured thereby, a semiconductor thin film transistor, and a display apparatus, are also disclosed.

Abstract translation: 用于制造半导体薄膜的方法包括在衬底上顺序形成第一半导体层，中间层和第二半导体层。 第一半导体层和第二半导体层可以是n型半导体层和p型半导体层中的一个和另一个。 通过溶液工艺形成第一半导体层，中间层或第二半导体层中的至少一个。 该n型半导体层可以包括氧化铟。 中间层可以包括自组装材料。 p型半导体层可以包括p型有机半导体材料，并且可以是并五苯。 在此基础上，还公开了由其制造的半导体薄膜，半导体薄膜晶体管和显示装置。

公开(公告)号：WO2017124672A1

公开(公告)日：2017-07-27

申请号：PCT/CN2016/082904

申请日：2016-05-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  SOUTH CHINA UNIVERSITY OF TECHNOLOGY

Inventor： YAN, Liangchen ,  YUAN, Guangcai ,  XU, Xiaoguang ,  WANG, Lei ,  PENG, Junbiao ,  LAN, Linfeng

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L29/7869

Abstract: A thin-film transistor (TFT) is provided in this disclosure, which comprises Sn-doped ZrO 2 . This oxide semiconductor material can be used in a semiconductor layer of a TFT, and a mass percentage of Sn doped in the ZrO 2 is about 1％-95％. A semiconductor layer comprising Sn-doped ZrO 2 exhibits higher acid tolerance after annealing. This disclosure also provides a method for fabricating a TFT, which comprises: (i) forming a semiconductor layer, wherein the semiconductor layer comprises Sn-doped ZrO 2 , and (ii) annealing the semiconductor layer.

Abstract translation: 本发明提供了一种薄膜晶体管（TFT），其包括Sn掺杂的ZrO 2。 该氧化物半导体材料可以用于TFT的半导体层中，并且在ZrO 2中掺杂的Sn的质量百分比为大约1％-95％。 包含Sn掺杂的ZrO 2的半导体层在退火后表现出较高的耐酸性。 本发明还提供了一种制造TFT的方法，其包括：（i）形成半导体层，其中所述半导体层包含Sn掺杂的ZrO 2，和（ii）对所述半导体层进行退火。 / p>

公开(公告)号：WO2016180016A1

公开(公告)日：2016-11-17

申请号：PCT/CN2015/097050

申请日：2015-12-10

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： YAN, Liangchen

IPC: H01L21/34 ,  H01L29/786

CPC classification number: H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02664 ,  H01L21/423 ,  H01L21/477 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/786

Abstract: The disclosure provides a method of manufacturing a thin film transistor on a base substrate by patterning an active layer comprising a metal oxynitride, and treating the active layer with a plasma comprising oxygen.

Abstract translation: 本公开提供了一种通过对含有金属氮氧化物的活性层进行构图并用包含氧的等离子体处理活性层来在基底衬底上制造薄膜晶体管的方法。

公开(公告)号：WO2021081992A1

公开(公告)日：2021-05-06

申请号：PCT/CN2019/115088

申请日：2019-11-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： SONG, Wei ,  YAN, Liangchen ,  ZHAO, Ce ,  KIM, Heekyu ,  DING, Yuankui ,  CHENG, Leilei ,  HU, Yingbin ,  LI, Wei ,  LI, Guangyao ,  WANG, Qinghe

IPC: H01L29/786

Abstract: The present disclosure is related to a thin film transistor. The thin film transistor may include an active layer; a gate insulating layer on the active layer; and a gate and a plurality of metal films on the gate insulating layer. The plurality of metal films may be spaced apart from the gate, and insulated from the gate and the active layer.

公开(公告)号：WO2017045135A1

公开(公告)日：2017-03-23

申请号：PCT/CN2015/089658

申请日：2015-09-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： XIE, Dini ,  WANG, Meili ,  XU, Xianbin ,  YAN, Liangchen ,  ZHANG, Xiaojin

IPC: H01L29/786 ,  H01L21/336

CPC classification number: H01L29/78696 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/473 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78618 ,  H01L29/7869

Abstract: A method for forming a thin film transistor array substrate (110) comprises forming an active layer (140) using a zinc target under an environment of oxygen and nitrogen in a sputtering chamber, and forming a source/drain buffer layer (151/152) on the active layer (140) using the zinc target by a sputtering process in the sputtering chamber under an environment containing one of oxygen and nitrogen. A thin film transistor array substrate (110) comprises an active layer (140), a source/drain buffer layer (151/152) on and in contact with the active layer (140), wherein the active layer (140) is made of oxynitride compound of zinc, and the source/drain buffer layer (151/152) is made of one of an oxide and a nitride of zinc. A display device comprising the thin film transistor array substrate (110) is also provided.

Abstract translation: 一种形成薄膜晶体管阵列基板（110）的方法包括：在溅射室内，在氧和氮环境下使用锌靶形成有源层（140），形成源/漏缓冲层（151/152） 在包含氧和氮的环境的环境中，通过溅射工艺在溅射室中使用锌靶在有源层（140）上。 薄膜晶体管阵列基板（110）包括有源层（140），与有源层（140）接触并与其接触的源极/漏极缓冲层（151/152），其中有源层（140）由 锌的氮氧化物化合物和源极/漏极缓冲层（151/152）由锌的氧化物和氮化物之一构成。 还提供了包括薄膜晶体管阵列基板（110）的显示装置。

公开(公告)号：WO2017024882A1

公开(公告)日：2017-02-16

申请号：PCT/CN2016/085093

申请日：2016-06-07

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： WANG, Meili ,  YAN, Liangchen

IPC: H01L29/417 ,  H01L29/786 ,  H01L27/12

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/42356 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78618

Abstract: Provided is a thin film transistor. The thin film transistor includes an active layer (6), and a source electrode (4) and a drain electrode (5) on the active layer (6). Each of the source electrode (4) and the drain electrode (5) includes a metal electrode sub-layer (1) and a diffusion barrier sub-layer (2) made of a material comprising M1O a N b , wherein M1 is single metal or a combination of metals, a≥0, and b＞0, between the metal electrode sub-layer (1) and the active layer (6) for preventing diffusion of metal electrode material into the active layer (6).

Abstract translation: 提供一种薄膜晶体管。 薄膜晶体管包括有源层（6），以及在有源层（6）上的源电极（4）和漏电极（5）。 源电极（4）和漏电极（5）中的每一个包括金属电极子层（1）和由包含M1O aN b的材料制成的扩散阻挡子层（2），其中M1是单金属或 金属电极子层（1）和有源层（6）之间的金属a≥0和b> 0的组合，用于防止金属电极材料扩散到有源层（6）中。

公开(公告)号：WO2017000503A1

公开(公告)日：2017-01-05

申请号：PCT/CN2015/096946

申请日：2015-12-10

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  SOUTH CHINA UNIVERSITY OF TECHNOLOGY

Inventor： YUAN, Guangcai ,  YAN, Liangchen ,  XU, Xiaoguang ,  WANG, Lei ,  PENG, Junbiao ,  LAN, Linfeng

IPC: H01L29/26 ,  H01L21/02

CPC classification number: H01L27/1222 ,  H01L21/02565 ,  H01L21/02631 ,  H01L29/045 ,  H01L29/26 ,  H01L29/66969 ,  H01L29/7869

Abstract: A metal oxide semiconductor thin film, a thin film transistor (TFT), methods for fabricating the metal oxide semiconductor thin film and the TFT, and a display apparatus are provided. In some embodiments, the metal oxide semiconductor comprises: a first metal element, a second metal element and a third metal element, wherein: the first metal element is at least one of scandium, yttrium, aluminum, indium, and a rare earth element; the second metal element is at least one of calcium, strontium, and barium; and the third metal element is at least one of titanium and tin.

Abstract translation: 提供金属氧化物半导体薄膜，薄膜晶体管（TFT），制造金属氧化物半导体薄膜和TFT的方法以及显示装置。 在一些实施例中，金属氧化物半导体包括：第一金属元件，第二金属元件和第三金属元件，其中：第一金属元素是钪，钇，铝，铟和稀土元素中的至少一种; 第二金属元素是钙，锶和钡中的至少一种; 第三金属元素是钛和锡中的至少一种。