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    ELECTRONIC DEVICE, ESPECIALLY A FIELD DEVICE
    1.
    发明申请
    ELECTRONIC DEVICE, ESPECIALLY A FIELD DEVICE 审中-公开
    电子器件，尤其是现场设备

    公开(公告)号：WO0213160A3

    公开(公告)日：2007-10-25

    申请号：PCT/DE0102921

    申请日：2001-08-01

    Applicant: SIEMENS AG ,  HAUSCHULZ THOMAS ,  PRAMANIK ROBIN

    Inventor： HAUSCHULZ THOMAS ,  PRAMANIK ROBIN

    IPC: G08C19/02 ,  H04B3/54 ,  H04L27/12 ,  H04L27/156

    CPC classification number: G08C19/02 ,  G05B2219/31116 ,  G05B2219/31121 ,  H04B3/548 ,  H04B2203/5416 ,  H04L27/12 ,  H04L27/1563

    Abstract: The invention relates to an electronic device, especially a field device, comprising an interface for communicating over a two-wire line. An analog-digital converter (18) is provided for converting a modulated receive signal (15) into a digital value (19). The microprocessor (20) determines the transmitted data (27) by using the temporal sequence of the digital values (19) and, by using the data (36) to be transmitted, determines a temporal sequence of digital values (38) in accordance with the respective modulation method. As a result, an ASIC for realizing a modem is rendered unnecessary.

    Abstract translation: 本发明涉及一种电子设备，尤其是现场设备经由双线线路进行通信的接口。 模拟/数字转换器（18）被设置用于（15）调制的接收信号转换成数字值（19）。 通过数字值的时间序列（19）所发送的数据（27）和数据的基础上确定的微处理器（20）来传送（36）在根据所述相应的调制方法中，数字值（38）的时间序列。 这对于实现一个调制解调器的ASIC是不必要的。

    CONVERTER CIRCUIT FOR A LIMITER RECEIVER STRUCTURE AND METHOD FOR CONVERTING A SIGNAL IN A LIMITER RECEIVER STRUCTURE
    2.
    发明申请
    CONVERTER CIRCUIT FOR A LIMITER RECEIVER STRUCTURE AND METHOD FOR CONVERTING A SIGNAL IN A LIMITER RECEIVER STRUCTURE 审中-公开
    转换器电路对限接收机结构和转换过程信号限制器接收机结构

    公开(公告)号：WO2004066577A3

    公开(公告)日：2004-11-04

    申请号：PCT/DE0304278

    申请日：2003-12-23

    Applicant: INFINEON TECHNOLOGIES AG ,  FELBECKER BRITTA ,  HAMMES MARKUS ,  SPETH MICHAEL

    Inventor： FELBECKER BRITTA ,  HAMMES MARKUS ,  SPETH MICHAEL

    IPC: H04L27/156 ,  H04L27/233

    CPC classification number: H04L27/1563 ,  H04L27/2337

    Abstract: The invention relates to a converter circuit comprising a limiter (L) which converts an analog receiver signal into a discrete value limiter signal. An evaluation circuit (AW) determines a zero crossing distance signal from the temporal distances between successive crossover of the limiter signal. A synthesis circuit (PSY) calculates a digital processing signal, the crossovers thereof corresponding to the respective limiter signal. The pulse form thereof has a lower spectral width than a rectangular pulse.

    Abstract translation: A转换器电路包括一个限幅器（L），其将接收到的信号转换成一个值离散限幅信号的模拟。 评估电路（AW）从限幅信号，过零点距离信号的连续的过零点之间的时间间隔来确定。 的合成电路（PSY），计算数字处理信号，其过零点对应于限幅信号的和脉冲形状具有较小的频谱宽度比的矩形脉冲。

    DIGITALER FSK-DEMODULATOR
    3.
    发明申请
    DIGITALER FSK-DEMODULATOR 审中-公开
    DIGITAL FSK解调

    公开(公告)号：WO2004002097A1

    公开(公告)日：2003-12-31

    申请号：PCT/DE2003/001886

    申请日：2003-06-06

    Applicant: ROBERT BOSCH GMBH ,  BOLZ, Peter

    Inventor： BOLZ, Peter

    IPC: H04L27/156

    CPC classification number: H04L27/1563

    Abstract: Die Erfindung betrifft ein Verfahren zur Übertragung binärer Nutzdaten zwischen einer ersten Einheit und einer zweiten Einheit, wobei die Nutzdaten zur Über­tragung mittels eines FSK (Frequenz-Shift-Keying)-Ver ­ fahrens auf Senderseite moduliert und auf Empfänger­seite demoduliert werden. Es ist vorgesehen, dass die Nutzdaten in Abhängigkeit ihres logischen Signalzustandes auf Senderseite mit einer ersten Frequenz (f1) oder einer zweiten Fre­quenz (f2) moduliert werden und auf Empfangsseite die modulierten Nutzdaten einen Zähler takten, der in Abhängigkeit einer Steuerpulsfrequenz ausgelesen und zurückgesetzt wird, wobei der ausgelesene Zählerstand den Signalzustand des demodulierten Nutzsignals defi­niert.

    Abstract translation: 本发明涉及一种用于在第一单元和第二单元之间的二进制用户数据的传输的方法，其特征在于，通过一个FSK方式调制用于发送的用户数据（频移键控）-ver <>在发送器侧运行，并解调在接收器侧。 可以预期的是，用户数据在发送侧它们的逻辑信号状态的依赖性在第一频率（F1）或具有第二频率（F2）调制，并且调制后的用户数据计时在接收端，这是在响应读出到控制脉冲和复位的计数器 其中所述读出的计数定义解调的有用信号的信号状态。

    FSK DEMODULATOR USING A SUPER LINEAR INTEGRATOR
    5.
    发明申请
    FSK DEMODULATOR USING A SUPER LINEAR INTEGRATOR 审中-公开
    使用超线性积分器的FSK DEMODULATOR

    公开(公告)号：WO99017508A1

    公开(公告)日：1999-04-08

    申请号：PCT/US1998/020274

    申请日：1998-09-28

    IPC: H04L27/156

    CPC classification number: H04L27/1563

    Abstract: A method of and apparatus for decoding an encoded signal are disclosed. A first bit of the encoded signal is received and integrated with a super linear integrator (502) to provide a first integration signal (120, 122). A first reference signal (130) is provided as a function of a previous integration signal (126) associated with a previous bit of the encoded signal by multiplying the previous integration signal by an amount greater than one if the previous bit has a first value, and by multiplying the previous integration signal by an amount less than one if the previous bit has a second value. The first integration signal (120) is compared to the first reference signal (130) and a first bit of an output signal (142) is provided based upon the comparison. The first bit of the output signal is indicative of information encoded in the first bit of the encoded signal.

    Abstract translation: 公开了一种用于对编码信号进行解码的方法和装置。 编码信号的第一位被接收并与超线性积分器（502）集成以提供第一积分信号（120,122）。 如果前一位具有第一值，则通过将先前的积分信号乘以大于1的量，将第一参考信号（130）作为与先前的编码信号的位相关联的先前积分信号（126）的函数来提供， 并且如果前一位具有第二值，则将先前积分信号乘以小于1的积分信号。 将第一积分信号（120）与第一参考信号（130）进行比较，并且基于该比较来提供输出信号（142）的第一位。 输出信号的第一位表示编码在编码信号的第一位中的信息。

    SELECTION STAGE OF THE AC SIGNAL HAVING THE GREATER AMPLITUDE
    6.
    发明申请
    SELECTION STAGE OF THE AC SIGNAL HAVING THE GREATER AMPLITUDE 审中-公开
    具有较大幅度的交流信号的选择阶段

    公开(公告)号：WO1981002714A1

    公开(公告)日：1981-10-01

    申请号：PCT/FR1981000039

    申请日：1981-03-17

    Applicant: JEUMONT SCHNEIDER ,  SALMON J ,  LAURENT D

    Inventor： JEUMONT SCHNEIDER

    IPC: B61L3/24 ,  G01R23/00 ,  H04L27/156 ,  H04L27/14

    CPC classification number: G01R23/005 ,  B61L3/243 ,  H04L27/1563

    Abstract: Between two signals having different frequencies the selection stage can be used especially within the information transmission devices concerning the railway circulation on a track along which a plurality of transmission areas follow one another with alternative carrier frequencies, in order to avoid cross talk problems between adjacent areas. According to the invention the selection stage comprises an operational amplifier (6) disposed in an open loop, a counter (5) of the number of crenels contained in the output signal of the differential amplifier (6) and a circuit (4) for controlling the switching of an inverter connecting to the input of the processing device (2) of the greater amplitude signal the appropriate filter in order to eliminate the lesser amplitude signal. Railway application.

    Abstract translation: 在具有不同频率的两个信号之间，选择阶段可以特别地用于关于轨道上的铁路循环的信息传输设备中，轨道上多个传输区域沿着该轨道循环而具有替代的载波频率，以避免相邻区域之间的串扰问题 。 根据本发明，选择级包括设置在开环中的运算放大器（6），包含在差分放大器（6）的输出信号中的斩波器数量的计数器（5）和用于控制的电路（4） 连接到较大振幅信号的处理装置（2）的输入端的逆变器的切换适当的滤波器，以便消除较小振幅信号。 铁路应用。

    DEMODULATING FREQUENCY-MODULATED SIGNALS
    7.
    发明申请
    DEMODULATING FREQUENCY-MODULATED SIGNALS 审中-公开

    公开(公告)号：WO2021255108A1

    公开(公告)日：2021-12-23

    申请号：PCT/EP2021/066269

    申请日：2021-06-16

    Applicant: NORDIC SEMICONDUCTOR ASA

    Inventor： RYAN, Daniel

    IPC: H04L27/144 ,  H04L27/14 ,  H04L27/156 ,  H04W4/80

    Abstract: A method of, and apparatus (17) for, demodulating a frequency-modulated signal. The method comprises: for each of a plurality of templates, performing (105, 107) a respective cross-correlation operation between the template and data representative of the frequency-modulated signal, each template comprising data representative of a signal that is frequency-modulated with predetermined preamble data using a different respective modulation index; generating (105) frequency-offset data from one or more of the cross-correlation operations, the frequency-offset data being representative of a difference between a reference frequency and a carrier frequency of the frequency- modulated signal; determining (109) a respective peak correlation-coefficient value from each of the cross-correlation operations; identifying (111) a highest peak correlation-coefficient value in the determined peak correlation-coefficient values; determining (113) a modulation index estimate in dependence on which template produced the highest peak correlation-coefficient value; and using (115, 117) the frequency-offset data and the modulation index estimate to demodulate (119) at least a portion of the frequency-modulated signal.

    METHODS, SYSTEMS, AND COMPUTER READABLE STORAGE DEVICES FOR PERFORMING DIGITAL HART DEMODULATION
    8.
    发明申请
    METHODS, SYSTEMS, AND COMPUTER READABLE STORAGE DEVICES FOR PERFORMING DIGITAL HART DEMODULATION 审中-公开
    用于执行数字HART解调的方法，系统和计算机可读存储设备

    公开(公告)号：WO2016007153A1

    公开(公告)日：2016-01-14

    申请号：PCT/US2014/045950

    申请日：2014-07-09

    Applicant: GE INTELLIGENT PLATFORMS, INC.

    Inventor： LOVELL, Alan, Carroll ,  HENDERSON, Bruce

    IPC: H04L27/156

    CPC classification number: H04L27/1563

    Abstract: An input signal, including a process signal modulated with a sinusoidal signal, is converted from analog form to digital form. The converted input signal is filtered through a first programmable digital filter to extract the process signal. The converted input signal is filtered through a second programmable digital filter to extract the sinusoidal signal. A binary data signal is created based on the extracted sinusoidal signal.

    Abstract translation: 包括用正弦信号调制的处理信号的输入信号从模拟形式转换成数字形式。 转换的输入信号通过第一可编程数字滤波器进行滤波，以提取处理信号。 经转换的输入信号通过第二可编程数字滤波器滤波以提取正弦信号。 基于提取的正弦信号创建二进制数据信号。

    RECEIVER AND DIGITAL DEMODULATION CIRCUITRY FOR AN EXTERNAL CONTROLLER USEABLE IN AN IMPLANTABLE MEDICAL DEVICE SYSTEM
    9.
    发明申请
    RECEIVER AND DIGITAL DEMODULATION CIRCUITRY FOR AN EXTERNAL CONTROLLER USEABLE IN AN IMPLANTABLE MEDICAL DEVICE SYSTEM 审中-公开
    用于可植入医疗器械系统的外部控制器的接收器和数字解调电路

    公开(公告)号：WO2014015131A1

    公开(公告)日：2014-01-23

    申请号：PCT/US2013/051067

    申请日：2013-07-18

    Applicant: BOSTON SCIENTIFIC NEUROMODULATION CORPORATION

    Inventor： STOUFFER, Thomas, W. ,  AGHASSIAN, Daniel ,  FREIDIN, Lev ,  DRONOV, Vasily

    IPC: A61N1/372 ,  H04L27/156 ,  H04L27/06

    CPC classification number: A61N1/37217 ,  A61N1/37235 ,  A61N1/3727 ,  H04L27/06 ,  H04L27/1566

    Abstract: Receiver and digital demodulation circuitry for an external controller for communicating with an implantable medical device (IMD) is disclosed. A Digital Signal Processor (DSP) is used to sample received analog data transmitted from the IMD at a lower rate than would otherwise be required for the frequency components in the transmitted data by the Nyquist sampling criteria. To allow for this reduced sampling rate, the incoming data is shifted to a lower intermediate frequency using a switching circuit. The switching circuit receives a clock signal, which is preferably but not necessarily the same clock signal used by the DSP to sample the data. The switching circuit multiplies the received data with the clock signal to produce lower intermediate frequencies, which can then be adequately sampled at the DSP at the reduced sampling rate per the Nyquist sampling criteria.

    Abstract translation: 公开了一种用于与可植入医疗设备（IMD）进行通信的外部控制器的接收器和数字解调电路。 数字信号处理器（DSP）用于以比通过奈奎斯特采样标准的发送数据中的频率分量所需的更低的速率对从IMD发送的接收的模拟数据进行采样。 为了允许这种降低的采样率，使用开关电路将输入数据转换到较低的中频。 开关电路接收时钟信号，该时钟信号优选地但不一定是由DSP用来对数据采样的时钟信号。 开关电路将接收的数据与时钟信号相乘以产生较低的中间频率，然后可以在每个奈奎斯特采样标准下以降低的采样率在DSP处对其进行充分采样。

    DEVICES AND METHODS IMPLEMENTING FREQUENCY OFFSET DETERMINATION FOR FSK RECEIVERS
    10.
    发明申请
    DEVICES AND METHODS IMPLEMENTING FREQUENCY OFFSET DETERMINATION FOR FSK RECEIVERS 审中-公开
    对FSK接收机实施频率偏移测定的设备和方法

    公开(公告)号：WO2010058324A3

    公开(公告)日：2011-02-24

    申请号：PCT/IB2009055018

    申请日：2009-11-12

    Applicant: NXP BV ,  NOEL DENIS

    Inventor： NOEL DENIS

    IPC: H04L27/14 ,  H04L27/152 ,  H04L27/156

    CPC classification number: H04L27/14 ,  H04L27/0014 ,  H04L27/1525 ,  H04L27/1563 ,  H04L2027/0016 ,  H04L2027/0032 ,  H04L2027/0065

    Abstract: An RF receiver (120) receives FSK-modulated bit streams on a carrier frequency, and adjusts its local oscillator (122) frequency to the carrier frequency by comparing the accumulated spread between the higher tone of the FSK signal and the frequency of the local oscillator to the accumulated spread of the lower tone of the FSK signal and the frequency of the local oscillator. In certain embodiments, this involves detecting zero- crossings (132) for I and Q signal pairs of the received FSK-modulated bit stream, and determining (218) positive occurrences of each zero-crossing of the I and Q signal pairs in one direction, and negative occurrences for each zero-crossing of the I and Q signal pairs in the opposite direction. Over a plurality of positive and negative occurrences, the total time elapsed between consecutive positive occurrences is measured and accumulated (134, 234) along with the total time elapsed between consecutive negative occurrences. The total time elapsed between consecutive positive occurrences is divided by the total positive occurrences to develop a positive occurrence ratio. Similarly, a negative occurrence ratio is developed. The positive and negative occurrence ratios are then compared, and the result of the comparison is used to adjust (134, 234) the local oscillator frequency of the RF receiver.

    Abstract translation: RF接收机（120）在载波频率上接收FSK调制的比特流，并且通过比较FSK信号的较高音调和本地振荡器的频率之间的累加扩展来调整其本地振荡器（122）频率到载波频率 到FSK信号的较低音调和本地振荡器的频率的累积扩展。 在某些实施例中，这涉及检测对接收的FSK调制比特流的I和Q信号对的过零（132），以及确定（218）I和Q信号对在一个方向上的每个过零点的正面出现 并且对于相反方向上的I和Q信号对的每个过零点的负值出现。 在多个正负事件中，连续出现之间的总时间经过测量和累积（134,234）以及连续出现次数之间的总时间。 连续发生次数之间的总时间除以总阳性发生率，以产生正发生率。 类似地，开发出负的发生率。 然后比较正和负发生率，比较结果用于调整（134,234）RF接收机的本地振荡器频率。

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