公开(公告)号：EP0456388A1

公开(公告)日：1991-11-13

申请号：EP91303782.6

申请日：1991-04-26

申请人： International Business Machines Corporation

发明人： Adair, William Wesley ,  Frankeny, Jerome Albert

IPC分类号： H01L21/00

CPC分类号： H01L21/67386 ,  H01L21/67132 ,  H05K3/0097 ,  H05K3/022

摘要： A high-density circuit substrate is housed in cassettes 52,54 which seal out deleterious contaminants to the substrate during processing, storage and transportation, thereby obviating necessity for clean-room environments. Substrate material is fed into and out of the cassette through a sealing aperture defined by and disposed through the housing wall. In use, a first feed cassette is releasably attached to a substrate processing apparatus which feeds raw substrate material, by means of a drive bushing on the spool, into the apparatus for punching, dielectric application, and the like. A second take-up cassette returns the thus-processed substrate into the cassette, again by means of rotation of the drive bushing, for storage and subsequent further manufacturing operations, wherein the take-up cassette is detached from the processing apparatus. The opposing inner faces of the housing are provided with symmetrical opposing spiraling grooves. When the substrate material is introduced into or pulled from the cassette, its edges travel in respective ones of these grooves. In this manner, the coil is maintained within the housing with a minute spatial separation between layers in the radial direction.

摘要翻译： 高密度电路基片在盒52,54坐落其中密封了污染物无害期间的处理，储存和运输的底物，从而消除必要性洁净室的环境中。 基底材料通过由下式定义，并通过壳体壁设置在密封孔送入和移出盒的。 在使用中，第一供纸盒可释放地附接至其中馈送原料底物，通过在卷轴的驱动衬套的平均值成用于冲压，电介质应用等的装置中的处理装置的基板。 第二卷取盒由驱动衬套，用于存储和随后的另外的制造操作，worin卷取盒从处理装置拆卸的旋转而返回这样处理的基片到盒，一次。 壳体的相对内表面设置有对称的相对的螺旋形凹槽。 当基片材料被引入到或从盒拉出，其边缘行进论文槽respectivement的。 以这种方式，线圈与在径向方向上的层之间的微小空间分离在所述壳体内保持。

公开(公告)号：EP0713358A2

公开(公告)日：1996-05-22

申请号：EP95308110.6

申请日：1995-11-13

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Frankeny, Jerome Albert ,  Frankeny, Richard Francis ,  Hayden, Terry Frederick ,  Imken, Ronald Lann ,  Rice, Janet Louise ,  Vanderlee, Keith Allan

IPC分类号： H05K1/16 ,  H05K3/46

CPC分类号： H05K3/462 ,  H05K1/162 ,  H05K3/0023 ,  H05K3/0094 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0317 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/10378 ,  H05K2203/0307

摘要： A fine pitch pattern multilayer printed circuit board has laminar stackable board layers providing power distribution, signal distribution and capacitive decoupling. The board layers may be fabricated by beginning with a metallic core 1, patterning the core, selectively enclosing the core in a dielectric 6, selectively depositing metal 12 to form vias 13, plugs 14 and signal lines 16, and forming dendrites 19 with joining metallurgy on the vias and plugs to provide stackable connections from above or below the plane of the board layer. In addition, a sol-gel process may be used to form a thin high dielectric constant crystalline film 27 onto a metallic sheet 26 followed with a deposition of a metallic layer 29 onto the high dielectric constant film. The film serves as the dielectric of a capacitor layer which is thereafter in succession patterned, covered by a dielectric 40, and has selectively deposited a metallic layer 42 for interconnecting the capacitor and forming vias 37, 38. The ends of the vias are thereafter subject to dendritic growth and joining metallurgy to provide stackable interconnection capability. A multilayer composite laminar stackable circuit board structure is created using, as appropriate, layers having metallic cores and layers having capacitively configured cores. The multilayer laminar stackable circuit board provides direct vertical connection between surface mounted electronic components and the power, signal and capacitive decoupling layers of the composite board through the dendrites and joining metallurgy of the via and plug formations.

摘要翻译： 细间距图案多层印刷电路板具有提供电力分配，信号分配和电容去耦的层叠式堆叠板层。 可以通过以金属芯1开始，图案化芯，选择性地将芯封闭在电介质6中，选择性地沉积金属12以形成通孔13，插塞14和信号线16以及利用连接冶金术形成树枝状结构19来制造电路板层 在通孔和插头上以提供从板层平面上方或下方的可堆叠连接。 另外，可以使用溶胶 - 凝胶工艺在金属片26上形成薄的高介电常数晶体膜27，随后在高介电常数膜上沉积金属层29。 该膜用作电容器层的电介质，其随后被连续地图案化，被电介质40覆盖，并且已经选择性地沉积用于互连电容器并形成通孔37,38的金属层42.然后，过孔的端部受到 到树枝状生长并加入冶金以提供可堆叠的互连能力。 适当时，使用具有金属芯和具有电容配置的芯的层来形成多层复合层状可堆叠电路板结构。 多层可堆叠电路板通过树枝状结构和通孔和插塞结构的冶金结合提供了表面安装的电子部件与复合板的电源，信号和电容去耦层之间的直接垂直连接。

公开(公告)号：EP0460822B1

公开(公告)日：1994-12-28

申请号：EP91304504.3

申请日：1991-05-20

申请人： International Business Machines Corporation

发明人： Frankeny, Jerome Albert ,  Frankeny, Richard Francis ,  Hermann, Karl ,  Imken, Ronald Lann

IPC分类号： H05K3/36

CPC分类号： H05K3/429 ,  H01L23/142 ,  H01L23/3735 ,  H01L23/4985 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/01019 ,  H01L2924/01078 ,  H05K1/0393 ,  H05K3/445 ,  H05K2201/0154 ,  H05K2201/068 ,  H05K2201/09581 ,  H05K2201/09718 ,  H05K2201/09881 ,  H05K2203/0323 ,  H05K2203/1438 ,  Y10T29/41

公开(公告)号：EP0495621A2

公开(公告)日：1992-07-22

申请号：EP92300301.6

申请日：1992-01-14

申请人： International Business Machines Corporation

发明人： Frankeny, Richard Francis ,  Frankeny, Jerome Albert ,  Ngo, Thai Quoc

IPC分类号： B30B1/42 ,  H03K17/64 ,  H03K3/57

CPC分类号： B30B1/42 ,  H03K3/57 ,  Y10T83/162 ,  Y10T83/8765

摘要： A power management circuit for operating a magnetic repulsion punch comprising a storage capacitor 20 arranged to be connected in parallel with an inductive load 30 serving as an operating coil of the magnetic repulsion punch, a means 240, 440 for selectively and temporarily coupling the inductive load to the storage capacitor for forming a resonant circuit, and a means 100 for charging the storage capacitor after each operation.

摘要翻译： 一种用于操作磁性斥力冲击器的电源管理电路，其包括设置成与用作磁性斥力冲头的操作线圈的感性负载30并联连接的存储电容器20，用于选择性地和暂时地耦合感性负载的装置240,440 到用于形成谐振电路的存储电容器，以及用于在每次操作之后对存储电容器充电的装置100。

公开(公告)号：EP0460822A1

公开(公告)日：1991-12-11

申请号：EP91304504.3

申请日：1991-05-20

申请人： International Business Machines Corporation

发明人： Frankeny, Jerome Albert ,  Frankeny, Richard Francis ,  Hermann, Karl ,  Imken, Ronald Lann

IPC分类号： H05K3/36

CPC分类号： H05K3/429 ,  H01L23/142 ,  H01L23/3735 ,  H01L23/4985 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/01019 ,  H01L2924/01078 ,  H05K1/0393 ,  H05K3/445 ,  H05K2201/0154 ,  H05K2201/068 ,  H05K2201/09581 ,  H05K2201/09718 ,  H05K2201/09881 ,  H05K2203/0323 ,  H05K2203/1438 ,  Y10T29/41

摘要： A multilayer, flexible substrate 64 upon which integrated circuit chips 60 can be attached is disclosed. The input/output(I/O) connections 62 from the chip do not radiate outward from the side of the die, but rather extend from a bottom surface. Since the I/O signal lines would not be accessible for testing once the IC chip is mounted on a substrate, each I/O line is extended outward 68 from the IC footprint to an area on the substrate which is accessible. Additionally, an electrical path from each I/O signal port is simultaneously passed through the substrate layers upon which the chip is mounted, thus providing electrical contact of all I/O ports to the underside of the flexible substrate.
An integrated circuit chip is mounted on this flexible substrate. Since each I/O line is accessible after mounting, the IC chip can be tested prior to mounting on its ultimate carrier. Once tested, the IC chip and the substrate upon which it is mounted are excised from the roll of substrate material. This excised, pretested memory package, which includes both the IC chip and the flexible substrate, can then be mounted directly onto the ultimate carrier either by reflow soldering or direct bonding.

摘要翻译： 公开了可以连接集成电路芯片60的多层柔性基板64。 来自芯片的输入/输出（I / O）连接62不会从模具的侧面向外辐射，而是从底表面延伸。 由于一旦将IC芯片安装在基板上，I / O信号线将无法进行测试，因此每个I / O线从IC封装向外延伸68，从而可访问基板上的一个区域。 此外，来自每个I / O信号端口的电路同时通过其上安装有芯片的衬底层，从而提供所有I / O端口与柔性衬底的下侧的电接触。 集成电路芯片安装在该柔性基板上。 由于每个I / O线在安装后都可以访问，因此IC芯片可以在安装在其最终载体上之前进行测试。 一旦测试，将IC芯片及其安装在其上的基板从基板材料卷上切下。 包括IC芯片和柔性基板在内的这种预先测试的存储器封装可以通过回流焊接或直接接合直接安装在极限载体上。

公开(公告)号：EP0396523A3

公开(公告)日：1991-03-20

申请号：EP90850154.7

申请日：1990-04-24

申请人： International Business Machines Corporation

发明人： Frankeny, Jerome Albert ,  Frankeny, Richard Francis ,  Haj-Ali-Ahmadi, Javad ,  Hermann, Karl ,  Imken, Ronald Lann

IPC分类号： H01R13/24 ,  H01R23/72 ,  H01R9/09

CPC分类号： H01R13/2435 ,  H01R12/714 ,  H05K1/145 ,  H05K3/325 ,  H05K3/365 ,  H05K3/366 ,  H05K3/368 ,  H05K2201/0311 ,  H05K2201/0397 ,  H05K2201/10424 ,  H05K2203/167

摘要： An interconnect strip is provided for effecting electri­cal interconnection between pluralities of conductor pads disposed on circuit boards or the like in a high density configuration. The strip is fabricated from a polymer film carrier (10,30) having laminated thereon a metal foil with preselected spring properties. After lamination, lithographic techniques form a series of electrically isolated metallic beams (20) on the carrier. Additional chemical processing removes portions of the carrier at opposing sides of the strip to expose opposing ends of the beams which extend beyond the carrier parallel to one another in opposing directions out­wards from the carrier. By urging the pads towards respective beam ends of the strip disposed between the pads until mating engagement therewith, a plurality of electrical interconnec­tions are established through the beams. Flexural properties of the strip provide a low insertion force connection for a high density of conductors wherein the spring action of the strip assures favorable contact forces to the pads. The exposed film side of the strip may also be metalized and provided with beams or interconnected to beams on opposing side of the film by vias thereby providing a ground plane.