公开(公告)号：EP2182785B1

公开(公告)日：2017-12-06

申请号：EP09172413.8

申请日：2009-10-07

Applicant: Coriant Oy

Inventor： Immonen, Pentti ,  Tervo, Jarno

IPC: H05K1/02

CPC classification number: H01P1/2005 ,  H05K1/0236 ,  H05K2201/09309 ,  H05K2201/09681

Abstract: In a filter structure for suppressing a spurious signal, a conductor layer in a printed circuit board comprises a pattern with interconnected pattern elements (106 to 114). A pattern element includes a low-impedance conductive region (119) the capacitance of which against a second conductor layer of the printed circuit board is dominant over the inductance. A pattern element comprises at least two adjacent high-impedance conductor strips (115, 116) in a first direction, connected to a low-impedance conductive region, and at least two adjacent high-impedance conductor strips (117, 118) in a second direction, connected to the low-impedance conductive region. The inductance of each high-impedance conductor strips is dominant over the capacitance against the second conductor layer. The high-impedance conductor strips form together with the low-impedance conductive region a plurality of resonance points in the frequency range, thus achieving sufficient stop-band width.

公开(公告)号：EP2146556B1

公开(公告)日：2017-11-01

申请号：EP09163459.2

申请日：2009-06-23

Applicant: NEC Corporation

Inventor： Toyao, Hiroshi

IPC: H05K1/02 ,  H01P1/203 ,  H01Q15/00 ,  H01Q9/04 ,  H01P1/20 ,  H01P3/08 ,  H01P5/02 ,  H01P7/08

CPC classification number: H01P3/026 ,  H01P1/2005 ,  H01P1/2013 ,  H01P3/006 ,  H01P3/081 ,  H01P5/028 ,  H01P7/082 ,  H01Q9/04 ,  H05K1/0236 ,  H05K1/165 ,  H05K3/4602 ,  H05K2201/09236 ,  H05K2201/09263 ,  H05K2201/09309

公开(公告)号：EP2809135B1

公开(公告)日：2017-07-19

申请号：EP14170461.9

申请日：2014-05-29

Applicant: Mavel S.r.l. ,  IFP Énergies nouvelles

Inventor： Bettoni, Davide ,  Stirano, Giorgio

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/00 ,  H05K3/42

CPC classification number: H05K1/0204 ,  H05K1/0206 ,  H05K1/0265 ,  H05K1/0298 ,  H05K1/113 ,  H05K1/181 ,  H05K3/0061 ,  H05K3/42 ,  H05K2201/09236 ,  H05K2201/09309 ,  H05K2201/09609 ,  H05K2201/0979 ,  H05K2201/10022 ,  H05K2201/10053 ,  H05K2201/10166

Abstract: What is described is an electronic device (1) comprising a power component (3) and a printed circuit board (2) . The power component comprises a main body (30) and a lead (31) . The printed circuit board comprises at least two conductive layers (21) parallel to a plane xy, a mounting element (23) and a conductor (24) . The mounting element and the conductor respectively comprise first (23b) and second (24b) conductive tubes, which elongate through a thickness of the printed circuit board along a direction z substantially perpendicular to the plane xy. The main body of the power component is fixed to the mounting element, while the lead thereof is fixed to the conductor.

Abstract translation: 所描述的是包括功率部件（3）和印刷电路板（2）的电子设备（1）。 功率元件包括主体（30）和引线（31）。 印刷电路板包括至少两个平行于平面xy的导电层（21），安装元件（23）和导体（24）。 安装元件和导体分别包括第一导电管（23b）和第二导电管（24b），其沿着基本上垂直于平面xy的方向z延伸穿过印刷电路板的厚度。 功率元件的主体固定在安装元件上，而其引线固定在导体上。

公开(公告)号：EP2410827A4

公开(公告)日：2017-07-12

申请号：EP10753334

申请日：2010-02-03

Applicant: MURATA MANUFACTURING CO

Inventor： KATO NOBORU

IPC: H05K3/46 ,  H01L23/12 ,  H05K1/02

CPC classification number: H05K1/118 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K1/117 ,  H05K1/141 ,  H05K3/4632 ,  H05K2201/09309 ,  H05K2201/09781 ,  H05K2201/2009 ,  H01L2924/00

Abstract: A circuit board to be mounted on a printed circuit board and a mother laminated body are provided, the circuit board being capable of suppressing detachment thereof from the printed circuit board even if the printed circuit board is deformed. A laminated body (11) is configured by induing insulation layers (16) composed of a flexible material that are stacked on one another. External electrodes are provided on a bottom surface of the laminated body (11). Ground conductors (18a, 18b) are provided in the laminated body (11) and harder than the insulation layers (16). The laminated body (11) includes a flexible region (E2) and a rigid region (E1) that is adjacent to the flexible region (E2) when viewed in a plan from a z-axis direction, The rigid region (E1) is defined by the ground conductors (18a, 18b) when viewed in a plan from the z-axis direction, The external electrodes are provided within the flexible region (E2) when viewed in a plan from the z-axis direction.

Abstract translation: 提供了将要安装在印刷电路板和母层叠体上的电路板，即使印刷电路板变形，电路板也能够抑制其从印刷电路板上的分离。 通过将由柔性材料构成的绝缘层（16）堆叠在一起而构成层叠体（11）。 外部电极设置在层压体（11）的底面上。 接地导体（18a，18b）设置在层叠体（11）中并且比绝缘层（16）更硬。 层叠体（11）具有挠性区域（E2）和从z轴方向俯视时与挠性区域（E2）相邻的刚性区域（E1），刚性区域（E1）被限定 在从z轴方向俯视时，通过接地导体（18a，18b），从z轴方向俯视时，在挠性区域（E2）内设置外部电极。

公开(公告)号：EP2222144B1

公开(公告)日：2014-07-30

申请号：EP10004994.9

申请日：2007-06-29

Applicant: SHIN-ETSU POLYMER CO., LTD.

Inventor： Kawaguchi, Toshiyuki ,  Tahara, Kazutoki ,  Saga, Tsutomu ,  Negishi, Mitsuaki

IPC: H05K1/02 ,  H05K9/00

CPC classification number: H05K1/0234 ,  H05K1/0298 ,  H05K1/167 ,  H05K2201/0191 ,  H05K2201/0317 ,  H05K2201/0326 ,  H05K2201/093 ,  H05K2201/09309

公开(公告)号：EP2719263A1

公开(公告)日：2014-04-16

申请号：EP12719714.3

申请日：2012-05-08

Applicant: ZF Friedrichshafen AG

Inventor： LASSMANN, Wilfried ,  BÜTTNER, Christian

IPC: H05K1/02 ,  H05K3/46 ,  H05K5/00

CPC classification number: H05K1/115 ,  H05K1/0201 ,  H05K1/0206 ,  H05K1/0207 ,  H05K3/4608 ,  H05K5/0082 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/09781

Abstract: The invention proposes a printed circuit board (100) having a plurality of layers, which have at least one outer layer (110, 120) and at least one inner layer (130, 140) adjoining the outer layer (110, 120). The printed circuit board (100) has a plurality of micro throughplatings (170), which are formed between a supply voltage area of the at least one outer layer (110, 120) and a supply voltage area of the at least one inner layer (130, 140).

公开(公告)号：EP2595188A1

公开(公告)日：2013-05-22

申请号：EP11306510.6

申请日：2011-11-17

Applicant: ST-Ericsson SA

Inventor： Saint-Pierre, Jean-Marc ,  Guillou, Yann

IPC: H01L25/10 ,  H01L25/065 ,  H01L23/498

CPC classification number: H01L25/03 ,  H01L23/49816 ,  H01L24/19 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H05K1/0225 ,  H05K1/0253 ,  H05K1/028 ,  H05K1/144 ,  H05K1/147 ,  H05K1/185 ,  H05K3/4635 ,  H05K2201/09309 ,  H05K2201/09618 ,  H05K2201/09727 ,  H05K2201/10515 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014

Abstract: A circuitry package (10) comprising:
- a first layer (12) comprising a first die (14) and electrical connections in relation with the first die (14) provided on both side of the first layer (12),
- a second layer (16) comprising a second die (20) in electrical relation with the first die (14), the second layer (16) being at least partially superimposed on the first layer (12) on a side of the first layer (12), the geometry of the second layer (16) being such that at least one electrical connection located on the side of the first layer (12) on which the second layer (16) being at least partially superimposed on the first layer (12) is accessible.
Such circuitry package (10) proposes a solution to the request for a single package system solution requiring both very thin and small packages and possibility to add an additional top package when two other dies are needed.

Abstract translation: 一种电路封装（10），包括： - 第一层（12），包括第一管芯（14）和与设置在第一层（12）的两侧上的第一管芯（14）相关的电连接; - 第二层 （16）包括与所述第一管芯（14）电气关系的第二管芯（20），所述第二层（16）至少部分地叠加在所述第一层（12）侧上的所述第一层（12）上， 第二层（16）的几何形状使得位于其上的第二层（16）至少部分地叠加在第一层（12）上的第一层（12）侧上的至少一个电连接是可接近的 。 这种电路封装（10）提出了对需要非常薄和小封装的单个封装系统解决方案的要求的解决方案，并且当需要另外两个管芯时可能添加额外的顶部封装。

公开(公告)号：EP1937043A4

公开(公告)日：2012-10-24

申请号：EP06821879

申请日：2006-10-16

Applicant: IBIDEN CO LTD

Inventor： KARIYA TAKASHI ,  TANAKA HIRONORI

IPC: H05K1/16 ,  H01L21/48 ,  H01L23/498 ,  H01L23/50 ,  H05K3/46

CPC classification number: H05K1/162 ,  H01L21/4867 ,  H01L23/498 ,  H01L23/50 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K3/388 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0195 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09718 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  H01L2924/00

公开(公告)号：EP2451259A1

公开(公告)日：2012-05-09

申请号：EP10820151.8

申请日：2010-09-30

Applicant: Panasonic Corporation

Inventor： KASHIWAGI, Takafumi ,  SAKAI, Yukio ,  TADA, Nobuhiro ,  HIRUMA, Takayuki

IPC: H05K3/46 ,  H01L23/00 ,  H01L23/28

CPC classification number: H05K3/284 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/1531 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K2201/0715 ,  H05K2201/0723 ,  H05K2201/0919 ,  H05K2201/09309 ,  H05K2203/1316 ,  Y10T29/4913 ,  H01L2224/81 ,  H01L2924/00012

Abstract: A module including a circuit board including an insulating layer and one or more layers of copper foil embedded in the insulating layer; an electronic component mounted on the circuit board; a sealing part sealing the electronic component on the circuit board; and a metal film covering side surfaces of the circuit board and surfaces of the sealing part. A part of the copper foil is exposed to the side surfaces of the circuit board, an exposed part of the copper foil has a width of less than 200 µm, and the copper foil and the metal film are electrically coupled to each other through the exposed part. Thus, occurrence of blushing, crack, or the like, can be prevented.

Abstract translation: 一种模块，包括：电路板，包括绝缘层和一层或多层嵌入绝缘层中的铜箔; 安装在电路板上的电子部件; 密封电路板上的电子部件的密封部; 以及覆盖电路板的侧面和密封部的表面的金属膜。 铜箔的一部分暴露于电路板的侧面，铜箔的露出部分的宽度小于200μm，铜箔和金属膜通过曝光 部分。 因此，可以防止发生白化，裂纹等。

公开(公告)号：EP2429270A1

公开(公告)日：2012-03-14

申请号：EP11192345.4

申请日：2009-04-24

Applicant: Huawei Technologies Co., Ltd.

Inventor： Huang, Mingli ,  Zhang, Shun ,  Yang, Xichen ,  Zhao, Junying ,  Luo, Bing ,  Li, Zhihai ,  Wang, Guoliang

IPC: H05K3/46

CPC classification number: H05K1/0206 ,  H05K1/0204 ,  H05K3/4611 ,  H05K2201/09309 ,  H05K2201/10416 ,  H05K2203/063 ,  Y10T29/49124

Abstract: A multi-layer circuit board, a method of manufacturing the same, and a communication device are provided. As for the multi-layer circuit board, a slot segment is opened on at least one daughter board to form a first daughter board. At least one daughter board and medium layers are stacked together. The daughter boards include first daughter boards. The first daughter boards are placed in such a way that the slot segments of the first daughter boards are communicated. The slot segments are communicated to form a receiving slot. A heat conducting block is placed within the receiving slot. Each medium layer is sandwiched between the daughter boards. The stacked daughter boards, medium layers, and heat conducting block are pressed together, and the pressed daughter boards and heat conducting block are made into a multi-layer circuit board. The heat conducting block is embedded when the circuit board is pressed, thereby simplifying the assembling process of the heat conducting block.

Abstract translation: 提供了多层电路板，其制造方法和通信装置。 对于多层电路板，在至少一个子板上打开槽段以形成第一子板。 至少一个子板和中间层堆叠在一起。 子板包括第一个子板。 第一子板被放置成使得第一子板的槽段被通信。 槽段被传送以形成接收槽。 导热块放置在接收槽内。 每个介质层夹在子板之间。 将堆叠的子板，中等层和导热块压在一起，将压制的子板和导热块制成多层电路板。 当电路板被按压时，导热块被嵌入，从而简化了导热块的组装过程。