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323 条记录 (耗时 0.019 秒)

    MULTILAYER PRINTED WIRING BOARD
    5.
    发明授权
    MULTILAYER PRINTED WIRING BOARD 有权
    多层印刷线路板

    公开(公告)号：EP1845762B1

    公开(公告)日：2011-05-25

    申请号：EP06712598.9

    申请日：2006-01-30

    申请人： IBIDEN CO., LTD.

    发明人： WU, Youhong

    IPC分类号： H05K3/46 ,  H05K3/18

    CPC分类号： H05K1/115 ,  H05K3/4602 ,  H05K2201/0347 ,  H05K2201/0352 ,  H05K2201/09454 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09627 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165

    摘要： [PROBLEMS] To provide a multilayer printed wiring board which does not deteriorate connection reliability by forming a filled via directly above a small-diameter filled via. [MEANS FOR SOLVING PROBLEMS] A stress applied on the filled via (60) formed on covering plating layers (36a, 36d) is larger than that applied on a filled via (160) formed on a second interlayer resin insulating layer (150) during a heat cycle. Thus, a bottom diameter (d1) of the filled via (60) is made larger than a bottom diameter (d2) of the filled via (160) formed directly above.

    摘要翻译： 本发明提供一种多层印刷线路板，其通过在小直径填充通路正上方形成填充通路而不会使连接可靠性降低。 [解决问题的方法]施加在形成在覆盖镀层（36a，36d）上的填充通孔（60）上的应力大于施加在形成在第二层间树脂绝缘层（150）上的填充通孔（160） 一个热循环。 因此，填充通孔（60）的底部直径（d1）大于直接形成在上方的填充通孔（160）的底部直径（d2）。

    VIA-IN-PAD WITH OFF-CENTER GEOMETRY
    6.
    发明授权
    VIA-IN-PAD WITH OFF-CENTER GEOMETRY 有权
    偏心几何接触接触孔

    公开(公告)号：EP1346613B1

    公开(公告)日：2011-05-11

    申请号：EP01273027.1

    申请日：2001-11-28

    申请人： Intel Corporation

    发明人： GENG, Phil ,  JOY, Stephen

    IPC分类号： H05K1/11 ,  H05K3/34

    CPC分类号： H05K3/3436 ,  H01L2224/81 ,  H05K1/113 ,  H05K3/0094 ,  H05K2201/0959 ,  H05K2201/10734 ,  H05K2203/1178 ,  Y02P70/613

    摘要： The electrical contacts (122) of an integrated circuit (120) are coupled to printed circuit board (PCB) bonding pads (104) that include vias (115). A method for fabricating an electronic assembly utilizes at least one operation in which a thermally expansive substance, such as a volatile organic compound (VOC), is applied to the PCB. Some of the VOC (114) goes into the via channels (115). The electrical contacts (122) of a surface mount technology component such as a ball grid array (BGA) solder ball component (120) are affixed to the bonding pads (104) using a reflow soldering technique. According to one embodiment, the vias (115) are formed off-center, so as to inhibit bridging between adjacent solder balls (122) during a solder reflow operation by minimizing the effect of solder ball ballooning (123) resulting from outgassing of the VOC from the via channels (115). A substrate and an electronic system are also described.

    WIRING SUBSTRATE, AND ITS MANUFACTURING METHOD
    8.
    发明公开
    WIRING SUBSTRATE, AND ITS MANUFACTURING METHOD 审中-公开
    VERDRAHTUNGSSUBSTRAT UND VERFAHREN ZU SEINER HERSTELLUNG

    公开(公告)号：EP2170028A1

    公开(公告)日：2010-03-31

    申请号：EP07790573.5

    申请日：2007-07-10

    申请人： Ibiden Co., Ltd.

    发明人： TAKAHASHI, Michimasa

    IPC分类号： H05K3/46

    CPC分类号： H05K3/4652 ,  H05K3/4602 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096

    摘要： The present invention is to provide a wiring board where the risk of rupture in the connection between conductive patterns is minimized if electrical continuity inside the through-hole generates high temperatures. A wiring board 10 that has an insulation layer 161a formed with a base material of resin-impregnated inorganic fabric, a base substrate 121 supporting the insulation layer 161a, a via 114a electrically connecting a conductive pattern 117a formed on the insulation layer 161a and a conductive pattern 113a formed on the base substrate 121, and a through-hole 111 penetrating the base substrate. The hole-diameter of the through-hole 111 is in the range of 10 µm-150 µm.

    摘要翻译： 本发明提供一种布线基板，其中，如果通孔内部的电连续性产生高温，则导电图案之间的连接断裂的风险最小化。 具有由树脂浸渍无机织物的基材形成的绝缘层161a，支撑绝缘层161a的基底基板121，电连接形成在绝缘层161a上的导电图案117a的导通板114a和导电 形成在基底基板121上的图案113a，以及穿透基底基板的通孔111。 通孔111的孔径在10μm〜150μm的范围内。

    MULTILAYER CIRCUIT BOARD AND MOTOR DRIVE CIRCUIT BOARD
    9.
    发明公开
    MULTILAYER CIRCUIT BOARD AND MOTOR DRIVE CIRCUIT BOARD 有权
    MEHRSCHICHTIGE LEITERPLATTE UND MOTORANTRIEBS-LEITERPLATTE

    公开(公告)号：EP2104408A1

    公开(公告)日：2009-09-23

    申请号：EP07860057.4

    申请日：2007-12-25

    申请人： JTEKT Corporation

    发明人： NAKAI, Motoo ,  NAGASE, Shigeki

    IPC分类号： H05K3/46 ,  B62D5/04

    CPC分类号： H05K1/0206 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H05K3/0061 ,  H05K3/244 ,  H05K3/429 ,  H05K3/4611 ,  H05K2201/0347 ,  H05K2201/0394 ,  H05K2201/09518 ,  H05K2201/09527 ,  H05K2201/0959 ,  H01L2924/00014 ,  H01L2924/00

    摘要： Conducting layers 11 and resin-made insulating layers 12 are alternately laminated to form a laminated circuit portion 13, and a metal substrate 14 is installed so as to be in contact with an insulating layer 12, which is the lowermost layer. The conducting layers 11, the insulating layers 12, and the metal substrate 14 are thermal compression bonded. In order to connect the uppermost conducting layer 11 on which electronic component 31 is placed with the lowermost insulating layer 12, a conducting layer 22 is formed on the inner surface by copper plating to install a heat dissipating via 21 into which a resin 23 is filled. A conducting layer 11, which is the uppermost layer, is subjected to gold plating 15, with nickel plating undercoated. An electronic component for driving a motor 31 is placed on the uppermost conducting layer 11, by which the metal substrate 14 can be used as a motor drive circuit substrate for an electric power steering system.

    摘要翻译： 导电层11和树脂制绝缘层12交替层叠以形成层叠电路部分13，并且金属基板14被安装成与作为最下层的绝缘层12接触。 导电层11，绝缘层12和金属基板14被热压接。 为了将其上放置有电子部件31的最上层的导电层11与最下层的绝缘层12连接，通过镀铜在内表面上形成导电层22，以安装填充有树脂23的散热通孔21 。 作为最上层的导电层11进行镀金15，镀镍底涂层。 用于驱动电动机31的电子部件被放置在最上面的导电层11上，金属基板14可以用作电动助力转向系统的电机驱动电路基板。