摘要:
A semiconductor device includes a GaAs substrate 10, a compound semiconductor layer 15 formed on the GaAs substrate 10, and a protective insulating film 20 formed on a surface of the compound semiconductor layer 15 and made of a single-layer silicon nitride film whose film density becomes lower in the direction from the bottom to the top.
摘要:
A high electron mobility transistor (HEMT), comprises a buffer layer; a barrier layer on said buffer layer; a two dimensional electron gas (2DEG) at the interface between said buffer layer and said barrier layer; and a negative ion region in said barrier layer.
摘要:
A semiconductor device, which reduces the earth inductance, and a fabrication method for the same is provided. The semiconductor device and the fabrication method for the same including: a gate electrode, a source electrode, and a drain electrode which are placed on a first surface of a semi-insulating substrate 11, and have a plurality of fingers; an earth conductor 26 placed on a second surface of an opposite side with the first surface; a gate terminal electrode 14, a source terminal electrode 18, and a drain terminal electrode 12 which are connecting a plurality of fingers, respectively, and formed for every the gate electrode, the source electrodes, and the drain electrode an active layer formed on the semi-insulating substrate 11 under the gate electrode, the source electrode, and the drain electrodes; a multi stage VIA hole composed of a small caliber VIA hole 30 near the first surface and a large caliber VIA hole 20 near the second surface; and an earth electrode 23 which is formed in an internal wall surface of the multistage VIA hole and the second surface, and is connected from an earth conductor placed at the second surface side for the source terminal electrode 18.
摘要:
A vertical type GaN series field effect transistor having excellent pinch-off characteristics is provided. A compound semiconductor device includes a conductive semiconductor substrate, a drain electrode formed on a bottom surface of the conductive semiconductor substrate, a current blocking layer formed on a top surface of the conductive semiconductor substrate, made of high resistance compound semiconductor or insulator, and having openings, an active layer of compound semiconductor burying the openings and extending on an upper surface of the current blocking layer, a gate electrode formed above the openings and above the active layer, and a source electrode formed laterally spaced from the gate electrode and formed above the active layer.
摘要:
In a group III nitride-type field effect transistor, the present invention reduces a leak current component by conduction of residual carriers in a buffer layer, and achieves improvement in a break-down voltage, and enhances a carrier confinement effect (carrier confinement) of a channel to improve pinch-off characteristics (to suppress a short channel effect). For example, when applying the present invention to a GaN-type field effect transistor, besides GaN of a channel layer, a composition-modulated (composition-gradient) AlGaN layer in which aluminum composition reduces toward a top gradually or stepwise is used as a buffer layer (hetero buffer). To gate length Lg of a FET to be prepared, a sum a of layer thicknesses of an electron supply layer and a channel layer is selected so as to fulfill Lg/a ‰¥ 5, and in such a case, the layer thickness of the channel layer is selected in a range of not exceeding 5 times (about 500 A) as long as a de Broglie wavelength of two-dimensional electron gas accumulated in the channel layer in room temperature.
摘要:
A hybrid model formed from a semi-physical device model along with an accurate data-fitting model in order to implement a physical device model as a large signal microwave CAD tool (figure 19). The model incorporates a semi-physical model and measured bias-dependent characteristics.
摘要:
A compound semiconductor device including an electron transport layer (12) that is formed on a substrate and includes a III-V nitride compound semiconductor, a gate insulating film (17) that is positioned above the compound semiconductor layer, and a gate electrode (18) that is positioned on the gate insulating film. The gate insulating film includes a first insulating film (15, 26) that includes oxygen, at least a single metal element selected from a metal bonding with the oxygen and forming a metal oxide having a dielectric constant no less than 10, and at least a single metal element selected from Si and Al.